master

Commits

74fd7107e8
Switch std.json to use an ordered hashmap
Lewis Gaul
2021-04-04 10:16:59
6fc822a948
Merge pull request #8410 from antlilja/remove-undefined-math
Frank Denis
2021-04-03 19:27:37
d4dc2eb807
Compile error for signed integer math
antlilja
2021-04-02 14:52:47
2f07d76eee
stage2: implement Type.onePossibleValue for structs
Andrew Kelley
2021-04-03 06:17:23
d47f0abd5b
stage2: Sema: implement validate_struct_init_ptr
Andrew Kelley
2021-04-03 06:06:09
97d7fddfb7
stage2: progress towards basic structs
Andrew Kelley
2021-04-03 04:11:51
4bab90512d
disable failing stack traces test cases due to LLVM12 changes
Andrew Kelley
2021-04-03 01:33:38
e2a7c01331
disable failing MIPS tests due to LLVM12 regressions
Andrew Kelley
2021-04-03 01:33:07
43d364afef
stage2 AArch64: Add ldrh and ldrb instructions
joachimschmidt557
2021-04-02 18:57:49
09008125e7
Revert back to the old LLVM PassManager
Andrew Kelley
2021-04-02 23:35:01
12e2523730
docgen: correct the progress bar
Andrew Kelley
2021-04-02 22:57:16
ba1bea2fe8
zig_llvm.cpp: remove dead code
Andrew Kelley
2021-04-02 21:10:39
a0e89c9b46
Merge remote-tracking branch 'origin/master' into llvm12
Andrew Kelley
2021-04-02 21:09:38
94383d14df
llvm new-pm: Add missing pipeline option and Passes
Min-Yih Hsu
2021-03-30 22:34:20
0d53a2bff0
llvm new-pm: Port LLVM 11.x-based changes to LLVM 12.x
Min-Yih Hsu
2021-03-30 03:13:07
228a1ce3e8
stage2 register_manager: Add unit tests for tryAllocReg and allocReg
joachimschmidt557
2021-03-27 17:24:51
4efbcad26d
stage2 codegen: Extract register management code into separate file
joachimschmidt557
2021-03-19 10:11:45
fc9c1b4e4a
Merge pull request #8028 from mguaypaq/nosuspend-allow
Andrew Kelley
2021-04-02 20:59:34
f270bef9a4
docs: document the nosuspend keyword (#7972)
Mathieu Guay-Paquet
2021-04-02 20:57:42
354c14d6a2
make visited links readable in the stdlib docs warning bar
Loris Cro
2021-04-02 20:22:02
4fef1d2982
added warning banner to stdlib docs
Loris Cro
2021-04-02 20:13:55
d780848ae4
Merge pull request #7792 from zanderxyz/zanderxyz/priority-dequeue
Andrew Kelley
2021-04-02 19:52:23
833f258297
put async frame in correct addrspace
Woze Parrot
2021-01-12 03:40:07
45db0e93a9
Merge pull request #8412 from g-w1/fix-docgen-test-release
Frank Denis
2021-04-02 18:40:55
cdc5921073
docgen: fix typo
jacob gw
2021-04-02 18:08:52
cc435dab2f
test: fix io_uring timing test to skip on failure
Michael Dusan
2021-04-02 06:10:15
8ebfdc14f6
stage2: implement structs in the frontend
Andrew Kelley
2021-04-02 07:34:40
c66b48194f
stage2: AstGen and ZIR printing for struct decls
Andrew Kelley
2021-04-02 04:27:17
09000c3f77
zig cc: copy .pdb files from zig-cache/ when appropriate
Andrew Kelley
2021-04-02 01:33:29
50bcfb8c90
stage2: implement struct init syntax with ptr result loc
Andrew Kelley
2021-04-01 20:58:55
59035ae3e9
os: handle ECONNRESET for connect() syscall
lithdew
2021-03-30 17:28:48
070a28e493
Merge pull request #8266 from ziglang/zir-memory-layout
Andrew Kelley
2021-04-01 08:11:15
c9e31febf8
stage2: finish implementation of LazySrcLoc
Andrew Kelley
2021-04-01 08:00:00
b27d052676
stage2: finish source location reworkings in the branch
Andrew Kelley
2021-04-01 06:36:32
e8143f6cbe
stage2: compile error for duplicate switch value on sparse
Andrew Kelley
2021-04-01 03:38:26
cec766f73c
stage2: compile error for duplicate switch value on boolean
Andrew Kelley
2021-04-01 03:30:23
fedc9ebd26
stage2: cbe: restore all previously passing tests!
jacob gw
2021-04-01 02:16:32
3cebaaad1c
astgen: improved handling of coercion
Andrew Kelley
2021-04-01 03:05:37
08eedc962d
Sema: fix else case code generation for switch
Andrew Kelley
2021-04-01 01:17:47
abd06d8eab
stage2: clean up RangeSet and fix swapped Sema switch logic for lhs/rhs
Andrew Kelley
2021-04-01 00:39:04
e272c29c16
Sema: implement switch validation for ranges
Andrew Kelley
2021-04-01 00:06:03
1b657e6e41
stage2 codegen: Make sure function return value is in a callee preserved register
joachimschmidt557
2021-03-27 22:23:14
e088a17f56
stage2 AArch64: implement strb and strh
joachimschmidt557
2021-03-27 21:39:55
c7b09be8de
AstGen: improve switch expressions
Andrew Kelley
2021-03-31 21:37:20
549af582e7
AstGen: switch expressions properly handle result locations
Andrew Kelley
2021-03-31 08:57:22
2a1dd174cd
stage2: rework AstGen for switch expressions
Andrew Kelley
2021-03-31 06:22:30
195ddab2be
Sema: implement switch expressions
Andrew Kelley
2021-03-30 06:59:08
501b4aff99
Add tests for the fill functions of the Isaac64, Pcg, Sfc64, and Xoroshiro128 PRNGs
Matthew Borkowski
2021-03-29 03:46:59
a5cc5f7854
Fix typo in Pcg.zig's fill function
Matthew Borkowski
2021-03-28 15:49:10
623d5f442c
stage2: guidance on how to implement switch expressions
Andrew Kelley
2021-03-29 08:12:26
b85ef2300f
Merge remote-tracking branch 'origin/master' into llvm12
Andrew Kelley
2021-03-29 06:42:56
281a7baaea
Merge remote-tracking branch 'origin/master' into zir-memory-layout
Andrew Kelley
2021-03-29 04:42:08
8f469c1127
stage2: fix error sets
Andrew Kelley
2021-03-29 04:38:19
0005b34637
stage2: implement sema for @errorToInt and @intToError
jacob gw
2021-03-26 22:54:41
175adc0bd7
ci: update msys2 installer
Andrew Kelley
2021-03-29 02:49:28
bb5cfbcb72
Merge pull request #8305 from jedisct1/base64
Andrew Kelley
2021-03-29 02:11:07
f80f8a7a78
AstGen: pass *GenZir as the first arg, not *Module
Isaac Freund
2021-03-28 22:42:17
d5d88087dd
translate-c: fix typo made in prior commit
Isaac Freund
2021-03-28 22:29:37
d123a5ec67
AstGen: scope result location related functions
Isaac Freund
2021-03-28 19:53:38
402f87a213
stage2: rename WipZirCode => AstGen, astgen.zig => AstGen.zig
Isaac Freund
2021-03-28 19:08:42
bbe6a0dddd
Add a test & fix for std.fmt.fmtDuration
Jonathan Knezek
2021-03-28 05:16:03
6993087edc
Remove the base64 unsafe decoder
Frank Denis
2021-03-27 18:21:11
99bed37fc7
Add more variants
Frank Denis
2021-03-26 16:01:44
b8c019ef49
std/base64: cleanups & support url-safe and other non-padded variants
Frank Denis
2021-03-19 19:26:30
ab9324e604
translate-c: intcast compound assignment operand if different-sized integer
Evan Haas
2021-03-23 04:28:30
c8d721aa42
array_hash_map: decrement entries slice len after popping from entries in pop() to prevent oob
lithdew
2021-03-28 07:22:34
54b42a7596
azure: run pacman with -Sy
Jakub Konka
2021-03-28 09:46:40
68f4eb0f67
stage2: fully implement Type.eql for pointers
Andrew Kelley
2021-03-28 08:55:19
75080e351a
std: Detect AMD Zen3 CPU family
LemonBoy
2021-03-27 12:33:08
95cc457d97
stage2: enable passing tests
Andrew Kelley
2021-03-27 07:54:36
1f5617ac07
stage2: implement bitwise expr and error literals
Andrew Kelley
2021-03-27 07:46:37
da731e18c9
stage2: implement source location: .node_offset_var_decl_ty
Andrew Kelley
2021-03-27 02:35:15
a72bfd00cf
astgen: fix continue expressions
Andrew Kelley
2021-03-27 02:26:39
a217ad59c7
astgen: fix result location for sliced objects
Isaac Freund
2021-03-26 23:39:29
22338d7816
astgen: implement float literals
Isaac Freund
2021-03-26 15:41:49
d8ee8794e1
astgen: implement more builtin functions
Isaac Freund
2021-03-26 15:20:11
5eea13f5cc
astgen: implement slicing
Isaac Freund
2021-03-26 11:46:42
b2deaf8027
stage2: improve source locations of Decl access
Andrew Kelley
2021-03-26 07:00:38
4bfcd105ef
stage2: fix `@compileLog`.
Andrew Kelley
2021-03-26 04:11:23
4fd3a2e8e8
astgen: fix var decl source locations
Andrew Kelley
2021-03-26 03:39:30
b9c5a1fdf5
astgen: fix for loop expressions
Andrew Kelley
2021-03-26 03:25:26
9f01598a49
zig build: use ZIG_GLOBAL_CACHE_DIR
Michael Dusan
2021-03-25 23:20:32
f1e324216d
zld: parse archive's table of contents
Jakub Konka
2021-03-25 22:48:04
399bb2e154
astgen: fix array access
Andrew Kelley
2021-03-25 21:03:54
4ce212739b
os/linux: handle ECONNRESET for recv
lithdew
2021-03-25 09:23:23
df0f7f4692
translate-c: stop creating unnamed decls for typedefs child types
Veikka Tuominen
2021-03-21 17:42:30
5c28b8cd11
boot_services: implement locateDevicePath
Sreehari S
2021-03-24 18:21:40
31023de6c4
stage2: implement inline while
Andrew Kelley
2021-03-25 08:37:52
12d18a36e5
stage2: enable passing tests
Andrew Kelley
2021-03-25 04:58:38
01bfd835bb
stage2: clean up break / noreturn astgen
Andrew Kelley
2021-03-25 04:45:14
ea42ab34ab
stage2: add block test cases llvm backend
Timon Kruiper
2021-03-24 15:41:32
522707622e
astgen: implement breaking from a block
Timon Kruiper
2021-03-24 15:26:09
d73a4940e0
stage2: cleanups from previous commits
Andrew Kelley
2021-03-25 00:14:11
3543373fd4
stage2: add passing optional test case in LLVM backend
Timon Kruiper
2021-03-24 13:56:29
2c99fbb672
astgen: implement orelse
Timon Kruiper
2021-03-23 23:55:52
0c6581e01d
stage2: fix memory leak when updating a function
Andrew Kelley
2021-03-24 23:46:06
180dae4196
stage2: further cleanups regarding zir.Inst.Ref
Andrew Kelley
2021-03-24 23:24:18
0c601965ab
stage2: make zir.Inst.Ref a non-exhaustive enum
Isaac Freund
2021-03-24 01:17:38
3bf72f2b3a
std.build: make Builder.install_prefix non optional
Isaac Freund
2021-03-22 13:11:45
a1afe69395
stage2: comment out failing test cases; implement more things
Andrew Kelley
2021-03-24 07:13:01