Commit fdc6e0af05

Andrew Kelley <andrew@ziglang.org>
2019-06-18 16:49:21
fix zero length array literal casted to slice
1 parent e5a0414
Changed files (1)
src
src/ir.cpp
@@ -15119,8 +15119,11 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira, IrIn
             old_result_loc = reinterpret_cast<ResultLocPeer *>(instruction->result_loc)->parent->parent;
             continue;
         }
-        ir_assert(false, &instruction->base); // TODO
-        zig_unreachable();
+        IrInstruction *result = ir_const(ira, &instruction->base, implicit_elem_type);
+        result->value.special = ConstValSpecialUndef;
+        IrInstruction *ptr = ir_get_ref(ira, &instruction->base, result, false, false);
+        ptr->value.data.x_ptr.mut = ConstPtrMutComptimeVar;
+        return ptr;
     }
 }
 
@@ -19212,6 +19215,15 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
         return ira->codegen->invalid_instruction;
     }
 
+    switch (type_has_one_possible_value(ira->codegen, container_type)) {
+        case OnePossibleValueInvalid:
+            return ira->codegen->invalid_instruction;
+        case OnePossibleValueYes:
+            return ir_const(ira, &instruction->base, container_type);
+        case OnePossibleValueNo:
+            break;
+    }
+
     bool is_comptime;
     switch (type_requires_comptime(ira->codegen, container_type)) {
         case ReqCompTimeInvalid: