Commit fa52c9e36e

LemonBoy <thatlemon@gmail.com>
2020-01-18 18:11:20
Small cleanups
1 parent b72f858
Changed files (4)
lib
std
os
special
compiler_rt
lib/std/os/bits/linux.zig
@@ -18,7 +18,7 @@ pub usingnamespace switch (builtin.arch) {
     else => struct {},
 };
 
-const is_mips = builtin.arch == .mipsel;
+const is_mips = builtin.arch.isMIPS();
 
 pub const pid_t = i32;
 pub const fd_t = i32;
lib/std/special/compiler_rt/clzsi2.zig
@@ -1,10 +1,5 @@
-// Ported from:
-//
-// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/clzsi2.c
-// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/arm/clzsi2.S
 const builtin = @import("builtin");
 
-// Precondition: a != 0
 fn __clzsi2_generic(a: i32) callconv(.C) i32 {
     @setRuntimeSafety(builtin.is_test);
 
@@ -24,15 +19,42 @@ fn __clzsi2_generic(a: i32) callconv(.C) i32 {
     return n - @bitCast(i32, x);
 }
 
-fn __clzsi2_arm_clz(a: i32) callconv(.Naked) noreturn {
+fn __clzsi2_thumb1() callconv(.Naked) void {
+    @setRuntimeSafety(builtin.is_test);
+
+    // Similar to the generic version with the last two rounds replaced by a LUT
     asm volatile (
-        \\ clz r0,r0
+        \\ movs r1, #32
+        \\ lsrs r2, r0, #16
+        \\ beq 1f
+        \\ subs r1, #16
+        \\ movs r0, r2
+        \\ 1:
+        \\ lsrs r2, r0, #8
+        \\ beq 1f
+        \\ subs r1, #8
+        \\ movs r0, r2
+        \\ 1:
+        \\ lsrs r2, r0, #4
+        \\ beq 1f
+        \\ subs r1, #4
+        \\ movs r0, r2
+        \\ 1:
+        \\ ldr r3, =LUT
+        \\ ldrb r0, [r3, r0]
+        \\ subs r0, r1, r0
         \\ bx lr
+        \\ .p2align 2
+        \\ LUT:
+        \\ .byte 4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0
     );
+
     unreachable;
 }
 
-fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
+fn __clzsi2_arm32() callconv(.Naked) void {
+    @setRuntimeSafety(builtin.is_test);
+
     asm volatile (
         \\ // Assumption: n != 0
         \\ // r0: n
@@ -75,39 +97,15 @@ fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
         \\ sub r0, r1, r0, lsr #1
         \\ bx lr
     );
+
     unreachable;
 }
 
-const can_use_arm_clz = switch (builtin.arch) {
-    .arm, .armeb => |sub_arch| switch (sub_arch) {
-        .v4t => false,
-        .v6m => false,
-        else => true,
-    },
-    .thumb, .thumbeb => |sub_arch| switch (sub_arch) {
-        .v6,
-        .v6k,
-        .v5,
-        .v5te,
-        .v4t,
-        => false,
-        else => true,
-    },
-    else => false,
-};
-
-const is_arm32_no_thumb = switch (builtin.arch) {
-    builtin.Arch.arm,
-    builtin.Arch.armeb,
-    => true,
-    else => false,
-};
-
 pub const __clzsi2 = blk: {
-    if (comptime can_use_arm_clz) {
-        break :blk __clzsi2_arm_clz;
-    } else if (comptime is_arm32_no_thumb) {
+    if (builtin.arch.isARM()) {
         break :blk __clzsi2_arm32;
+    } else if (builtin.arch.isThumb()) {
+        break :blk __clzsi2_thumb1;
     } else {
         break :blk __clzsi2_generic;
     }
lib/std/start.zig
@@ -8,16 +8,7 @@ const uefi = std.os.uefi;
 
 var starting_stack_ptr: [*]usize = undefined;
 
-const is_wasm = switch (builtin.arch) {
-    .wasm32, .wasm64 => true,
-    else => false,
-};
-
-const is_mips = switch (builtin.arch) {
-    .mips, .mipsel, .mips64, .mips64el => true,
-    else => false,
-};
-const start_sym_name = if (is_mips) "__start" else "_start";
+const start_sym_name = if (builtin.arch.isMIPS()) "__start" else "_start";
 
 comptime {
     if (builtin.output_mode == .Lib and builtin.link_mode == .Dynamic) {
@@ -35,7 +26,7 @@ comptime {
             }
         } else if (builtin.os == .uefi) {
             if (!@hasDecl(root, "EfiMain")) @export(EfiMain, .{ .name = "EfiMain" });
-        } else if (is_wasm and builtin.os == .freestanding) {
+        } else if (builtin.arch.isWasm() and builtin.os == .freestanding) {
             if (!@hasDecl(root, start_sym_name)) @export(wasm_freestanding_start, .{ .name = start_sym_name });
         } else if (builtin.os != .other and builtin.os != .freestanding) {
             if (!@hasDecl(root, start_sym_name)) @export(_start, .{ .name = start_sym_name });
lib/std/target.zig
@@ -125,6 +125,16 @@ pub const Target = union(enum) {
             v5,
             v5te,
             v4t,
+
+            pub fn version(version: Arm32) comptime_int {
+                return switch (version) {
+                    .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
+                    .v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
+                    .v6, .v6m, .v6k, .v6t2 => 6,
+                    .v5, .v5te => 5,
+                    .v4t => 4,
+                };
+            }
         };
         pub const Arm64 = enum {
             v8_5a,
@@ -146,6 +156,34 @@ pub const Target = union(enum) {
             r6,
         };
 
+        pub fn isARM(arch: Arch) bool {
+            return switch (arch) {
+                .arm, .armeb => true,
+                else => false,
+            };
+        }
+
+        pub fn isThumb(arch: Arch) bool {
+            return switch (arch) {
+                .thumb, .thumbeb => true,
+                else => false,
+            };
+        }
+
+        pub fn isWasm(arch: Arch) bool {
+            return switch (arch) {
+                .wasm32, .wasm64 => true,
+                else => false,
+            };
+        }
+
+        pub fn isMIPS(arch: Arch) bool {
+            return switch (arch) {
+                .mips, .mipsel, .mips64, .mips64el => true,
+                else => false,
+            };
+        }
+
         pub fn toElfMachine(arch: Arch) std.elf.EM {
             return switch (arch) {
                 .avr => ._AVR,