Commit `f31173d379`

Alex Rønne Petersen <alex@alexrp.com>

2024-10-02 08:16:05

llvm: Disable f16 lowering for hexagon.

In theory, this should work for v68+. In practice, it runs into an LLVM assertion when using a `freeze` instruction on `f16` values, similar to the issue we had for LoongArch.

master

1 parent 56b0c7b

Changed files (1)

src

codegen

llvm.zig

@@ -12380,6 +12380,7 @@ fn backendSupportsF80(target: std.Target) bool {
 /// if it produces miscompilations.
 fn backendSupportsF16(target: std.Target) bool {
     return switch (target.cpu.arch) {
+        .hexagon,
         .powerpc,
         .powerpcle,
         .powerpc64,

Commit f31173d379

Commit `f31173d379`