Commit f2a7aba586

@@ -10432,11 +10432,6 @@ const ParamTypeIterator = struct {
                                 it.llvm_index += 1;
                                 return .abi_sized_int;
                             }
-                            if (classes[0] == .sse and classes[1] == .none) {
-                                it.zig_index += 1;
-                                it.llvm_index += 1;
-                                return .byval;
-                            }
                             it.llvm_types_buffer = llvm_types_buffer;
                             it.llvm_types_len = llvm_types_index;
                             it.llvm_index += llvm_types_index;

@@ -758,3 +758,15 @@ void c_big_vec(BigVec vec) {
 BigVec c_ret_big_vec(void) {
     return (BigVec){9, 10, 11, 12, 13, 14, 15, 16};
 }
+
+typedef struct {
+    float x, y;
+} Vector2;
+
+void c_ptr_size_float_struct(Vector2 vec) {
+    assert_or_panic(vec.x == 1);
+    assert_or_panic(vec.y == 2);
+}
+Vector2 c_ret_ptr_size_float_struct(void) {
+    return (Vector2){3, 4};
+}

@@ -813,3 +813,21 @@ test "big simd vector" {
     try expect(x[6] == 15);
     try expect(x[7] == 16);
 }
+
+const Vector2 = extern struct { x: f32, y: f32 };
+
+extern fn c_ptr_size_float_struct(Vector2) void;
+extern fn c_ret_ptr_size_float_struct() Vector2;
+
+test "C ABI pointer sized float struct" {
+    if (builtin.cpu.arch == .i386) return error.SkipZigTest;
+    if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
+    if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
+    if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
+
+    c_ptr_size_float_struct(.{ .x = 1, .y = 2 });
+
+    var x = c_ret_ptr_size_float_struct();
+    try expect(x.x == 3);
+    try expect(x.y == 4);
+}

@@ -1314,7 +1314,7 @@ const c_abi_targets = [_]CrossTarget{
     .{
         .cpu_arch = .powerpc64le,
         .os_tag = .linux,
-        .abi = .none,
+        .abi = .musl,
     },
 };