Commit ea3f5905f0

@@ -147,6 +147,7 @@ pub const CallingConvention = enum {
     AAPCS,
     AAPCSVFP,
     SysV,
+    Win64,
     PtxKernel,
 };
 

@@ -7940,6 +7940,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
         },
         .Signal => .AVR_SIGNAL,
         .SysV => .X86_64_SysV,
+        .Win64 => .Win64,
         .PtxKernel => return switch (target.cpu.arch) {
             .nvptx, .nvptx64 => .PTX_Kernel,
             else => unreachable,

@@ -84,6 +84,7 @@ enum CallingConvention {
     CallingConventionAAPCS,
     CallingConventionAAPCSVFP,
     CallingConventionSysV,
+    CallingConventionWin64,
     CallingConventionPtxKernel
 };
 

@@ -991,6 +991,7 @@ const char *calling_convention_name(CallingConvention cc) {
         case CallingConventionAAPCSVFP: return "AAPCSVFP";
         case CallingConventionInline: return "Inline";
         case CallingConventionSysV: return "SysV";
+        case CallingConventionWin64: return "Win64";
         case CallingConventionPtxKernel: return "PtxKernel";
     }
     zig_unreachable();
@@ -1015,6 +1016,7 @@ bool calling_convention_allows_zig_types(CallingConvention cc) {
         case CallingConventionAAPCS:
         case CallingConventionAAPCSVFP:
         case CallingConventionSysV:
+        case CallingConventionWin64:
             return false;
     }
     zig_unreachable();
@@ -2006,6 +2008,7 @@ Error emit_error_unless_callconv_allowed_for_target(CodeGen *g, AstNode *source_
                 allowed_platforms = "ARM";
             break;
         case CallingConventionSysV:
+        case CallingConventionWin64:
             if (g->zig_target->arch != ZigLLVM_x86_64)
                 allowed_platforms = "x86_64";
             break;
@@ -3846,6 +3849,7 @@ static void resolve_decl_fn(CodeGen *g, TldFn *tld_fn) {
                 case CallingConventionAAPCS:
                 case CallingConventionAAPCSVFP:
                 case CallingConventionSysV:
+                case CallingConventionWin64:
                 case CallingConventionPtxKernel:
                     add_fn_export(g, fn_table_entry, buf_ptr(&fn_table_entry->symbol_name),
                                   GlobalLinkageIdStrong, fn_cc);

@@ -209,6 +209,9 @@ static ZigLLVM_CallingConv get_llvm_cc(CodeGen *g, CallingConvention cc) {
         case CallingConventionSysV:
             assert(g->zig_target->arch == ZigLLVM_x86_64);
             return ZigLLVM_X86_64_SysV;
+        case CallingConventionWin64:
+            assert(g->zig_target->arch == ZigLLVM_x86_64);
+            return ZigLLVM_Win64;
         case CallingConventionPtxKernel:
             assert(g->zig_target->arch == ZigLLVM_nvptx ||
                 g->zig_target->arch == ZigLLVM_nvptx64);
@@ -359,6 +362,7 @@ static bool cc_want_sret_attr(CallingConvention cc) {
         case CallingConventionAAPCS:
         case CallingConventionAAPCSVFP:
         case CallingConventionSysV:
+        case CallingConventionWin64:
         case CallingConventionPtxKernel:
             return true;
         case CallingConventionAsync:
@@ -10033,6 +10037,7 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
     static_assert(CallingConventionAAPCS == 12, "");
     static_assert(CallingConventionAAPCSVFP == 13, "");
     static_assert(CallingConventionSysV == 14, "");
+    static_assert(CallingConventionWin64 == 15, "");
 
     static_assert(BuiltinPtrSizeOne == 0, "");
     static_assert(BuiltinPtrSizeMany == 1, "");

@@ -11743,6 +11743,7 @@ static Stage1AirInst *ir_analyze_instruction_export(IrAnalyze *ira, Stage1ZirIns
                 case CallingConventionAAPCS:
                 case CallingConventionAAPCSVFP:
                 case CallingConventionSysV:
+                case CallingConventionWin64:
                 case CallingConventionPtxKernel:
                     add_fn_export(ira->codegen, fn_entry, buf_ptr(symbol_name), global_linkage_id, cc);
                     fn_entry->section_name = section_name;