Commit e9efed9ed1

Andrew Kelley <andrew@ziglang.org>
2024-05-02 03:57:09
LLVM: zeroext/signext does happen on macos
Fixes a regression introduced in 3ce7fee9dd8bbb6f56e47758a9a8ada028400c71.
master
1 parent 7e1cba7
Changed files (1)
src
codegen
llvm.zig
src/codegen/llvm.zig
@@ -11577,29 +11577,35 @@ fn ccAbiPromoteInt(
         .Int, .Enum, .ErrorSet => ty.intInfo(mod),
         else => return null,
     };
-    return switch (target.cpu.arch) {
-        .riscv64 => switch (int_info.bits) {
+    return switch (target.os.tag) {
+        .macos => switch (int_info.bits) {
             0...16 => int_info.signedness,
-            32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
-            17...31, 33...63 => int_info.signedness,
             else => null,
         },
+        else => switch (target.cpu.arch) {
+            .riscv64 => switch (int_info.bits) {
+                0...16 => int_info.signedness,
+                32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
+                17...31, 33...63 => int_info.signedness,
+                else => null,
+            },
 
-        .sparc64,
-        .powerpc64,
-        .powerpc64le,
-        => switch (int_info.bits) {
-            0...63 => int_info.signedness,
-            else => null,
-        },
+            .sparc64,
+            .powerpc64,
+            .powerpc64le,
+            => switch (int_info.bits) {
+                0...63 => int_info.signedness,
+                else => null,
+            },
 
-        .aarch64,
-        .aarch64_be,
-        => null,
+            .aarch64,
+            .aarch64_be,
+            => null,
 
-        else => switch (int_info.bits) {
-            0...16 => int_info.signedness,
-            else => null,
+            else => switch (int_info.bits) {
+                0...16 => int_info.signedness,
+                else => null,
+            },
         },
     };
 }