Commit e70584e2f8

David Rubin <daviru007@icloud.com>
2024-03-25 11:52:13
riscv: change `load_symbol` psuedo instruction size to 8
master
1 parent 06089fc
Changed files (1)
src
arch
riscv64
Emit.zig
src/arch/riscv64/Emit.zig
@@ -517,6 +517,7 @@ fn instructionSize(emit: *Emit, inst: Mir.Inst.Index) usize {
         .cmp_eq,
         .cmp_imm_eq,
         .cmp_gte,
+        .load_symbol,
         => 8,
 
         else => 4,