Commit `e26b64a87d`

Alex Rønne Petersen <alex@alexrp.com>

2024-10-17 01:59:53

std.Target: Use mips32r2/mips64r2 as the baseline CPU models for mips/mips64.

This matches Clang's defaults. That also means these CPU models tend to get more testing, so they're a safer baseline choice. Anecdotally, the oldest MIPS hardware that I've seen anyone run Zig on was also r2.

master

1 parent 385f586

Changed files (1)

lib

std

Target.zig

@@ -1860,6 +1860,8 @@ pub const Cpu = struct {
                 .hexagon => &hexagon.cpu.hexagonv60, // gcc/clang do not have a generic hexagon model.
                 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
                 .loongarch64 => &loongarch.cpu.loongarch64,
+                .mips, .mipsel => &mips.cpu.mips32r2,
+                .mips64, .mips64el => &mips.cpu.mips64r2,
                 .nvptx, .nvptx64 => &nvptx.cpu.sm_52,
                 .powerpc64le => &powerpc.cpu.ppc64le,
                 .riscv32 => &riscv.cpu.baseline_rv32,

Commit e26b64a87d

Commit `e26b64a87d`