Commit c8a7dc22b1

Felix "xq" Queißner <xq@random-projects.net>
2023-01-10 09:39:56
Fixes bug in AVR codegen for llvm backend
1 parent 5376184
Changed files (1)
src
codegen
llvm.zig
src/codegen/llvm.zig
@@ -4192,6 +4192,7 @@ pub const DeclGen = struct {
         // verbatim, and the result should test as non-null.
         const target = dg.module.getTarget();
         const int = switch (target.cpu.arch.ptrBitWidth()) {
+            16 => llvm_usize.constInt(0xaaaa, .False),
             32 => llvm_usize.constInt(0xaaaaaaaa, .False),
             64 => llvm_usize.constInt(0xaaaaaaaa_aaaaaaaa, .False),
             else => unreachable,