Commit bb55276f06

r00ster91 <r00ster91@protonmail.com>
2022-05-02 09:26:08
Avoid some unnecessary underscores in constant names
1 parent 9af4cad
Changed files (3)
lib/std/os/linux.zig
@@ -5418,8 +5418,8 @@ pub const PERF = struct {
 // TODO: Add the rest of the AUDIT defines?
 pub const AUDIT = struct {
     pub const ARCH = enum(u32) {
-        const _64BIT = 0x80000000;
-        const _LE = 0x40000000;
+        const @"64BIT" = 0x80000000;
+        const LE = 0x40000000;
 
         pub const current: AUDIT.ARCH = switch (native_arch) {
             .i386 => .I386,
@@ -5440,13 +5440,13 @@ pub const AUDIT = struct {
         ARM = toAudit(.arm),
         ARMEB = toAudit(.armeb),
         CSKY = toAudit(.csky),
-        HEXAGON = @enumToInt(std.elf.EM._HEXAGON),
+        HEXAGON = @enumToInt(std.elf.EM.HEXAGON),
         I386 = toAudit(.i386),
         M68K = toAudit(.m68k),
         MIPS = toAudit(.mips),
-        MIPSEL = toAudit(.mips) | _LE,
+        MIPSEL = toAudit(.mips) | LE,
         MIPS64 = toAudit(.mips64),
-        MIPSEL64 = toAudit(.mips64) | _LE,
+        MIPSEL64 = toAudit(.mips64) | LE,
         PPC = toAudit(.powerpc),
         PPC64 = toAudit(.powerpc64),
         PPC64LE = toAudit(.powerpc64le),
@@ -5459,8 +5459,8 @@ pub const AUDIT = struct {
 
         fn toAudit(arch: std.Target.Cpu.Arch) u32 {
             var res: u32 = @enumToInt(arch.toElfMachine());
-            if (arch.endian() == .Little) res |= _LE;
-            if (arch.ptrBitWidth() == 64) res |= _64BIT;
+            if (arch.endian() == .Little) res |= LE;
+            if (arch.ptrBitWidth() == 64) res |= @"64BIT";
 
             return res;
         }
lib/std/elf.zig
@@ -943,577 +943,577 @@ pub const Half = switch (@sizeOf(usize)) {
     else => @compileError("expected pointer size of 32 or 64"),
 };
 
-/// Machine architectures
+/// Machine architectures.
+///
 /// See current registered ELF machine architectures at:
-///    http://www.sco.com/developers/gabi/latest/ch4.eheader.html
-/// The underscore prefix is because many of these start with numbers.
+/// http://www.sco.com/developers/gabi/latest/ch4.eheader.html
 pub const EM = enum(u16) {
     /// No machine
-    _NONE = 0,
+    NONE = 0,
 
     /// AT&T WE 32100
-    _M32 = 1,
+    M32 = 1,
 
     /// SPARC
-    _SPARC = 2,
+    SPARC = 2,
 
     /// Intel 386
-    _386 = 3,
+    @"386" = 3,
 
     /// Motorola 68000
-    _68K = 4,
+    @"68K" = 4,
 
     /// Motorola 88000
-    _88K = 5,
+    @"88K" = 5,
 
     /// Intel MCU
-    _IAMCU = 6,
+    IAMCU = 6,
 
     /// Intel 80860
-    _860 = 7,
+    @"860" = 7,
 
     /// MIPS R3000
-    _MIPS = 8,
+    MIPS = 8,
 
     /// IBM System/370
-    _S370 = 9,
+    S370 = 9,
 
     /// MIPS RS3000 Little-endian
-    _MIPS_RS3_LE = 10,
+    MIPS_RS3_LE = 10,
 
     /// SPU Mark II
-    _SPU_2 = 13,
+    SPU_2 = 13,
 
     /// Hewlett-Packard PA-RISC
-    _PARISC = 15,
+    PARISC = 15,
 
     /// Fujitsu VPP500
-    _VPP500 = 17,
+    VPP500 = 17,
 
     /// Enhanced instruction set SPARC
-    _SPARC32PLUS = 18,
+    SPARC32PLUS = 18,
 
     /// Intel 80960
-    _960 = 19,
+    @"960" = 19,
 
     /// PowerPC
-    _PPC = 20,
+    PPC = 20,
 
     /// PowerPC64
-    _PPC64 = 21,
+    PPC64 = 21,
 
     /// IBM System/390
-    _S390 = 22,
+    S390 = 22,
 
     /// IBM SPU/SPC
-    _SPU = 23,
+    SPU = 23,
 
     /// NEC V800
-    _V800 = 36,
+    V800 = 36,
 
     /// Fujitsu FR20
-    _FR20 = 37,
+    FR20 = 37,
 
     /// TRW RH-32
-    _RH32 = 38,
+    RH32 = 38,
 
     /// Motorola RCE
-    _RCE = 39,
+    RCE = 39,
 
     /// ARM
-    _ARM = 40,
+    ARM = 40,
 
     /// DEC Alpha
-    _ALPHA = 41,
+    ALPHA = 41,
 
     /// Hitachi SH
-    _SH = 42,
+    SH = 42,
 
     /// SPARC V9
-    _SPARCV9 = 43,
+    SPARCV9 = 43,
 
     /// Siemens TriCore
-    _TRICORE = 44,
+    TRICORE = 44,
 
     /// Argonaut RISC Core
-    _ARC = 45,
+    ARC = 45,
 
     /// Hitachi H8/300
-    _H8_300 = 46,
+    H8_300 = 46,
 
     /// Hitachi H8/300H
-    _H8_300H = 47,
+    H8_300H = 47,
 
     /// Hitachi H8S
-    _H8S = 48,
+    H8S = 48,
 
     /// Hitachi H8/500
-    _H8_500 = 49,
+    H8_500 = 49,
 
     /// Intel IA-64 processor architecture
-    _IA_64 = 50,
+    IA_64 = 50,
 
     /// Stanford MIPS-X
-    _MIPS_X = 51,
+    MIPS_X = 51,
 
     /// Motorola ColdFire
-    _COLDFIRE = 52,
+    COLDFIRE = 52,
 
     /// Motorola M68HC12
-    _68HC12 = 53,
+    @"68HC12" = 53,
 
     /// Fujitsu MMA Multimedia Accelerator
-    _MMA = 54,
+    MMA = 54,
 
     /// Siemens PCP
-    _PCP = 55,
+    PCP = 55,
 
     /// Sony nCPU embedded RISC processor
-    _NCPU = 56,
+    NCPU = 56,
 
     /// Denso NDR1 microprocessor
-    _NDR1 = 57,
+    NDR1 = 57,
 
     /// Motorola Star*Core processor
-    _STARCORE = 58,
+    STARCORE = 58,
 
     /// Toyota ME16 processor
-    _ME16 = 59,
+    ME16 = 59,
 
     /// STMicroelectronics ST100 processor
-    _ST100 = 60,
+    ST100 = 60,
 
     /// Advanced Logic Corp. TinyJ embedded processor family
-    _TINYJ = 61,
+    TINYJ = 61,
 
     /// AMD x86-64 architecture
-    _X86_64 = 62,
+    X86_64 = 62,
 
     /// Sony DSP Processor
-    _PDSP = 63,
+    PDSP = 63,
 
     /// Digital Equipment Corp. PDP-10
-    _PDP10 = 64,
+    PDP10 = 64,
 
     /// Digital Equipment Corp. PDP-11
-    _PDP11 = 65,
+    PDP11 = 65,
 
     /// Siemens FX66 microcontroller
-    _FX66 = 66,
+    FX66 = 66,
 
     /// STMicroelectronics ST9+ 8/16 bit microcontroller
-    _ST9PLUS = 67,
+    ST9PLUS = 67,
 
     /// STMicroelectronics ST7 8-bit microcontroller
-    _ST7 = 68,
+    ST7 = 68,
 
     /// Motorola MC68HC16 Microcontroller
-    _68HC16 = 69,
+    @"68HC16" = 69,
 
     /// Motorola MC68HC11 Microcontroller
-    _68HC11 = 70,
+    @"68HC11" = 70,
 
     /// Motorola MC68HC08 Microcontroller
-    _68HC08 = 71,
+    @"68HC08" = 71,
 
     /// Motorola MC68HC05 Microcontroller
-    _68HC05 = 72,
+    @"68HC05" = 72,
 
     /// Silicon Graphics SVx
-    _SVX = 73,
+    SVX = 73,
 
     /// STMicroelectronics ST19 8-bit microcontroller
-    _ST19 = 74,
+    ST19 = 74,
 
     /// Digital VAX
-    _VAX = 75,
+    VAX = 75,
 
     /// Axis Communications 32-bit embedded processor
-    _CRIS = 76,
+    CRIS = 76,
 
     /// Infineon Technologies 32-bit embedded processor
-    _JAVELIN = 77,
+    JAVELIN = 77,
 
     /// Element 14 64-bit DSP Processor
-    _FIREPATH = 78,
+    FIREPATH = 78,
 
     /// LSI Logic 16-bit DSP Processor
-    _ZSP = 79,
+    ZSP = 79,
 
     /// Donald Knuth's educational 64-bit processor
-    _MMIX = 80,
+    MMIX = 80,
 
     /// Harvard University machine-independent object files
-    _HUANY = 81,
+    HUANY = 81,
 
     /// SiTera Prism
-    _PRISM = 82,
+    PRISM = 82,
 
     /// Atmel AVR 8-bit microcontroller
-    _AVR = 83,
+    AVR = 83,
 
     /// Fujitsu FR30
-    _FR30 = 84,
+    FR30 = 84,
 
     /// Mitsubishi D10V
-    _D10V = 85,
+    D10V = 85,
 
     /// Mitsubishi D30V
-    _D30V = 86,
+    D30V = 86,
 
     /// NEC v850
-    _V850 = 87,
+    V850 = 87,
 
     /// Mitsubishi M32R
-    _M32R = 88,
+    M32R = 88,
 
     /// Matsushita MN10300
-    _MN10300 = 89,
+    MN10300 = 89,
 
     /// Matsushita MN10200
-    _MN10200 = 90,
+    MN10200 = 90,
 
     /// picoJava
-    _PJ = 91,
+    PJ = 91,
 
     /// OpenRISC 32-bit embedded processor
-    _OPENRISC = 92,
+    OPENRISC = 92,
 
     /// ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5)
-    _ARC_COMPACT = 93,
+    ARC_COMPACT = 93,
 
     /// Tensilica Xtensa Architecture
-    _XTENSA = 94,
+    XTENSA = 94,
 
     /// Alphamosaic VideoCore processor
-    _VIDEOCORE = 95,
+    VIDEOCORE = 95,
 
     /// Thompson Multimedia General Purpose Processor
-    _TMM_GPP = 96,
+    TMM_GPP = 96,
 
     /// National Semiconductor 32000 series
-    _NS32K = 97,
+    NS32K = 97,
 
     /// Tenor Network TPC processor
-    _TPC = 98,
+    TPC = 98,
 
     /// Trebia SNP 1000 processor
-    _SNP1K = 99,
+    SNP1K = 99,
 
     /// STMicroelectronics (www.st.com) ST200
-    _ST200 = 100,
+    ST200 = 100,
 
     /// Ubicom IP2xxx microcontroller family
-    _IP2K = 101,
+    IP2K = 101,
 
     /// MAX Processor
-    _MAX = 102,
+    MAX = 102,
 
     /// National Semiconductor CompactRISC microprocessor
-    _CR = 103,
+    CR = 103,
 
     /// Fujitsu F2MC16
-    _F2MC16 = 104,
+    F2MC16 = 104,
 
     /// Texas Instruments embedded microcontroller msp430
-    _MSP430 = 105,
+    MSP430 = 105,
 
     /// Analog Devices Blackfin (DSP) processor
-    _BLACKFIN = 106,
+    BLACKFIN = 106,
 
     /// S1C33 Family of Seiko Epson processors
-    _SE_C33 = 107,
+    SE_C33 = 107,
 
     /// Sharp embedded microprocessor
-    _SEP = 108,
+    SEP = 108,
 
     /// Arca RISC Microprocessor
-    _ARCA = 109,
+    ARCA = 109,
 
     /// Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University
-    _UNICORE = 110,
+    UNICORE = 110,
 
     /// eXcess: 16/32/64-bit configurable embedded CPU
-    _EXCESS = 111,
+    EXCESS = 111,
 
     /// Icera Semiconductor Inc. Deep Execution Processor
-    _DXP = 112,
+    DXP = 112,
 
     /// Altera Nios II soft-core processor
-    _ALTERA_NIOS2 = 113,
+    ALTERA_NIOS2 = 113,
 
     /// National Semiconductor CompactRISC CRX
-    _CRX = 114,
+    CRX = 114,
 
     /// Motorola XGATE embedded processor
-    _XGATE = 115,
+    XGATE = 115,
 
     /// Infineon C16x/XC16x processor
-    _C166 = 116,
+    C166 = 116,
 
     /// Renesas M16C series microprocessors
-    _M16C = 117,
+    M16C = 117,
 
     /// Microchip Technology dsPIC30F Digital Signal Controller
-    _DSPIC30F = 118,
+    DSPIC30F = 118,
 
     /// Freescale Communication Engine RISC core
-    _CE = 119,
+    CE = 119,
 
     /// Renesas M32C series microprocessors
-    _M32C = 120,
+    M32C = 120,
 
     /// Altium TSK3000 core
-    _TSK3000 = 131,
+    TSK3000 = 131,
 
     /// Freescale RS08 embedded processor
-    _RS08 = 132,
+    RS08 = 132,
 
     /// Analog Devices SHARC family of 32-bit DSP processors
-    _SHARC = 133,
+    SHARC = 133,
 
     /// Cyan Technology eCOG2 microprocessor
-    _ECOG2 = 134,
+    ECOG2 = 134,
 
     /// Sunplus S+core7 RISC processor
-    _SCORE7 = 135,
+    SCORE7 = 135,
 
     /// New Japan Radio (NJR) 24-bit DSP Processor
-    _DSP24 = 136,
+    DSP24 = 136,
 
     /// Broadcom VideoCore III processor
-    _VIDEOCORE3 = 137,
+    VIDEOCORE3 = 137,
 
     /// RISC processor for Lattice FPGA architecture
-    _LATTICEMICO32 = 138,
+    LATTICEMICO32 = 138,
 
     /// Seiko Epson C17 family
-    _SE_C17 = 139,
+    SE_C17 = 139,
 
     /// The Texas Instruments TMS320C6000 DSP family
-    _TI_C6000 = 140,
+    TI_C6000 = 140,
 
     /// The Texas Instruments TMS320C2000 DSP family
-    _TI_C2000 = 141,
+    TI_C2000 = 141,
 
     /// The Texas Instruments TMS320C55x DSP family
-    _TI_C5500 = 142,
+    TI_C5500 = 142,
 
     /// STMicroelectronics 64bit VLIW Data Signal Processor
-    _MMDSP_PLUS = 160,
+    MMDSP_PLUS = 160,
 
     /// Cypress M8C microprocessor
-    _CYPRESS_M8C = 161,
+    CYPRESS_M8C = 161,
 
     /// Renesas R32C series microprocessors
-    _R32C = 162,
+    R32C = 162,
 
     /// NXP Semiconductors TriMedia architecture family
-    _TRIMEDIA = 163,
+    TRIMEDIA = 163,
 
     /// Qualcomm Hexagon processor
-    _HEXAGON = 164,
+    HEXAGON = 164,
 
     /// Intel 8051 and variants
-    _8051 = 165,
+    @"8051" = 165,
 
     /// STMicroelectronics STxP7x family of configurable and extensible RISC processors
-    _STXP7X = 166,
+    STXP7X = 166,
 
     /// Andes Technology compact code size embedded RISC processor family
-    _NDS32 = 167,
+    NDS32 = 167,
 
     /// Cyan Technology eCOG1X family
-    _ECOG1X = 168,
+    ECOG1X = 168,
 
     /// Dallas Semiconductor MAXQ30 Core Micro-controllers
-    _MAXQ30 = 169,
+    MAXQ30 = 169,
 
     /// New Japan Radio (NJR) 16-bit DSP Processor
-    _XIMO16 = 170,
+    XIMO16 = 170,
 
     /// M2000 Reconfigurable RISC Microprocessor
-    _MANIK = 171,
+    MANIK = 171,
 
     /// Cray Inc. NV2 vector architecture
-    _CRAYNV2 = 172,
+    CRAYNV2 = 172,
 
     /// Renesas RX family
-    _RX = 173,
+    RX = 173,
 
     /// Imagination Technologies META processor architecture
-    _METAG = 174,
+    METAG = 174,
 
     /// MCST Elbrus general purpose hardware architecture
-    _MCST_ELBRUS = 175,
+    MCST_ELBRUS = 175,
 
     /// Cyan Technology eCOG16 family
-    _ECOG16 = 176,
+    ECOG16 = 176,
 
     /// National Semiconductor CompactRISC CR16 16-bit microprocessor
-    _CR16 = 177,
+    CR16 = 177,
 
     /// Freescale Extended Time Processing Unit
-    _ETPU = 178,
+    ETPU = 178,
 
     /// Infineon Technologies SLE9X core
-    _SLE9X = 179,
+    SLE9X = 179,
 
     /// Intel L10M
-    _L10M = 180,
+    L10M = 180,
 
     /// Intel K10M
-    _K10M = 181,
+    K10M = 181,
 
     /// ARM AArch64
-    _AARCH64 = 183,
+    AARCH64 = 183,
 
     /// Atmel Corporation 32-bit microprocessor family
-    _AVR32 = 185,
+    AVR32 = 185,
 
     /// STMicroeletronics STM8 8-bit microcontroller
-    _STM8 = 186,
+    STM8 = 186,
 
     /// Tilera TILE64 multicore architecture family
-    _TILE64 = 187,
+    TILE64 = 187,
 
     /// Tilera TILEPro multicore architecture family
-    _TILEPRO = 188,
+    TILEPRO = 188,
 
     /// NVIDIA CUDA architecture
-    _CUDA = 190,
+    CUDA = 190,
 
     /// Tilera TILE-Gx multicore architecture family
-    _TILEGX = 191,
+    TILEGX = 191,
 
     /// CloudShield architecture family
-    _CLOUDSHIELD = 192,
+    CLOUDSHIELD = 192,
 
     /// KIPO-KAIST Core-A 1st generation processor family
-    _COREA_1ST = 193,
+    COREA_1ST = 193,
 
     /// KIPO-KAIST Core-A 2nd generation processor family
-    _COREA_2ND = 194,
+    COREA_2ND = 194,
 
     /// Synopsys ARCompact V2
-    _ARC_COMPACT2 = 195,
+    ARC_COMPACT2 = 195,
 
     /// Open8 8-bit RISC soft processor core
-    _OPEN8 = 196,
+    OPEN8 = 196,
 
     /// Renesas RL78 family
-    _RL78 = 197,
+    RL78 = 197,
 
     /// Broadcom VideoCore V processor
-    _VIDEOCORE5 = 198,
+    VIDEOCORE5 = 198,
 
     /// Renesas 78KOR family
-    _78KOR = 199,
+    @"78KOR" = 199,
 
     /// Freescale 56800EX Digital Signal Controller (DSC)
-    _56800EX = 200,
+    @"56800EX" = 200,
 
     /// Beyond BA1 CPU architecture
-    _BA1 = 201,
+    BA1 = 201,
 
     /// Beyond BA2 CPU architecture
-    _BA2 = 202,
+    BA2 = 202,
 
     /// XMOS xCORE processor family
-    _XCORE = 203,
+    XCORE = 203,
 
     /// Microchip 8-bit PIC(r) family
-    _MCHP_PIC = 204,
+    MCHP_PIC = 204,
 
     /// Reserved by Intel
-    _INTEL205 = 205,
+    INTEL205 = 205,
 
     /// Reserved by Intel
-    _INTEL206 = 206,
+    INTEL206 = 206,
 
     /// Reserved by Intel
-    _INTEL207 = 207,
+    INTEL207 = 207,
 
     /// Reserved by Intel
-    _INTEL208 = 208,
+    INTEL208 = 208,
 
     /// Reserved by Intel
-    _INTEL209 = 209,
+    INTEL209 = 209,
 
     /// KM211 KM32 32-bit processor
-    _KM32 = 210,
+    KM32 = 210,
 
     /// KM211 KMX32 32-bit processor
-    _KMX32 = 211,
+    KMX32 = 211,
 
     /// KM211 KMX16 16-bit processor
-    _KMX16 = 212,
+    KMX16 = 212,
 
     /// KM211 KMX8 8-bit processor
-    _KMX8 = 213,
+    KMX8 = 213,
 
     /// KM211 KVARC processor
-    _KVARC = 214,
+    KVARC = 214,
 
     /// Paneve CDP architecture family
-    _CDP = 215,
+    CDP = 215,
 
     /// Cognitive Smart Memory Processor
-    _COGE = 216,
+    COGE = 216,
 
     /// iCelero CoolEngine
-    _COOL = 217,
+    COOL = 217,
 
     /// Nanoradio Optimized RISC
-    _NORC = 218,
+    NORC = 218,
 
     /// CSR Kalimba architecture family
-    _CSR_KALIMBA = 219,
+    CSR_KALIMBA = 219,
 
     /// AMD GPU architecture
-    _AMDGPU = 224,
+    AMDGPU = 224,
 
     /// RISC-V
-    _RISCV = 243,
+    RISCV = 243,
 
     /// Lanai 32-bit processor
-    _LANAI = 244,
+    LANAI = 244,
 
     /// Linux kernel bpf virtual machine
-    _BPF = 247,
+    BPF = 247,
 
     /// C-SKY
-    _CSKY = 252,
+    CSKY = 252,
 
     /// Fujitsu FR-V
-    _FRV = 0x5441,
+    FRV = 0x5441,
 
     _,
 
     pub fn toTargetCpuArch(em: EM) ?std.Target.Cpu.Arch {
         return switch (em) {
-            ._AVR => .avr,
-            ._MSP430 => .msp430,
-            ._ARC => .arc,
-            ._ARM => .arm,
-            ._HEXAGON => .hexagon,
-            ._68K => .m68k,
-            ._MIPS => .mips,
-            ._MIPS_RS3_LE => .mipsel,
-            ._PPC => .powerpc,
-            ._SPARC => .sparc,
-            ._386 => .i386,
-            ._XCORE => .xcore,
-            ._CSR_KALIMBA => .kalimba,
-            ._LANAI => .lanai,
-            ._AARCH64 => .aarch64,
-            ._PPC64 => .powerpc64,
-            ._RISCV => .riscv64,
-            ._X86_64 => .x86_64,
-            ._BPF => .bpfel,
-            ._SPARCV9 => .sparcv9,
-            ._S390 => .s390x,
-            ._SPU_2 => .spu_2,
+            .AVR => .avr,
+            .MSP430 => .msp430,
+            .ARC => .arc,
+            .ARM => .arm,
+            .HEXAGON => .hexagon,
+            .@"68K" => .m68k,
+            .MIPS => .mips,
+            .MIPS_RS3_LE => .mipsel,
+            .PPC => .powerpc,
+            .SPARC => .sparc,
+            .@"386" => .i386,
+            .XCORE => .xcore,
+            .CSR_KALIMBA => .kalimba,
+            .LANAI => .lanai,
+            .AARCH64 => .aarch64,
+            .PPC64 => .powerpc64,
+            .RISCV => .riscv64,
+            .X86_64 => .x86_64,
+            .BPF => .bpfel,
+            .SPARCV9 => .sparcv9,
+            .S390 => .s390x,
+            .SPU_2 => .spu_2,
             // there's many cases we don't (yet) handle, or will never have a
             // zig target cpu arch equivalent (such as null).
             else => null,
lib/std/target.zig
@@ -914,62 +914,62 @@ pub const Target = struct {
 
             pub fn toElfMachine(arch: Arch) std.elf.EM {
                 return switch (arch) {
-                    .avr => ._AVR,
-                    .msp430 => ._MSP430,
-                    .arc => ._ARC,
-                    .arm => ._ARM,
-                    .armeb => ._ARM,
-                    .hexagon => ._HEXAGON,
-                    .m68k => ._68K,
-                    .le32 => ._NONE,
-                    .mips => ._MIPS,
-                    .mipsel => ._MIPS_RS3_LE,
-                    .powerpc, .powerpcle => ._PPC,
-                    .r600 => ._NONE,
-                    .riscv32 => ._RISCV,
-                    .sparc => ._SPARC,
-                    .sparcel => ._SPARC,
-                    .tce => ._NONE,
-                    .tcele => ._NONE,
-                    .thumb => ._ARM,
-                    .thumbeb => ._ARM,
-                    .i386 => ._386,
-                    .xcore => ._XCORE,
-                    .nvptx => ._NONE,
-                    .amdil => ._NONE,
-                    .hsail => ._NONE,
-                    .spir => ._NONE,
-                    .kalimba => ._CSR_KALIMBA,
-                    .shave => ._NONE,
-                    .lanai => ._LANAI,
-                    .wasm32 => ._NONE,
-                    .renderscript32 => ._NONE,
-                    .aarch64_32 => ._AARCH64,
-                    .aarch64 => ._AARCH64,
-                    .aarch64_be => ._AARCH64,
-                    .mips64 => ._MIPS,
-                    .mips64el => ._MIPS_RS3_LE,
-                    .powerpc64 => ._PPC64,
-                    .powerpc64le => ._PPC64,
-                    .riscv64 => ._RISCV,
-                    .x86_64 => ._X86_64,
-                    .nvptx64 => ._NONE,
-                    .le64 => ._NONE,
-                    .amdil64 => ._NONE,
-                    .hsail64 => ._NONE,
-                    .spir64 => ._NONE,
-                    .wasm64 => ._NONE,
-                    .renderscript64 => ._NONE,
-                    .amdgcn => ._NONE,
-                    .bpfel => ._BPF,
-                    .bpfeb => ._BPF,
-                    .csky => ._CSKY,
-                    .sparcv9 => ._SPARCV9,
-                    .s390x => ._S390,
-                    .ve => ._NONE,
-                    .spu_2 => ._SPU_2,
-                    .spirv32 => ._NONE,
-                    .spirv64 => ._NONE,
+                    .avr => .AVR,
+                    .msp430 => .MSP430,
+                    .arc => .ARC,
+                    .arm => .ARM,
+                    .armeb => .ARM,
+                    .hexagon => .HEXAGON,
+                    .m68k => .@"68K",
+                    .le32 => .NONE,
+                    .mips => .MIPS,
+                    .mipsel => .MIPS_RS3_LE,
+                    .powerpc, .powerpcle => .PPC,
+                    .r600 => .NONE,
+                    .riscv32 => .RISCV,
+                    .sparc => .SPARC,
+                    .sparcel => .SPARC,
+                    .tce => .NONE,
+                    .tcele => .NONE,
+                    .thumb => .ARM,
+                    .thumbeb => .ARM,
+                    .i386 => .@"386",
+                    .xcore => .XCORE,
+                    .nvptx => .NONE,
+                    .amdil => .NONE,
+                    .hsail => .NONE,
+                    .spir => .NONE,
+                    .kalimba => .CSR_KALIMBA,
+                    .shave => .NONE,
+                    .lanai => .LANAI,
+                    .wasm32 => .NONE,
+                    .renderscript32 => .NONE,
+                    .aarch64_32 => .AARCH64,
+                    .aarch64 => .AARCH64,
+                    .aarch64_be => .AARCH64,
+                    .mips64 => .MIPS,
+                    .mips64el => .MIPS_RS3_LE,
+                    .powerpc64 => .PPC64,
+                    .powerpc64le => .PPC64,
+                    .riscv64 => .RISCV,
+                    .x86_64 => .X86_64,
+                    .nvptx64 => .NONE,
+                    .le64 => .NONE,
+                    .amdil64 => .NONE,
+                    .hsail64 => .NONE,
+                    .spir64 => .NONE,
+                    .wasm64 => .NONE,
+                    .renderscript64 => .NONE,
+                    .amdgcn => .NONE,
+                    .bpfel => .BPF,
+                    .bpfeb => .BPF,
+                    .csky => .CSKY,
+                    .sparcv9 => .SPARCV9,
+                    .s390x => .S390,
+                    .ve => .NONE,
+                    .spu_2 => .SPU_2,
+                    .spirv32 => .NONE,
+                    .spirv64 => .NONE,
                 };
             }