Commit a9f06d16fd

Luna Schwalbe <dev@luna.gl>
2025-09-04 16:15:00
Reenable std.fmt.test.vector for riscv64
The vector codegen issue as described in https://github.com/ziglang/zig/issues/4486 has been fixed upstream.
master
1 parent d94e061
Changed files (1)
lib
std
fmt.zig
lib/std/fmt.zig
@@ -1211,10 +1211,6 @@ test "positional/alignment/width/precision" {
 
 test "vector" {
     if ((builtin.cpu.arch == .armeb or builtin.cpu.arch == .thumbeb) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/22060
-    if (builtin.target.cpu.arch == .riscv64) {
-        // https://github.com/ziglang/zig/issues/4486
-        return error.SkipZigTest;
-    }
 
     const vbool: @Vector(4, bool) = [_]bool{ true, false, true, false };
     const vi64: @Vector(4, i64) = [_]i64{ -2, -1, 0, 1 };