Commit 978555eea4

Alex Rønne Petersen <alex@alexrp.com>
2025-08-28 01:00:12
std.Target.x86: purge avx10.n-256, rename avx10.n_512 to avx10.n, require evex512 for avx512f
Intel has abandoned AVX10.N/128,256; AVX10.N is now always 512-bit.
1 parent 2c0cc81
Changed files (3)
lib
std
Target
zig
system
tools
lib/std/Target/x86.zig
@@ -24,10 +24,8 @@ pub const Feature = enum {
     amx_tile,
     amx_transpose,
     avx,
-    avx10_1_256,
-    avx10_1_512,
-    avx10_2_256,
-    avx10_2_512,
+    avx10_1,
+    avx10_2,
     avx2,
     avx512bf16,
     avx512bitalg,
@@ -340,9 +338,9 @@ pub const all_features = blk: {
             .sse4_2,
         }),
     };
-    result[@intFromEnum(Feature.avx10_1_256)] = .{
-        .llvm_name = "avx10.1-256",
-        .description = "Support AVX10.1 up to 256-bit instruction",
+    result[@intFromEnum(Feature.avx10_1)] = .{
+        .llvm_name = "avx10.1-512",
+        .description = "Support AVX10.1 up to 512-bit instruction",
         .dependencies = featureSet(&[_]Feature{
             .avx512bf16,
             .avx512bitalg,
@@ -357,27 +355,11 @@ pub const all_features = blk: {
             .avx512vpopcntdq,
         }),
     };
-    result[@intFromEnum(Feature.avx10_1_512)] = .{
-        .llvm_name = "avx10.1-512",
-        .description = "Support AVX10.1 up to 512-bit instruction",
-        .dependencies = featureSet(&[_]Feature{
-            .avx10_1_256,
-            .evex512,
-        }),
-    };
-    result[@intFromEnum(Feature.avx10_2_256)] = .{
-        .llvm_name = "avx10.2-256",
-        .description = "Support AVX10.2 up to 256-bit instruction",
-        .dependencies = featureSet(&[_]Feature{
-            .avx10_1_256,
-        }),
-    };
-    result[@intFromEnum(Feature.avx10_2_512)] = .{
+    result[@intFromEnum(Feature.avx10_2)] = .{
         .llvm_name = "avx10.2-512",
         .description = "Support AVX10.2 up to 512-bit instruction",
         .dependencies = featureSet(&[_]Feature{
-            .avx10_1_512,
-            .avx10_2_256,
+            .avx10_1,
         }),
     };
     result[@intFromEnum(Feature.avx2)] = .{
@@ -434,6 +416,7 @@ pub const all_features = blk: {
         .description = "Enable AVX-512 instructions",
         .dependencies = featureSet(&[_]Feature{
             .avx2,
+            .evex512,
             .f16c,
             .fma,
         }),
@@ -2192,7 +2175,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -2252,7 +2234,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -2392,7 +2373,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -2485,7 +2465,7 @@ pub const cpu = struct {
             .amx_movrs,
             .amx_tf32,
             .amx_transpose,
-            .avx10_2_512,
+            .avx10_2,
             .avxifma,
             .avxneconvert,
             .avxvnni,
@@ -2601,7 +2581,6 @@ pub const cpu = struct {
             .cx16,
             .enqcmd,
             .ermsb,
-            .evex512,
             .false_deps_getmant,
             .false_deps_mulc,
             .false_deps_mullq,
@@ -2914,7 +2893,6 @@ pub const cpu = struct {
             .cx16,
             .enqcmd,
             .ermsb,
-            .evex512,
             .false_deps_getmant,
             .false_deps_mulc,
             .false_deps_mullq,
@@ -3004,7 +2982,6 @@ pub const cpu = struct {
             .cx16,
             .enqcmd,
             .ermsb,
-            .evex512,
             .false_deps_getmant,
             .false_deps_mulc,
             .false_deps_mullq,
@@ -3167,7 +3144,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3231,7 +3207,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3394,7 +3369,6 @@ pub const cpu = struct {
             .bmi2,
             .cmov,
             .cx16,
-            .evex512,
             .fast_gather,
             .fast_imm16,
             .fast_movbe,
@@ -3436,7 +3410,6 @@ pub const cpu = struct {
             .bmi2,
             .cmov,
             .cx16,
-            .evex512,
             .fast_gather,
             .fast_imm16,
             .fast_movbe,
@@ -4003,7 +3976,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -4104,7 +4076,6 @@ pub const cpu = struct {
             .cx16,
             .enqcmd,
             .ermsb,
-            .evex512,
             .false_deps_getmant,
             .false_deps_mulc,
             .false_deps_mullq,
@@ -4277,7 +4248,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -4390,7 +4360,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -4485,7 +4454,6 @@ pub const cpu = struct {
             .cmov,
             .cx16,
             .ermsb,
-            .evex512,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -4706,7 +4674,6 @@ pub const cpu = struct {
             .bmi2,
             .cmov,
             .cx16,
-            .evex512,
             .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
@@ -4943,7 +4910,6 @@ pub const cpu = struct {
             .clzero,
             .cmov,
             .cx16,
-            .evex512,
             .fast_15bytenop,
             .fast_bextr,
             .fast_dpwssd,
@@ -5017,7 +4983,6 @@ pub const cpu = struct {
             .clzero,
             .cmov,
             .cx16,
-            .evex512,
             .fast_15bytenop,
             .fast_bextr,
             .fast_dpwssd,
lib/std/zig/system/x86.zig
@@ -558,7 +558,6 @@ fn detectNativeFeatures(cpu: *Target.Cpu, os_tag: Target.Os.Tag) void {
             setFeature(cpu, .avxvnniint16, bit(leaf.edx, 10) and has_avx_save);
             setFeature(cpu, .prefetchi, bit(leaf.edx, 14));
             setFeature(cpu, .usermsr, bit(leaf.edx, 15));
-            setFeature(cpu, .avx10_1_256, bit(leaf.edx, 19));
             // APX
             setFeature(cpu, .egpr, bit(leaf.edx, 21));
             setFeature(cpu, .push2pop2, bit(leaf.edx, 21));
@@ -585,7 +584,6 @@ fn detectNativeFeatures(cpu: *Target.Cpu, os_tag: Target.Os.Tag) void {
                 .avxvnniint16,
                 .prefetchi,
                 .usermsr,
-                .avx10_1_256,
                 .egpr,
                 .push2pop2,
                 .ppx,
@@ -668,7 +666,6 @@ fn detectNativeFeatures(cpu: *Target.Cpu, os_tag: Target.Os.Tag) void {
             .avxvnniint16,
             .prefetchi,
             .usermsr,
-            .avx10_1_256,
             .egpr,
             .push2pop2,
             .ppx,
@@ -724,10 +721,10 @@ fn detectNativeFeatures(cpu: *Target.Cpu, os_tag: Target.Os.Tag) void {
     if (max_level >= 0x24) {
         leaf = cpuid(0x24, 0);
 
-        setFeature(cpu, .avx10_1_512, bit(leaf.ebx, 18));
+        setFeature(cpu, .avx10_1, bit(leaf.ebx, 18));
     } else {
         for ([_]Target.x86.Feature{
-            .avx10_1_512,
+            .avx10_1,
         }) |feat| {
             setFeature(cpu, feat, false);
         }
tools/update_cpu_features.zig
@@ -1229,6 +1229,27 @@ const targets = [_]ArchTarget{
                 .llvm_name = "64bit-mode",
                 .omit = true,
             },
+            // Remove these when LLVM removes AVX10.N-256 support.
+            .{
+                .llvm_name = "avx10.1-256",
+                .flatten = true,
+            },
+            .{
+                .llvm_name = "avx10.2-256",
+                .flatten = true,
+            },
+            .{
+                .llvm_name = "avx10.1-512",
+                .zig_name = "avx10_1",
+            },
+            .{
+                .llvm_name = "avx10.2-512",
+                .zig_name = "avx10_2",
+            },
+            .{
+                .llvm_name = "avx512f",
+                .extra_deps = &.{"evex512"},
+            },
             .{
                 .llvm_name = "alderlake",
                 .extra_deps = &.{ "smap", "smep" },