Commit 8f84212855

David Rubin <daviru007@icloud.com>
2024-07-26 23:44:38
riscv: make multi-threaded enabled compilation the default
1 parent c20def7
Changed files (4)
src
test
src/Package/Module.zig
@@ -159,7 +159,7 @@ pub fn create(arena: Allocator, options: CreateOptions) !*Package.Module {
 
         if (options.inherited.single_threaded) |x| break :b x;
         if (options.parent) |p| break :b p.single_threaded;
-        break :b target_util.defaultSingleThreaded(target, zig_backend);
+        break :b target_util.defaultSingleThreaded(target);
     };
 
     const error_tracing = b: {
src/target.zig
@@ -60,10 +60,9 @@ pub fn alwaysSingleThreaded(target: std.Target) bool {
     return false;
 }
 
-pub fn defaultSingleThreaded(target: std.Target, backend: std.builtin.CompilerBackend) bool {
+pub fn defaultSingleThreaded(target: std.Target) bool {
     switch (target.cpu.arch) {
         .wasm32, .wasm64 => return true,
-        .riscv64 => if (backend == .stage2_riscv64) return true,
         else => {},
     }
     switch (target.os.tag) {
test/behavior/if.zig
@@ -118,7 +118,6 @@ test "if peer expressions inferred optional type" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
-    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
 
     var self: []const u8 = "abcdef";
     var index: usize = 0;
test/behavior/null.zig
@@ -53,7 +53,6 @@ test "maybe return" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
-    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
 
     try maybeReturnImpl();
     try comptime maybeReturnImpl();