Commit 870341e32e
Changed files (2)
src
test
behavior
src/Sema.zig
@@ -13575,28 +13575,58 @@ fn zirByteSwap(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Ai
fn zirBitReverse(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Air.Inst.Ref {
const inst_data = sema.code.instructions.items(.data)[inst].un_node;
- const ty_src: LazySrcLoc = .{ .node_offset_builtin_call_arg0 = inst_data.src_node };
const operand_src: LazySrcLoc = .{ .node_offset_builtin_call_arg1 = inst_data.src_node };
const operand = sema.resolveInst(inst_data.operand);
const operand_ty = sema.typeOf(operand);
- // TODO implement support for vectors
- if (operand_ty.zigTypeTag() != .Int) {
- return sema.fail(block, ty_src, "expected integer type, found '{}'", .{
- operand_ty,
- });
- }
+ const scalar_ty = try sema.checkIntOrVectorAllowComptime(block, operand, operand_src);
+
const target = sema.mod.getTarget();
- const bits = operand_ty.intInfo(target).bits;
- if (bits == 0) return Air.Inst.Ref.zero;
+ const bits = scalar_ty.intInfo(target).bits;
+ if (bits == 0) {
+ switch (operand_ty.zigTypeTag()) {
+ .Vector => return sema.addConstant(
+ operand_ty,
+ try Value.Tag.repeated.create(sema.arena, Value.zero),
+ ),
+ .Int => return Air.Inst.Ref.zero,
+ else => unreachable,
+ }
+ }
- const runtime_src = if (try sema.resolveMaybeUndefVal(block, operand_src, operand)) |val| {
- if (val.isUndef()) return sema.addConstUndef(operand_ty);
- const result_val = try val.bitReverse(operand_ty, target, sema.arena);
- return sema.addConstant(operand_ty, result_val);
- } else operand_src;
+ switch (operand_ty.zigTypeTag()) {
+ .Int, .ComptimeInt => {
+ const runtime_src = if (try sema.resolveMaybeUndefVal(block, operand_src, operand)) |val| {
+ if (val.isUndef()) return sema.addConstUndef(operand_ty);
+ const result_val = try val.bitReverse(operand_ty, target, sema.arena);
+ return sema.addConstant(operand_ty, result_val);
+ } else operand_src;
- try sema.requireRuntimeBlock(block, runtime_src);
- return block.addTyOp(.bit_reverse, operand_ty, operand);
+ try sema.requireRuntimeBlock(block, runtime_src);
+ return block.addTyOp(.bit_reverse, operand_ty, operand);
+ },
+ .Vector => {
+ const runtime_src = if (try sema.resolveMaybeUndefVal(block, operand_src, operand)) |val| {
+ if (val.isUndef())
+ return sema.addConstUndef(operand_ty);
+
+ const vec_len = operand_ty.vectorLen();
+ var elem_buf: Value.ElemValueBuffer = undefined;
+ const elems = try sema.arena.alloc(Value, vec_len);
+ for (elems) |*elem, i| {
+ const elem_val = val.elemValueBuffer(i, &elem_buf);
+ elem.* = try elem_val.bitReverse(operand_ty, target, sema.arena);
+ }
+ return sema.addConstant(
+ operand_ty,
+ try Value.Tag.aggregate.create(sema.arena, elems),
+ );
+ } else operand_src;
+
+ try sema.requireRuntimeBlock(block, runtime_src);
+ return block.addTyOp(.bit_reverse, operand_ty, operand);
+ },
+ else => unreachable,
+ }
}
fn zirBitOffsetOf(sema: *Sema, block: *Block, inst: Zir.Inst.Index) CompileError!Air.Inst.Ref {
test/behavior/bitreverse.zig
@@ -87,3 +87,79 @@ fn testBitReverse() !void {
var neg32: i32 = -16773785;
try expect(@bitReverse(i32, @as(i32, -16773785)) == @bitReverse(i32, neg32));
}
+
+fn vector8() !void {
+ var v = @Vector(2, u8){ 0x12, 0x23 };
+ var result = @bitReverse(u8, v);
+ try expect(result[0] == 0x48);
+ try expect(result[1] == 0xc4);
+}
+
+test "bitReverse vectors u8" {
+ if (builtin.zig_backend == .stage1) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+
+ comptime try vector8();
+ try vector8();
+}
+
+fn vector16() !void {
+ var v = @Vector(2, u16){ 0x1234, 0x2345 };
+ var result = @bitReverse(u16, v);
+ try expect(result[0] == 0x2c48);
+ try expect(result[1] == 0xa2c4);
+}
+
+test "bitReverse vectors u16" {
+ if (builtin.zig_backend == .stage1) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+
+ comptime try vector16();
+ try vector16();
+}
+
+fn vector24() !void {
+ var v = @Vector(2, u24){ 0x123456, 0x234567 };
+ var result = @bitReverse(u24, v);
+ try expect(result[0] == 0x6a2c48);
+ try expect(result[1] == 0xe6a2c4);
+}
+
+test "bitReverse vectors u24" {
+ if (builtin.zig_backend == .stage1) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+
+ comptime try vector24();
+ try vector24();
+}
+
+fn vector0() !void {
+ var v = @Vector(2, u0){ 0, 0 };
+ var result = @bitReverse(u0, v);
+ try expect(result[0] == 0);
+ try expect(result[1] == 0);
+}
+
+test "bitReverse vectors u0" {
+ if (builtin.zig_backend == .stage1) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+
+ comptime try vector0();
+ try vector0();
+}