Commit 86c4c33d2c

@@ -1422,3 +1422,166 @@ pub const Strtab = struct {
         return mem.sliceTo(@as([*:0]const u8, @ptrCast(self.buffer.ptr + off)), 0);
     }
 };
+
+pub const ImportHeader = extern struct {
+    sig1: MachineType,
+    sig2: u16,
+    version: u16,
+    machine: MachineType,
+    time_date_stamp: u32,
+    size_of_data: u32,
+    hint: u16,
+    types: packed struct {
+        type: ImportType,
+        name_type: ImportNameType,
+        reserved: u11,
+    },
+};
+
+pub const ImportType = enum(u2) {
+    /// Executable code.
+    CODE = 0,
+    /// Data.
+    DATA = 1,
+    /// Specified as CONST in .def file.
+    CONST = 2,
+    _,
+};
+
+pub const ImportNameType = enum(u3) {
+    /// The import is by ordinal. This indicates that the value in the Ordinal/Hint
+    /// field of the import header is the import's ordinal. If this constant is not
+    /// specified, then the Ordinal/Hint field should always be interpreted as the import's hint.
+    ORDINAL = 0,
+    /// The import name is identical to the public symbol name.
+    NAME = 1,
+    /// The import name is the public symbol name, but skipping the leading ?, @, or optionally _.
+    NAME_NOPREFIX = 2,
+    /// The import name is the public symbol name, but skipping the leading ?, @, or optionally _,
+    /// and truncating at the first @.
+    NAME_UNDECORATE = 3,
+    _,
+};
+
+pub const Relocation = extern struct {
+    virtual_address: u32,
+    symbol_table_index: u32,
+    type: u16,
+};
+
+pub const ImageRelAmd64 = enum(u16) {
+    /// The relocation is ignored.
+    absolute = 0,
+
+    /// The 64-bit VA of the relocation target.
+    addr64 = 1,
+
+    /// The 32-bit VA of the relocation target.
+    addr32 = 2,
+
+    /// The 32-bit address without an image base.
+    addr32nb = 3,
+
+    /// The 32-bit relative address from the byte following the relocation.
+    rel32 = 4,
+
+    /// The 32-bit address relative to byte distance 1 from the relocation.
+    rel32_1 = 5,
+
+    /// The 32-bit address relative to byte distance 2 from the relocation.
+    rel32_2 = 6,
+
+    /// The 32-bit address relative to byte distance 3 from the relocation.
+    rel32_3 = 7,
+
+    /// The 32-bit address relative to byte distance 4 from the relocation.
+    rel32_4 = 8,
+
+    /// The 32-bit address relative to byte distance 5 from the relocation.
+    rel32_5 = 9,
+
+    /// The 16-bit section index of the section that contains the target.
+    /// This is used to support debugging information.
+    section = 10,
+
+    /// The 32-bit offset of the target from the beginning of its section.
+    /// This is used to support debugging information and static thread local storage.
+    secrel = 11,
+
+    /// A 7-bit unsigned offset from the base of the section that contains the target.
+    secrel7 = 12,
+
+    /// CLR tokens.
+    token = 13,
+
+    /// A 32-bit signed span-dependent value emitted into the object.
+    srel32 = 14,
+
+    /// A pair that must immediately follow every span-dependent value.
+    pair = 15,
+
+    /// A 32-bit signed span-dependent value that is applied at link time.
+    sspan32 = 16,
+
+    _,
+};
+
+pub const ImageRelArm64 = enum(u16) {
+    /// The relocation is ignored.
+    absolute = 0,
+
+    /// The 32-bit VA of the target.
+    addr32 = 1,
+
+    /// The 32-bit RVA of the target.
+    addr32nb = 2,
+
+    /// The 26-bit relative displacement to the target, for B and BL instructions.
+    branch26 = 3,
+
+    /// The page base of the target, for ADRP instruction.
+    pagebase_rel21 = 4,
+
+    /// The 21-bit relative displacement to the target, for instruction ADR.
+    rel21 = 5,
+
+    /// The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) with zero shift.
+    pageoffset_12a = 6,
+
+    /// The 12-bit page offset of the target, for instruction LDR (indexed, unsigned immediate).
+    pageoffset_12l = 7,
+
+    /// The 32-bit offset of the target from the beginning of its section.
+    /// This is used to support debugging information and static thread local storage.
+    secrel = 8,
+
+    /// Bit 0:11 of section offset of the target for instructions ADD/ADDS (immediate) with zero shift.
+    low12a = 9,
+
+    /// Bit 12:23 of section offset of the target, for instructions ADD/ADDS (immediate) with zero shift.
+    high12a = 10,
+
+    /// Bit 0:11 of section offset of the target, for instruction LDR (indexed, unsigned immediate).
+    low12l = 11,
+
+    /// CLR token.
+    token = 12,
+
+    /// The 16-bit section index of the section that contains the target.
+    /// This is used to support debugging information.
+    section = 13,
+
+    /// The 64-bit VA of the relocation target.
+    addr64 = 14,
+
+    /// The 19-bit offset to the relocation target, for conditional B instruction.
+    branch19 = 15,
+
+    /// The 14-bit offset to the relocation target, for instructions TBZ and TBNZ.
+    branch14 = 16,
+
+    /// The 32-bit relative address from the byte following the relocation.
+    rel32 = 17,
+
+    _,
+};