Commit `71ec89383b`

d18g <gootvilig.davidhai@gmail.com>

2021-06-17 22:37:38

Fix `lakemont` CpuModel (#9099)

Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend. Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19. (Commit message by @LemonBoy)

1 parent 4adbdcb

Changed files (2)

lib

std

target

x86.zig

tools

update_cpu_features.zig

@@ -2241,6 +2241,7 @@ pub const cpu = struct {
             .cx8,
             .slow_unaligned_mem_16,
             .vzeroupper,
+            .soft_float,
         }),
     };
     pub const nehalem = CpuModel{

@@ -754,6 +754,10 @@ const llvm_targets = [_]LlvmTarget{
                 .llvm_name = "i686",
                 .zig_name = "_i686",
             },
+            .{
+                .llvm_name = "lakemont",
+                .extra_deps = &.{"soft_float"},
+            },
         },
     },
     .{

Commit 71ec89383b

Commit `71ec89383b`