Commit 6880d2c4a3
Changed files (1)
test
behavior
test/behavior/prefetch.zig
@@ -3,6 +3,7 @@ const std = @import("std");
test "@prefetch()" {
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
+ if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isLoongArch()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/134624
var a: [2]u32 = .{ 42, 42 };
var a_len = a.len;