Commit 6576c3b898
Changed files (1)
src
codegen
x86_64
src/codegen/x86_64/CodeGen.zig
@@ -180028,6 +180028,8 @@ fn airAggregateInitBoolVec(self: *CodeGen, inst: Air.Inst.Index) !void {
{
const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
defer self.register_manager.unlockReg(dst_lock);
+
+ try self.spillEflagsIfOccupied();
try self.asmRegisterRegister(
.{ ._, .xor },
registerAlias(dst_reg, @min(result_size, 4)),