Commit 653eb75355

@@ -272,21 +272,27 @@ fn _start() callconv(.Naked) noreturn {
             \\ bstrins.d $sp, $zero, 3, 0
             \\ b %[posixCallMainAndExit]
             ,
+            // zig fmt: off
             .riscv32, .riscv64 =>
-            // The RISC-V ELF ABI assumes that `gp` is set to the value of `__global_pointer$` at
-            // startup in order for GP relaxation to work, even in static builds.
-            \\ .weak __global_pointer$
-            \\ .hidden __global_pointer$
-            \\ .option push
-            \\ .option norelax
-            \\ lla gp, __global_pointer$
-            \\ .option pop
+            // The self-hosted riscv64 backend is not able to assemble this yet.
+            if (builtin.zig_backend != .stage2_riscv64)
+                // The RISC-V ELF ABI assumes that `gp` is set to the value of `__global_pointer$` at
+                // startup in order for GP relaxation to work, even in static builds.
+                \\ .weak __global_pointer$
+                \\ .hidden __global_pointer$
+                \\ .option push
+                \\ .option norelax
+                \\ lla gp, __global_pointer$
+                \\ .option pop
+            else ""
+            ++
             \\ li s0, 0
             \\ li ra, 0
             \\ mv a0, sp
             \\ andi sp, sp, -16
             \\ tail %[posixCallMainAndExit]@plt
             ,
+            // zig fmt: off
             .m68k =>
             // Note that the - 8 is needed because pc in the jsr instruction points into the middle
             // of the jsr instruction. (The lea is 6 bytes, the jsr is 4 bytes.)