Commit 63a9048baf

@@ -1,15 +0,0 @@
-#ifndef _BITS_ENDIANNESS_H
-#define _BITS_ENDIANNESS_H 1
-
-#ifndef _BITS_ENDIAN_H
-# error "Never use <bits/endianness.h> directly; include <endian.h> instead."
-#endif
-
-/* AArch64 has selectable endianness.  */
-#ifdef __AARCH64EB__
-# define __BYTE_ORDER __BIG_ENDIAN
-#else
-# define __BYTE_ORDER __LITTLE_ENDIAN
-#endif
-
-#endif /* bits/endianness.h */
\ No newline at end of file

@@ -1,61 +0,0 @@
-/* O_*, F_*, FD_* bit values for the AArch64 Linux ABI.
-   Copyright (C) 2011-2025 Free Software Foundation, Inc.
-
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library.  If not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef	_FCNTL_H
-# error "Never use <bits/fcntl.h> directly; include <fcntl.h> instead."
-#endif
-
-#define __O_DIRECTORY	 040000
-#define __O_NOFOLLOW	0100000
-#define __O_DIRECT	0200000
-
-#ifdef __ILP32__
-# define __O_LARGEFILE	0400000
-#else
-# define __O_LARGEFILE	0
-#endif
-
-#ifdef __LP64__
-# define F_GETLK64	5
-# define F_SETLK64	6
-# define F_SETLKW64	7
-#endif
-
-struct flock
-  {
-    short int l_type;	/* Type of lock: F_RDLCK, F_WRLCK, or F_UNLCK.	*/
-    short int l_whence;	/* Where `l_start' is relative to (like `lseek').  */
-    __off_t l_start;	/* Offset where the lock begins.  */
-    __off_t l_len;	/* Size of the locked area; zero means until EOF.  */
-    __pid_t l_pid;	/* Process holding the lock.  */
-  };
-
-#ifdef __USE_LARGEFILE64
-struct flock64
-  {
-    short int l_type;	/* Type of lock: F_RDLCK, F_WRLCK, or F_UNLCK.	*/
-    short int l_whence;	/* Where `l_start' is relative to (like `lseek').  */
-    __off64_t l_start;	/* Offset where the lock begins.  */
-    __off64_t l_len;	/* Size of the locked area; zero means until EOF.  */
-    __pid_t l_pid;	/* Process holding the lock.  */
-  };
-#endif
-
-/* Include generic Linux declarations.  */
-#include <bits/fcntl-linux.h>
\ No newline at end of file

@@ -1,82 +0,0 @@
-/* Copyright (C) 2004-2025 Free Software Foundation, Inc.
-
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public License as
-   published by the Free Software Foundation; either version 2.1 of the
-   License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef _FENV_H
-# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
-#endif
-
-/* Define bits representing exceptions in the FPSR status word.  */
-enum
-  {
-    FE_INVALID =
-#define FE_INVALID	1
-      FE_INVALID,
-    FE_DIVBYZERO =
-#define FE_DIVBYZERO	2
-      FE_DIVBYZERO,
-    FE_OVERFLOW =
-#define FE_OVERFLOW	4
-      FE_OVERFLOW,
-    FE_UNDERFLOW =
-#define FE_UNDERFLOW	8
-      FE_UNDERFLOW,
-    FE_INEXACT =
-#define FE_INEXACT	16
-      FE_INEXACT,
-  };
-
-/* Amount to shift by to convert an exception bit in FPSR to a an
-   exception bit mask in FPCR.  */
-#define FE_EXCEPT_SHIFT	8
-
-/* All supported exceptions.  */
-#define FE_ALL_EXCEPT	\
-	(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
-
-/* Define bits representing rounding modes in the FPCR Rmode field.  */
-#define FE_TONEAREST  0x000000
-#define FE_UPWARD     0x400000
-#define FE_DOWNWARD   0x800000
-#define FE_TOWARDZERO 0xc00000
-
-/* Type representing exception flags. */
-typedef unsigned int fexcept_t;
-
-/* Type representing floating-point environment.  */
-typedef struct
-  {
-    unsigned int __fpcr;
-    unsigned int __fpsr;
-  }
-fenv_t;
-
-/* If the default argument is used we use this value.  */
-#define FE_DFL_ENV	((const fenv_t *) -1l)
-
-#ifdef __USE_GNU
-/* Floating-point environment where none of the exceptions are masked.  */
-# define FE_NOMASK_ENV  ((const fenv_t *) -2)
-#endif
-
-#if __GLIBC_USE (IEC_60559_BFP_EXT_C23)
-/* Type representing floating-point control modes.  */
-typedef unsigned int femode_t;
-
-/* Default floating-point control modes.  */
-# define FE_DFL_MODE	((const femode_t *) -1L)
-#endif
\ No newline at end of file

@@ -1,34 +0,0 @@
-/* Define FP_FAST_* macros.  AArch64 version.
-   Copyright (C) 2016-2025 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef _MATH_H
-# error "Never use <bits/fp-fast.h> directly; include <math.h> instead."
-#endif
-
-#ifdef __USE_ISOC99
-
-/* The GCC 4.6 compiler will define __FP_FAST_FMA{,F,L} if the fma{,f,l}
-   builtins are supported.  */
-# define FP_FAST_FMA 1
-# define FP_FAST_FMAF 1
-
-# ifdef __FP_FAST_FMAL
-#  define FP_FAST_FMAL 1
-# endif
-
-#endif
\ No newline at end of file

@@ -1,122 +0,0 @@
-/* Defines for bits in AT_HWCAP.  AArch64 Linux version.
-   Copyright (C) 2016-2025 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#if !defined (_SYS_AUXV_H)
-# error "Never include <bits/hwcap.h> directly; use <sys/auxv.h> instead."
-#endif
-
-/* The following must match the kernel's <asm/hwcap.h> and update the
-   list together with sysdeps/unix/sysv/linux/aarch64/dl-procinfo.c.  */
-#define HWCAP_FP		(1 << 0)
-#define HWCAP_ASIMD		(1 << 1)
-#define HWCAP_EVTSTRM		(1 << 2)
-#define HWCAP_AES		(1 << 3)
-#define HWCAP_PMULL		(1 << 4)
-#define HWCAP_SHA1		(1 << 5)
-#define HWCAP_SHA2		(1 << 6)
-#define HWCAP_CRC32		(1 << 7)
-#define HWCAP_ATOMICS		(1 << 8)
-#define HWCAP_FPHP		(1 << 9)
-#define HWCAP_ASIMDHP		(1 << 10)
-#define HWCAP_CPUID		(1 << 11)
-#define HWCAP_ASIMDRDM		(1 << 12)
-#define HWCAP_JSCVT		(1 << 13)
-#define HWCAP_FCMA		(1 << 14)
-#define HWCAP_LRCPC		(1 << 15)
-#define HWCAP_DCPOP		(1 << 16)
-#define HWCAP_SHA3		(1 << 17)
-#define HWCAP_SM3		(1 << 18)
-#define HWCAP_SM4		(1 << 19)
-#define HWCAP_ASIMDDP		(1 << 20)
-#define HWCAP_SHA512		(1 << 21)
-#define HWCAP_SVE		(1 << 22)
-#define HWCAP_ASIMDFHM		(1 << 23)
-#define HWCAP_DIT		(1 << 24)
-#define HWCAP_USCAT		(1 << 25)
-#define HWCAP_ILRCPC		(1 << 26)
-#define HWCAP_FLAGM		(1 << 27)
-#define HWCAP_SSBS		(1 << 28)
-#define HWCAP_SB		(1 << 29)
-#define HWCAP_PACA		(1 << 30)
-#define HWCAP_PACG		(1UL << 31)
-#define HWCAP_GCS		(1UL << 32)
-
-#define HWCAP2_DCPODP		(1 << 0)
-#define HWCAP2_SVE2		(1 << 1)
-#define HWCAP2_SVEAES		(1 << 2)
-#define HWCAP2_SVEPMULL		(1 << 3)
-#define HWCAP2_SVEBITPERM	(1 << 4)
-#define HWCAP2_SVESHA3		(1 << 5)
-#define HWCAP2_SVESM4		(1 << 6)
-#define HWCAP2_FLAGM2		(1 << 7)
-#define HWCAP2_FRINT		(1 << 8)
-#define HWCAP2_SVEI8MM		(1 << 9)
-#define HWCAP2_SVEF32MM		(1 << 10)
-#define HWCAP2_SVEF64MM		(1 << 11)
-#define HWCAP2_SVEBF16		(1 << 12)
-#define HWCAP2_I8MM		(1 << 13)
-#define HWCAP2_BF16		(1 << 14)
-#define HWCAP2_DGH		(1 << 15)
-#define HWCAP2_RNG		(1 << 16)
-#define HWCAP2_BTI		(1 << 17)
-#define HWCAP2_MTE		(1 << 18)
-#define HWCAP2_ECV		(1 << 19)
-#define HWCAP2_AFP		(1 << 20)
-#define HWCAP2_RPRES		(1 << 21)
-#define HWCAP2_MTE3		(1 << 22)
-#define HWCAP2_SME		(1 << 23)
-#define HWCAP2_SME_I16I64	(1 << 24)
-#define HWCAP2_SME_F64F64	(1 << 25)
-#define HWCAP2_SME_I8I32	(1 << 26)
-#define HWCAP2_SME_F16F32	(1 << 27)
-#define HWCAP2_SME_B16F32	(1 << 28)
-#define HWCAP2_SME_F32F32	(1 << 29)
-#define HWCAP2_SME_FA64		(1 << 30)
-#define HWCAP2_WFXT		(1UL << 31)
-#define HWCAP2_EBF16		(1UL << 32)
-#define HWCAP2_SVE_EBF16	(1UL << 33)
-#define HWCAP2_CSSC		(1UL << 34)
-#define HWCAP2_RPRFM		(1UL << 35)
-#define HWCAP2_SVE2P1		(1UL << 36)
-#define HWCAP2_SME2		(1UL << 37)
-#define HWCAP2_SME2P1		(1UL << 38)
-#define HWCAP2_SME_I16I32	(1UL << 39)
-#define HWCAP2_SME_BI32I32	(1UL << 40)
-#define HWCAP2_SME_B16B16	(1UL << 41)
-#define HWCAP2_SME_F16F16	(1UL << 42)
-#define HWCAP2_MOPS		(1UL << 43)
-#define HWCAP2_HBC		(1UL << 44)
-#define HWCAP2_SVE_B16B16	(1UL << 45)
-#define HWCAP2_LRCPC3		(1UL << 46)
-#define HWCAP2_LSE128		(1UL << 47)
-#define HWCAP2_FPMR		(1UL << 48)
-#define HWCAP2_LUT		(1UL << 49)
-#define HWCAP2_FAMINMAX		(1UL << 50)
-#define HWCAP2_F8CVT		(1UL << 51)
-#define HWCAP2_F8FMA		(1UL << 52)
-#define HWCAP2_F8DP4		(1UL << 53)
-#define HWCAP2_F8DP2		(1UL << 54)
-#define HWCAP2_F8E4M3		(1UL << 55)
-#define HWCAP2_F8E5M2		(1UL << 56)
-#define HWCAP2_SME_LUTV2	(1UL << 57)
-#define HWCAP2_SME_F8F16	(1UL << 58)
-#define HWCAP2_SME_F8F32	(1UL << 59)
-#define HWCAP2_SME_SF8FMA	(1UL << 60)
-#define HWCAP2_SME_SF8DP4	(1UL << 61)
-#define HWCAP2_SME_SF8DP2	(1UL << 62)
-#define HWCAP2_POE		(1UL << 63)
\ No newline at end of file

@@ -1,36 +0,0 @@
-/* Definition of __INDIRECT_RETURN.  AArch64 version.
-   Copyright (C) 2024-2025 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef _UCONTEXT_H
-# error "Never include <bits/indirect-return.h> directly; use <ucontext.h> instead."
-#endif
-
-/* __INDIRECT_RETURN indicates that swapcontext may return via
-   an indirect branch.  This happens when GCS is enabled, so
-   add the attribute if available, otherwise returns_twice has
-   a similar effect, but it prevents some code transformations
-   that can cause build failures in some rare cases so it is
-   only used when GCS is enabled.  */
-#if __glibc_has_attribute (__indirect_return__)
-# define __INDIRECT_RETURN __attribute__ ((__indirect_return__))
-#elif __glibc_has_attribute (__returns_twice__) \
-      && defined __ARM_FEATURE_GCS_DEFAULT
-# define __INDIRECT_RETURN __attribute__ ((__returns_twice__))
-#else
-# define __INDIRECT_RETURN
-#endif
\ No newline at end of file

@@ -1,68 +0,0 @@
-/* Copyright (C) 2005-2025 Free Software Foundation, Inc.
-
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public License as
-   published by the Free Software Foundation; either version 2.1 of the
-   License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef	_LINK_H
-# error "Never include <bits/link.h> directly; use <link.h> instead."
-#endif
-
-typedef union
-{
-  float s;
-  double d;
-  long double q;
-} La_aarch64_vector;
-
-/* Registers for entry into PLT on AArch64.  */
-typedef struct La_aarch64_regs
-{
-  uint64_t          lr_xreg[9];
-  La_aarch64_vector lr_vreg[8];
-  uint64_t          lr_sp;
-  uint64_t          lr_lr;
-  void              *lr_vpcs;
-} La_aarch64_regs;
-
-/* Return values for calls from PLT on AArch64.  */
-typedef struct La_aarch64_retval
-{
-  /* Up to eight integer registers can be used for a return value.  */
-  uint64_t          lrv_xreg[8];
-  /* Up to eight V registers can be used for a return value.  */
-  La_aarch64_vector lrv_vreg[8];
-  void              *lrv_vpcs;
-} La_aarch64_retval;
-__BEGIN_DECLS
-
-extern ElfW(Addr)
-la_aarch64_gnu_pltenter (ElfW(Sym) *__sym, unsigned int __ndx,
-			 uintptr_t *__refcook,
-			 uintptr_t *__defcook,
-			 La_aarch64_regs *__regs,
-			 unsigned int *__flags,
-			 const char *__symname,
-			 long int *__framesizep);
-
-extern unsigned int
-la_aarch64_gnu_pltexit (ElfW(Sym) *__sym, unsigned int __ndx,
-			uintptr_t *__refcook,
-			uintptr_t *__defcook,
-			const La_aarch64_regs *__inregs,
-			La_aarch64_retval *__outregs,
-			const char *__symname);
-
-__END_DECLS
\ No newline at end of file

@@ -1,308 +0,0 @@
-/* Platform-specific SIMD declarations of math functions.
-
-   Copyright (C) 2023-2025 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <https://www.gnu.org/licenses/>.  */
-
-#ifndef _MATH_H
-#  error "Never include <bits/math-vector.h> directly;\
- include <math.h> instead."
-#endif
-
-/* Get default empty definitions for simd declarations.  */
-#include <bits/libm-simd-decl-stubs.h>
-
-#if defined __aarch64__ && defined __FAST_MATH__ && __GNUC_PREREQ (6, 0)
-/* Requires GCC >= 6 for __attribute__ ((__simd__)).  */
-# define __DECL_SIMD_aarch64 __attribute__ ((__simd__ ("notinbranch"), const))
-
-# undef __DECL_SIMD_acos
-# define __DECL_SIMD_acos __DECL_SIMD_aarch64
-# undef __DECL_SIMD_acosf
-# define __DECL_SIMD_acosf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_acosh
-# define __DECL_SIMD_acosh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_acoshf
-# define __DECL_SIMD_acoshf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_asin
-# define __DECL_SIMD_asin __DECL_SIMD_aarch64
-# undef __DECL_SIMD_asinf
-# define __DECL_SIMD_asinf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_asinh
-# define __DECL_SIMD_asinh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_asinhf
-# define __DECL_SIMD_asinhf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atan
-# define __DECL_SIMD_atan __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atanf
-# define __DECL_SIMD_atanf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atanh
-# define __DECL_SIMD_atanh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atanhf
-# define __DECL_SIMD_atanhf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atan2
-# define __DECL_SIMD_atan2 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_atan2f
-# define __DECL_SIMD_atan2f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cbrt
-# define __DECL_SIMD_cbrt __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cbrtf
-# define __DECL_SIMD_cbrtf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cos
-# define __DECL_SIMD_cos __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cosf
-# define __DECL_SIMD_cosf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cosh
-# define __DECL_SIMD_cosh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_coshf
-# define __DECL_SIMD_coshf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cospi
-# define __DECL_SIMD_cospi __DECL_SIMD_aarch64
-# undef __DECL_SIMD_cospif
-# define __DECL_SIMD_cospif __DECL_SIMD_aarch64
-# undef __DECL_SIMD_erf
-# define __DECL_SIMD_erf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_erff
-# define __DECL_SIMD_erff __DECL_SIMD_aarch64
-# undef __DECL_SIMD_erfc
-# define __DECL_SIMD_erfc __DECL_SIMD_aarch64
-# undef __DECL_SIMD_erfcf
-# define __DECL_SIMD_erfcf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_exp
-# define __DECL_SIMD_exp __DECL_SIMD_aarch64
-# undef __DECL_SIMD_expf
-# define __DECL_SIMD_expf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_exp10
-# define __DECL_SIMD_exp10 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_exp10f
-# define __DECL_SIMD_exp10f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_exp2
-# define __DECL_SIMD_exp2 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_exp2f
-# define __DECL_SIMD_exp2f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_expm1
-# define __DECL_SIMD_expm1 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_expm1f
-# define __DECL_SIMD_expm1f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_hypot
-# define __DECL_SIMD_hypot __DECL_SIMD_aarch64
-# undef __DECL_SIMD_hypotf
-# define __DECL_SIMD_hypotf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log
-# define __DECL_SIMD_log __DECL_SIMD_aarch64
-# undef __DECL_SIMD_logf
-# define __DECL_SIMD_logf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log10
-# define __DECL_SIMD_log10 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log10f
-# define __DECL_SIMD_log10f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log1p
-# define __DECL_SIMD_log1p __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log1pf
-# define __DECL_SIMD_log1pf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log2
-# define __DECL_SIMD_log2 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_log2f
-# define __DECL_SIMD_log2f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_logp1
-# define __DECL_SIMD_logp1 __DECL_SIMD_aarch64
-# undef __DECL_SIMD_logp1f
-# define __DECL_SIMD_logp1f __DECL_SIMD_aarch64
-# undef __DECL_SIMD_pow
-# define __DECL_SIMD_pow __DECL_SIMD_aarch64
-# undef __DECL_SIMD_powf
-# define __DECL_SIMD_powf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sin
-# define __DECL_SIMD_sin __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sinf
-# define __DECL_SIMD_sinf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sinh
-# define __DECL_SIMD_sinh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sinhf
-# define __DECL_SIMD_sinhf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sinpi
-# define __DECL_SIMD_sinpi __DECL_SIMD_aarch64
-# undef __DECL_SIMD_sinpif
-# define __DECL_SIMD_sinpif __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tan
-# define __DECL_SIMD_tan __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tanf
-# define __DECL_SIMD_tanf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tanh
-# define __DECL_SIMD_tanh __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tanhf
-# define __DECL_SIMD_tanhf __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tanpi
-# define __DECL_SIMD_tanpi __DECL_SIMD_aarch64
-# undef __DECL_SIMD_tanpif
-# define __DECL_SIMD_tanpif __DECL_SIMD_aarch64
-#endif
-
-#if __GNUC_PREREQ(9, 0)
-#  define __ADVSIMD_VEC_MATH_SUPPORTED
-typedef __Float32x4_t __f32x4_t;
-typedef __Float64x2_t __f64x2_t;
-#elif __glibc_clang_prereq(8, 0)
-#  define __ADVSIMD_VEC_MATH_SUPPORTED
-typedef __attribute__ ((__neon_vector_type__ (4))) float __f32x4_t;
-typedef __attribute__ ((__neon_vector_type__ (2))) double __f64x2_t;
-#endif
-
-#if __GNUC_PREREQ(10, 0) || __glibc_clang_prereq(11, 0)
-#  define __SVE_VEC_MATH_SUPPORTED
-typedef __SVFloat32_t __sv_f32_t;
-typedef __SVFloat64_t __sv_f64_t;
-typedef __SVBool_t __sv_bool_t;
-#endif
-
-/* If vector types and vector PCS are unsupported in the working
-   compiler, no choice but to omit vector math declarations.  */
-
-#ifdef __ADVSIMD_VEC_MATH_SUPPORTED
-
-#  define __vpcs __attribute__ ((__aarch64_vector_pcs__))
-
-__vpcs __f32x4_t _ZGVnN4vv_atan2f (__f32x4_t, __f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_acosf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_acoshf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_asinf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_asinhf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_atanf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_atanhf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_cbrtf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_coshf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_cospif (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_erff (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_erfcf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_exp10f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_exp2f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_expm1f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4vv_hypotf (__f32x4_t, __f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_logf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_log10f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_log1pf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_log2f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_logp1f (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4vv_powf (__f32x4_t, __f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_sinhf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_sinpif (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_tanf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_tanhf (__f32x4_t);
-__vpcs __f32x4_t _ZGVnN4v_tanpif (__f32x4_t);
-
-__vpcs __f64x2_t _ZGVnN2vv_atan2 (__f64x2_t, __f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_acos (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_acosh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_asin (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_asinh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_atan (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_atanh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_cbrt (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_cos (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_cosh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_cospi (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_erf (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_erfc (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_exp10 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_exp2 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_expm1 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2vv_hypot (__f64x2_t, __f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_log10 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_log1p (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_log2 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_logp1 (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2vv_pow (__f64x2_t, __f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_sinh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_sinpi (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_tan (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_tanh (__f64x2_t);
-__vpcs __f64x2_t _ZGVnN2v_tanpi (__f64x2_t);
-
-#  undef __ADVSIMD_VEC_MATH_SUPPORTED
-#endif /* __ADVSIMD_VEC_MATH_SUPPORTED */
-
-#ifdef __SVE_VEC_MATH_SUPPORTED
-
-__sv_f32_t _ZGVsMxvv_atan2f (__sv_f32_t, __sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_acosf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_acoshf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_asinf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_asinhf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_atanf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_atanhf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_cbrtf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_cosf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_coshf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_cospif (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_erff (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_erfcf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_expf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_exp10f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_exp2f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_expm1f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxvv_hypotf (__sv_f32_t, __sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_logf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_log10f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_log1pf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_log2f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_logp1f (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxvv_powf (__sv_f32_t, __sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_sinf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_sinhf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_sinpif (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_tanf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_tanhf (__sv_f32_t, __sv_bool_t);
-__sv_f32_t _ZGVsMxv_tanpif (__sv_f32_t, __sv_bool_t);
-
-__sv_f64_t _ZGVsMxvv_atan2 (__sv_f64_t, __sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_acos (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_acosh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_asin (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_asinh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_atan (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_atanh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_cbrt (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_cos (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_cosh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_cospi (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_erf (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_erfc (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_exp (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_exp10 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_exp2 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_expm1 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxvv_hypot (__sv_f64_t, __sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_log (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_log10 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_log1p (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_log2 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_logp1 (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxvv_pow (__sv_f64_t, __sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_sin (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_sinh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_sinpi (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_tan (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_tanh (__sv_f64_t, __sv_bool_t);
-__sv_f64_t _ZGVsMxv_tanpi (__sv_f64_t, __sv_bool_t);
-
-#  undef __SVE_VEC_MATH_SUPPORTED
-#endif /* __SVE_VEC_MATH_SUPPORTED */
\ No newline at end of file