Commit 604e87a958

Alex Rønne Petersen <alex@alexrp.com>
2024-07-26 03:14:32
std.Target: Use hexagonv60 as the baseline CPU model for hexagon.
master
1 parent 9c22a6b
Changed files (1)
lib
std
Target.zig
lib/std/Target.zig
@@ -1512,6 +1512,7 @@ pub const Cpu = struct {
         pub fn baseline(arch: Arch) *const Model {
             return switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
+                .hexagon => &hexagon.cpu.hexagonv60,
                 .riscv32 => &riscv.cpu.baseline_rv32,
                 .riscv64 => &riscv.cpu.baseline_rv64,
                 .x86 => &x86.cpu.pentium4,