Commit 5c8612642b

Koakuma <koachan@protonmail.com>
2022-06-12 19:27:51
stage2: sparc64: Use official encoding for `not rs2, rs1`
1 parent e7fde5f
Changed files (2)
src
arch
src/arch/sparc64/Emit.zig
@@ -203,7 +203,7 @@ fn mirArithmetic2Op(emit: *Emit, inst: Mir.Inst.Index) !void {
             .@"return" => try emit.writeInstruction(Instruction.@"return"(Register, rs1, rs2)),
             .cmp => try emit.writeInstruction(Instruction.subcc(Register, rs1, rs2, .g0)),
             .mov => try emit.writeInstruction(Instruction.@"or"(Register, .g0, rs2, rs1)),
-            .not => try emit.writeInstruction(Instruction.xnor(Register, .g0, rs2, rs1)),
+            .not => try emit.writeInstruction(Instruction.xnor(Register, rs2, .g0, rs1)),
             else => unreachable,
         }
     }
src/arch/sparc64/Mir.zig
@@ -158,8 +158,9 @@ pub const Inst = struct {
         /// This uses the arithmetic_2op field, with rs1
         /// being the *destination* register.
         // TODO is it okay to abuse rs1 in this way?
-        // TODO this differs from official encoding for convenience, fix it later
-        not, // not rs2/imm, rs1 -> xnor %g0, rs2/imm, rs1
+        // not rs2, rs1 -> xnor rs2, %g0, rs1
+        // not imm, rs1 -> xnor %g0, imm, rs1
+        not,
     };
 
     /// The position of an MIR instruction within the `Mir` instructions array.