Commit 548ef78070
Changed files (5)
src/stage1/all_types.hpp
@@ -114,17 +114,12 @@ struct Stage1Zir {
ZigList<IrBasicBlockSrc *> basic_block_list;
Buf *name;
ZigFn *name_fn;
- AstNode *source_node;
Scope *begin_scope;
ErrorMsg *first_err_trace_msg;
ZigList<Tld *> tld_list;
bool is_inline;
bool need_err_code_spill;
-
- // This is a function for use in the debugger to print
- // the source location.
- void src();
};
struct Stage1Air {
@@ -1638,7 +1633,7 @@ struct ZigFn {
// in the case of async functions this is the implicit return type according to the
// zig source code, not according to zig ir
ZigType *src_implicit_return_type;
- Stage1Zir *ir_executable;
+ Stage1Zir *stage1_zir;
Stage1Air analyzed_executable;
size_t branch_quota;
AstNode **param_source_nodes;
src/stage1/analyze.cpp
@@ -3653,7 +3653,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i
static ZigFn *create_fn_raw(CodeGen *g, bool is_noinline) {
ZigFn *fn_entry = heap::c_allocator.create<ZigFn>();
- fn_entry->ir_executable = heap::c_allocator.create<Stage1Zir>();
+ fn_entry->stage1_zir = heap::c_allocator.create<Stage1Zir>();
fn_entry->is_noinline = is_noinline;
return fn_entry;
@@ -5129,7 +5129,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
}
size_t backward_branch_count = 0;
size_t backward_branch_quota = max(fn->branch_quota, default_backward_branch_quota);
- ZigType *block_return_type = ir_analyze(g, fn->ir_executable, &fn->analyzed_executable,
+ ZigType *block_return_type = ir_analyze(g, fn->stage1_zir, &fn->analyzed_executable,
&backward_branch_count, &backward_branch_quota,
fn_type_id->return_type, return_type_node, nullptr, fn);
fn->src_implicit_return_type = block_return_type;
@@ -5233,14 +5233,14 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {
return;
}
- if (fn_table_entry->ir_executable->first_err_trace_msg != nullptr) {
+ if (fn_table_entry->stage1_zir->first_err_trace_msg != nullptr) {
fn_table_entry->anal_state = FnAnalStateInvalid;
return;
}
if (g->verbose_ir) {
fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));
- ir_print_src(g, stderr, fn_table_entry->ir_executable, 4);
+ ir_print_src(g, stderr, fn_table_entry->stage1_zir, 4);
fprintf(stderr, "}\n");
}
@@ -9858,12 +9858,6 @@ void AstNode::src() {
line, column);
}
-void Stage1Zir::src() {
- if (this->source_node != nullptr) {
- this->source_node->src();
- }
-}
-
void Stage1Air::src() {
Stage1Air *it;
for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {
src/stage1/astgen.cpp
@@ -8031,7 +8031,7 @@ static IrInstSrc *ir_gen_node(Stage1AstGen *ag, AstNode *node, Scope *scope) {
return ir_gen_node_extra(ag, node, scope, LValNone, nullptr);
}
-bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *ir_executable,
+bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *stage1_zir,
ZigFn *fn, bool in_c_import_scope)
{
assert(node->owner);
@@ -8042,7 +8042,7 @@ bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *ir_
ag->codegen = codegen;
ag->fn = fn;
ag->in_c_import_scope = in_c_import_scope;
- ag->exec = ir_executable;
+ ag->exec = stage1_zir;
ag->main_block_node = node;
IrBasicBlockSrc *entry_block = ir_create_basic_block(ag, scope, "Entry");
@@ -8076,7 +8076,7 @@ bool stage1_astgen(CodeGen *codegen, AstNode *node, Scope *scope, Stage1Zir *ir_
bool stage1_astgen_fn(CodeGen *codegen, ZigFn *fn) {
assert(fn != nullptr);
assert(fn->child_scope != nullptr);
- return stage1_astgen(codegen, fn->body_node, fn->child_scope, fn->ir_executable, fn, false);
+ return stage1_astgen(codegen, fn->body_node, fn->child_scope, fn->stage1_zir, fn, false);
}
void invalidate_exec(Stage1Zir *exec, ErrorMsg *msg) {
src/stage1/astgen.hpp
@@ -10,7 +10,7 @@
#include "all_types.hpp"
-bool stage1_astgen(CodeGen *g, AstNode *node, Scope *scope, Stage1Zir *ir_executable,
+bool stage1_astgen(CodeGen *g, AstNode *node, Scope *scope, Stage1Zir *stage1_zir,
ZigFn *fn, bool in_c_import_scope);
bool stage1_astgen_fn(CodeGen *g, ZigFn *fn_entry);
src/stage1/ir.cpp
@@ -5592,36 +5592,35 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
if (type_is_invalid(return_ptr->type))
return ErrorSemanticAnalyzeFail;
- Stage1Zir *ir_executable = heap::c_allocator.create<Stage1Zir>();
- ir_executable->source_node = source_node;
- ir_executable->name = exec_name;
- ir_executable->is_inline = true;
- ir_executable->begin_scope = scope;
+ Stage1Zir *stage1_zir = heap::c_allocator.create<Stage1Zir>();
+ stage1_zir->name = exec_name;
+ stage1_zir->is_inline = true;
+ stage1_zir->begin_scope = scope;
bool in_c_import_scope = c_import_buf != nullptr;
- if (!stage1_astgen(codegen, node, scope, ir_executable, fn_entry, in_c_import_scope))
+ if (!stage1_astgen(codegen, node, scope, stage1_zir, fn_entry, in_c_import_scope))
return ErrorSemanticAnalyzeFail;
- if (ir_executable->first_err_trace_msg != nullptr) {
- codegen->trace_err = ir_executable->first_err_trace_msg;
+ if (stage1_zir->first_err_trace_msg != nullptr) {
+ codegen->trace_err = stage1_zir->first_err_trace_msg;
return ErrorSemanticAnalyzeFail;
}
if (codegen->verbose_ir) {
fprintf(stderr, "\n{ // (IR)\n");
- ir_print_src(codegen, stderr, ir_executable, 2);
+ ir_print_src(codegen, stderr, stage1_zir, 2);
fprintf(stderr, "}\n");
}
Stage1Air *analyzed_executable = heap::c_allocator.create<Stage1Air>();
analyzed_executable->source_node = source_node;
analyzed_executable->parent_exec = parent_exec;
- analyzed_executable->source_exec = ir_executable;
+ analyzed_executable->source_exec = stage1_zir;
analyzed_executable->name = exec_name;
analyzed_executable->is_inline = true;
analyzed_executable->c_import_buf = c_import_buf;
analyzed_executable->begin_scope = scope;
- ZigType *result_type = ir_analyze(codegen, ir_executable, analyzed_executable,
+ ZigType *result_type = ir_analyze(codegen, stage1_zir, analyzed_executable,
backward_branch_count, backward_branch_quota,
return_ptr->type->data.pointer.child_type, expected_type_source_node, return_ptr,
fn_entry);
@@ -12935,7 +12934,6 @@ static IrInstGen *ir_analyze_fn_call(IrAnalyze *ira, IrInst* source_instr,
if (type_is_invalid(impl_fn->type_entry))
return ira->codegen->invalid_inst_gen;
- impl_fn->ir_executable->source_node = source_instr->source_node;
impl_fn->analyzed_executable.source_node = source_instr->source_node;
impl_fn->analyzed_executable.parent_exec = ira->new_irb.exec;
impl_fn->branch_quota = *ira->backward_branch_quota;