Commit 51dc4b0549

Alex Rønne Petersen <alex@alexrp.com>
2024-10-17 01:50:36
std.Target: Use ppc64 as the generic CPU model for powerpc64le.
ppc64le remains the baseline CPU model. Note that there's nothing about little endian, 64-bit PowerPC that requires the features in the ppc64le model; the reason it exists is that 64-bit PowerPC wasn't really used in little endian mode prior to those features being commonplace. That makes the ppc64le model a good baseline model, but not the right choice for a generic model.
master
1 parent 8062bdb
Changed files (1)
lib
std
Target.zig
lib/std/Target.zig
@@ -1811,10 +1811,8 @@ pub const Cpu = struct {
                 .mips, .mipsel => &mips.cpu.mips32,
                 .mips64, .mips64el => &mips.cpu.mips64,
                 .msp430 => &msp430.cpu.generic,
-                .powerpc => &powerpc.cpu.ppc,
-                .powerpcle => &powerpc.cpu.ppc,
-                .powerpc64 => &powerpc.cpu.ppc64,
-                .powerpc64le => &powerpc.cpu.ppc64le,
+                .powerpc, .powerpcle => &powerpc.cpu.ppc,
+                .powerpc64, .powerpc64le => &powerpc.cpu.ppc64,
                 .propeller1 => &propeller.cpu.generic,
                 .propeller2 => &propeller.cpu.generic,
                 .amdgcn => &amdgpu.cpu.generic,
@@ -1861,6 +1859,7 @@ pub const Cpu = struct {
                 .hexagon => &hexagon.cpu.hexagonv60, // gcc/clang do not have a generic hexagon model.
                 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
                 .loongarch64 => &loongarch.cpu.loongarch64,
+                .powerpc64le => &powerpc.cpu.ppc64le,
                 .riscv32 => &riscv.cpu.baseline_rv32,
                 .riscv64 => &riscv.cpu.baseline_rv64,
                 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,