Commit 4e7effd3d3
Changed files (8)
cmake/Findclang.cmake
@@ -8,14 +8,14 @@
find_path(CLANG_INCLUDE_DIRS NAMES clang/Frontend/ASTUnit.h
PATHS
- /usr/lib/llvm-3.8/include
+ /usr/lib/llvm-3.9/include
/mingw64/include)
macro(FIND_AND_ADD_CLANG_LIB _libname_)
string(TOUPPER ${_libname_} _prettylibname_)
find_library(CLANG_${_prettylibname_}_LIB NAMES ${_libname_}
PATHS
- /usr/lib/llvm-3.8/lib
+ /usr/lib/llvm-3.9/lib
/mingw64/lib)
if(CLANG_${_prettylibname_}_LIB)
set(CLANG_LIBRARIES ${CLANG_LIBRARIES} ${CLANG_${_prettylibname_}_LIB})
cmake/Findllvm.cmake
@@ -7,7 +7,7 @@
# LLVM_LIBRARIES
# LLVM_LIBDIRS
-find_program(LLVM_CONFIG_EXE NAMES llvm-config llvm-config-3.8)
+find_program(LLVM_CONFIG_EXE NAMES llvm-config llvm-config-3.9)
execute_process(
COMMAND ${LLVM_CONFIG_EXE} --libs
src/codegen.cpp
@@ -4847,7 +4847,7 @@ static void init(CodeGen *g, Buf *source_path) {
g->target_machine = LLVMCreateTargetMachine(target_ref, buf_ptr(&g->triple_str),
target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault);
- g->target_data_ref = LLVMGetTargetMachineData(g->target_machine);
+ g->target_data_ref = LLVMCreateTargetDataLayout(g->target_machine);
char *layout_str = LLVMCopyStringRepOfTargetData(g->target_data_ref);
LLVMSetDataLayout(g->module, layout_str);
src/parseh.cpp
@@ -408,25 +408,7 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
case BuiltinType::ObjCId:
case BuiltinType::ObjCClass:
case BuiltinType::ObjCSel:
- case BuiltinType::OCLImage1d:
- case BuiltinType::OCLImage1dArray:
- case BuiltinType::OCLImage1dBuffer:
- case BuiltinType::OCLImage2d:
- case BuiltinType::OCLImage2dArray:
- case BuiltinType::OCLImage2dArrayDepth:
- case BuiltinType::OCLImage2dDepth:
- case BuiltinType::OCLImage2dMSAA:
- case BuiltinType::OCLImage2dArrayMSAA:
- case BuiltinType::OCLImage2dMSAADepth:
- case BuiltinType::OCLImage2dArrayMSAADepth:
- case BuiltinType::OCLClkEvent:
- case BuiltinType::OCLQueue:
- case BuiltinType::OCLNDRange:
- case BuiltinType::OCLReserveID:
case BuiltinType::OMPArraySection:
- case BuiltinType::OCLImage3d:
- case BuiltinType::OCLSampler:
- case BuiltinType::OCLEvent:
case BuiltinType::Dependent:
case BuiltinType::Overload:
case BuiltinType::BoundMember:
@@ -434,6 +416,50 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
case BuiltinType::UnknownAny:
case BuiltinType::BuiltinFn:
case BuiltinType::ARCUnbridgedCast:
+
+ case BuiltinType::OCLImage1dRO:
+ case BuiltinType::OCLImage1dArrayRO:
+ case BuiltinType::OCLImage1dBufferRO:
+ case BuiltinType::OCLImage2dRO:
+ case BuiltinType::OCLImage2dArrayRO:
+ case BuiltinType::OCLImage2dDepthRO:
+ case BuiltinType::OCLImage2dArrayDepthRO:
+ case BuiltinType::OCLImage2dMSAARO:
+ case BuiltinType::OCLImage2dArrayMSAARO:
+ case BuiltinType::OCLImage2dMSAADepthRO:
+ case BuiltinType::OCLImage2dArrayMSAADepthRO:
+ case BuiltinType::OCLImage3dRO:
+ case BuiltinType::OCLImage1dWO:
+ case BuiltinType::OCLImage1dArrayWO:
+ case BuiltinType::OCLImage1dBufferWO:
+ case BuiltinType::OCLImage2dWO:
+ case BuiltinType::OCLImage2dArrayWO:
+ case BuiltinType::OCLImage2dDepthWO:
+ case BuiltinType::OCLImage2dArrayDepthWO:
+ case BuiltinType::OCLImage2dMSAAWO:
+ case BuiltinType::OCLImage2dArrayMSAAWO:
+ case BuiltinType::OCLImage2dMSAADepthWO:
+ case BuiltinType::OCLImage2dArrayMSAADepthWO:
+ case BuiltinType::OCLImage3dWO:
+ case BuiltinType::OCLImage1dRW:
+ case BuiltinType::OCLImage1dArrayRW:
+ case BuiltinType::OCLImage1dBufferRW:
+ case BuiltinType::OCLImage2dRW:
+ case BuiltinType::OCLImage2dArrayRW:
+ case BuiltinType::OCLImage2dDepthRW:
+ case BuiltinType::OCLImage2dArrayDepthRW:
+ case BuiltinType::OCLImage2dMSAARW:
+ case BuiltinType::OCLImage2dArrayMSAARW:
+ case BuiltinType::OCLImage2dMSAADepthRW:
+ case BuiltinType::OCLImage2dArrayMSAADepthRW:
+ case BuiltinType::OCLImage3dRW:
+ case BuiltinType::Float128:
+ case BuiltinType::OCLSampler:
+ case BuiltinType::OCLEvent:
+ case BuiltinType::OCLClkEvent:
+ case BuiltinType::OCLQueue:
+ case BuiltinType::OCLNDRange:
+ case BuiltinType::OCLReserveID:
emit_warning(c, decl, "missed a builtin type");
return c->codegen->builtin_types.entry_invalid;
}
@@ -554,8 +580,17 @@ static TypeTableEntry *resolve_type_with_table(Context *c, const Type *ty, const
case CC_SpirFunction: // default for OpenCL functions on SPIR target
emit_warning(c, decl, "function type has SPIR function calling convention");
return c->codegen->builtin_types.entry_invalid;
- case CC_SpirKernel: // inferred for OpenCL kernels on SPIR target
- emit_warning(c, decl, "function type has SPIR kernel calling convention");
+ case CC_OpenCLKernel:
+ emit_warning(c, decl, "function type has OpenCLKernel calling convention");
+ return c->codegen->builtin_types.entry_invalid;
+ case CC_Swift:
+ emit_warning(c, decl, "function type has Swift calling convention");
+ return c->codegen->builtin_types.entry_invalid;
+ case CC_PreserveMost:
+ emit_warning(c, decl, "function type has PreserveMost calling convention");
+ return c->codegen->builtin_types.entry_invalid;
+ case CC_PreserveAll:
+ emit_warning(c, decl, "function type has PreserveAll calling convention");
return c->codegen->builtin_types.entry_invalid;
}
src/target.cpp
@@ -15,6 +15,8 @@ static const ArchType arch_list[] = {
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_2a},
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_1a},
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v8},
+ {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8m_baseline},
+ {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8m_mainline},
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v7},
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v7em},
{ZigLLVM_arm, ZigLLVM_ARMSubArch_v7m},
@@ -71,8 +73,11 @@ static const ArchType arch_list[] = {
{ZigLLVM_kalimba, ZigLLVM_KalimbaSubArch_v5},
{ZigLLVM_shave, ZigLLVM_NoSubArch},
+ {ZigLLVM_lanai, ZigLLVM_NoSubArch},
{ZigLLVM_wasm32, ZigLLVM_NoSubArch},
{ZigLLVM_wasm64, ZigLLVM_NoSubArch},
+ {ZigLLVM_renderscript32, ZigLLVM_NoSubArch},
+ {ZigLLVM_renderscript64, ZigLLVM_NoSubArch},
};
static const ZigLLVM_VendorType vendor_list[] = {
@@ -88,6 +93,8 @@ static const ZigLLVM_VendorType vendor_list[] = {
ZigLLVM_NVIDIA,
ZigLLVM_CSR,
ZigLLVM_Myriad,
+ ZigLLVM_AMD,
+ ZigLLVM_Mesa,
};
static const ZigLLVM_OSType os_list[] = {
@@ -119,10 +126,12 @@ static const ZigLLVM_OSType os_list[] = {
ZigLLVM_ELFIAMCU,
ZigLLVM_TvOS,
ZigLLVM_WatchOS,
+ ZigLLVM_Mesa3D,
};
static const ZigLLVM_EnvironmentType environ_list[] = {
ZigLLVM_GNU,
+ ZigLLVM_GNUABI64,
ZigLLVM_GNUEABI,
ZigLLVM_GNUEABIHF,
ZigLLVM_GNUX32,
@@ -130,6 +139,9 @@ static const ZigLLVM_EnvironmentType environ_list[] = {
ZigLLVM_EABI,
ZigLLVM_EABIHF,
ZigLLVM_Android,
+ ZigLLVM_Musl,
+ ZigLLVM_MuslEABI,
+ ZigLLVM_MuslEABIHF,
ZigLLVM_MSVC,
ZigLLVM_Itanium,
ZigLLVM_Cygnus,
@@ -289,42 +301,73 @@ void resolve_target_object_format(ZigTarget *target) {
if (target->oformat != ZigLLVM_UnknownObjectFormat) {
return;
}
+
switch (target->arch.arch) {
- default:
- break;
- case ZigLLVM_hexagon:
- case ZigLLVM_mips:
- case ZigLLVM_mipsel:
- case ZigLLVM_mips64:
- case ZigLLVM_mips64el:
- case ZigLLVM_r600:
- case ZigLLVM_amdgcn:
- case ZigLLVM_sparc:
- case ZigLLVM_sparcv9:
- case ZigLLVM_systemz:
- case ZigLLVM_xcore:
- case ZigLLVM_ppc64le:
- target->oformat = ZigLLVM_ELF;
- return;
+ case ZigLLVM_UnknownArch:
+ case ZigLLVM_aarch64:
+ case ZigLLVM_arm:
+ case ZigLLVM_thumb:
+ case ZigLLVM_x86:
+ case ZigLLVM_x86_64:
+ if (is_os_darwin(target)) {
+ target->oformat = ZigLLVM_MachO;
+ } else if (target->os == ZigLLVM_Win32) {
+ target->oformat = ZigLLVM_COFF;
+ } else {
+ target->oformat = ZigLLVM_ELF;
+ }
+ return;
- case ZigLLVM_ppc:
- case ZigLLVM_ppc64:
- if (is_os_darwin(target)) {
- target->oformat = ZigLLVM_MachO;
+ case ZigLLVM_aarch64_be:
+ case ZigLLVM_amdgcn:
+ case ZigLLVM_amdil:
+ case ZigLLVM_amdil64:
+ case ZigLLVM_armeb:
+ case ZigLLVM_avr:
+ case ZigLLVM_bpfeb:
+ case ZigLLVM_bpfel:
+ case ZigLLVM_hexagon:
+ case ZigLLVM_lanai:
+ case ZigLLVM_hsail:
+ case ZigLLVM_hsail64:
+ case ZigLLVM_kalimba:
+ case ZigLLVM_le32:
+ case ZigLLVM_le64:
+ case ZigLLVM_mips:
+ case ZigLLVM_mips64:
+ case ZigLLVM_mips64el:
+ case ZigLLVM_mipsel:
+ case ZigLLVM_msp430:
+ case ZigLLVM_nvptx:
+ case ZigLLVM_nvptx64:
+ case ZigLLVM_ppc64le:
+ case ZigLLVM_r600:
+ case ZigLLVM_renderscript32:
+ case ZigLLVM_renderscript64:
+ case ZigLLVM_shave:
+ case ZigLLVM_sparc:
+ case ZigLLVM_sparcel:
+ case ZigLLVM_sparcv9:
+ case ZigLLVM_spir:
+ case ZigLLVM_spir64:
+ case ZigLLVM_systemz:
+ case ZigLLVM_tce:
+ case ZigLLVM_thumbeb:
+ case ZigLLVM_wasm32:
+ case ZigLLVM_wasm64:
+ case ZigLLVM_xcore:
+ target->oformat= ZigLLVM_ELF;
return;
- }
- target->oformat = ZigLLVM_ELF;
- return;
- }
- if (is_os_darwin(target)) {
- target->oformat = ZigLLVM_MachO;
- return;
- } else if (target->os == ZigLLVM_Win32) {
- target->oformat = ZigLLVM_COFF;
- return;
+ case ZigLLVM_ppc:
+ case ZigLLVM_ppc64:
+ if (is_os_darwin(target)) {
+ target->oformat = ZigLLVM_MachO;
+ } else {
+ target->oformat= ZigLLVM_ELF;
+ }
+ return;
}
- target->oformat = ZigLLVM_ELF;
}
// See lib/Support/Triple.cpp in LLVM for the source of this data.
@@ -357,8 +400,10 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
case ZigLLVM_hsail:
case ZigLLVM_spir:
case ZigLLVM_kalimba:
+ case ZigLLVM_lanai:
case ZigLLVM_shave:
case ZigLLVM_wasm32:
+ case ZigLLVM_renderscript32:
return 32;
case ZigLLVM_aarch64:
@@ -379,6 +424,7 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
case ZigLLVM_hsail64:
case ZigLLVM_spir64:
case ZigLLVM_wasm64:
+ case ZigLLVM_renderscript64:
return 64;
}
zig_unreachable();
@@ -446,6 +492,7 @@ int get_c_type_size_in_bits(const ZigTarget *target, CIntType id) {
case ZigLLVM_ELFIAMCU:
case ZigLLVM_TvOS:
case ZigLLVM_WatchOS:
+ case ZigLLVM_Mesa3D:
zig_panic("TODO c type size in bits for this target");
}
zig_unreachable();
src/zig_llvm.cpp
@@ -52,10 +52,6 @@ void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R) {
initializeLowerIntrinsicsPass(*unwrap(R));
}
-void LLVMZigInitializeUnreachableBlockElimPass(LLVMPassRegistryRef R) {
- initializeUnreachableBlockElimPass(*unwrap(R));
-}
-
char *LLVMZigGetHostCPUName(void) {
std::string str = sys::getHostCPUName();
return strdup(str.c_str());
@@ -452,11 +448,11 @@ LLVMZigDICompileUnit *LLVMZigCreateCompileUnit(LLVMZigDIBuilder *dibuilder,
uint64_t dwo_id, bool emit_debug_info)
{
DICompileUnit *result = reinterpret_cast<DIBuilder*>(dibuilder)->createCompileUnit(
- lang, file, dir, producer, is_optimized, flags, runtime_version, split_name,
- DIBuilder::FullDebug, dwo_id, emit_debug_info);
+ lang, file, dir, producer, is_optimized, flags, runtime_version, split_name);
return reinterpret_cast<LLVMZigDICompileUnit*>(result);
}
+
LLVMZigDIFile *LLVMZigCreateFile(LLVMZigDIBuilder *dibuilder, const char *filename, const char *directory) {
DIFile *result = reinterpret_cast<DIBuilder*>(dibuilder)->createFile(filename, directory);
return reinterpret_cast<LLVMZigDIFile*>(result);
@@ -603,6 +599,10 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
return "v8_1a";
case ZigLLVM_ARMSubArch_v8:
return "v8";
+ case ZigLLVM_ARMSubArch_v8m_baseline:
+ return "v8m_baseline";
+ case ZigLLVM_ARMSubArch_v8m_mainline:
+ return "v8m_mainline";
case ZigLLVM_ARMSubArch_v7:
return "v7";
case ZigLLVM_ARMSubArch_v7em:
@@ -648,13 +648,13 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty) {
static AtomicOrdering mapFromLLVMOrdering(LLVMAtomicOrdering Ordering) {
switch (Ordering) {
- case LLVMAtomicOrderingNotAtomic: return NotAtomic;
- case LLVMAtomicOrderingUnordered: return Unordered;
- case LLVMAtomicOrderingMonotonic: return Monotonic;
- case LLVMAtomicOrderingAcquire: return Acquire;
- case LLVMAtomicOrderingRelease: return Release;
- case LLVMAtomicOrderingAcquireRelease: return AcquireRelease;
- case LLVMAtomicOrderingSequentiallyConsistent: return SequentiallyConsistent;
+ case LLVMAtomicOrderingNotAtomic: return AtomicOrdering::NotAtomic;
+ case LLVMAtomicOrderingUnordered: return AtomicOrdering::Unordered;
+ case LLVMAtomicOrderingMonotonic: return AtomicOrdering::Monotonic;
+ case LLVMAtomicOrderingAcquire: return AtomicOrdering::Acquire;
+ case LLVMAtomicOrderingRelease: return AtomicOrdering::Release;
+ case LLVMAtomicOrderingAcquireRelease: return AtomicOrdering::AcquireRelease;
+ case LLVMAtomicOrderingSequentiallyConsistent: return AtomicOrdering::SequentiallyConsistent;
}
abort();
}
src/zig_llvm.hpp
@@ -29,7 +29,6 @@ struct LLVMZigInsertionPoint;
void LLVMZigInitializeLoopStrengthReducePass(LLVMPassRegistryRef R);
void LLVMZigInitializeLowerIntrinsicsPass(LLVMPassRegistryRef R);
-void LLVMZigInitializeUnreachableBlockElimPass(LLVMPassRegistryRef R);
char *LLVMZigGetHostCPUName(void);
char *LLVMZigGetNativeFeatures(void);
@@ -170,50 +169,53 @@ unsigned ZigLLVMGetPrefTypeAlignment(LLVMTargetDataRef TD, LLVMTypeRef Ty);
enum ZigLLVM_ArchType {
ZigLLVM_UnknownArch,
- ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale
- ZigLLVM_armeb, // ARM (big endian): armeb
- ZigLLVM_aarch64, // AArch64 (little endian): aarch64
- ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be
- ZigLLVM_avr, // AVR: Atmel AVR microcontroller
- ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
- ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
- ZigLLVM_hexagon, // Hexagon: hexagon
- ZigLLVM_mips, // MIPS: mips, mipsallegrex
- ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexel
- ZigLLVM_mips64, // MIPS64: mips64
- ZigLLVM_mips64el, // MIPS64EL: mips64el
- ZigLLVM_msp430, // MSP430: msp430
- ZigLLVM_ppc, // PPC: powerpc
- ZigLLVM_ppc64, // PPC64: powerpc64, ppu
- ZigLLVM_ppc64le, // PPC64LE: powerpc64le
- ZigLLVM_r600, // R600: AMD GPUs HD2XXX - HD6XXX
- ZigLLVM_amdgcn, // AMDGCN: AMD GCN GPUs
- ZigLLVM_sparc, // Sparc: sparc
- ZigLLVM_sparcv9, // Sparcv9: Sparcv9
- ZigLLVM_sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
- ZigLLVM_systemz, // SystemZ: s390x
- ZigLLVM_tce, // TCE (http://tce.cs.tut.fi/): tce
- ZigLLVM_thumb, // Thumb (little endian): thumb, thumbv.*
- ZigLLVM_thumbeb, // Thumb (big endian): thumbeb
- ZigLLVM_x86, // X86: i[3-9]86
- ZigLLVM_x86_64, // X86-64: amd64, x86_64
- ZigLLVM_xcore, // XCore: xcore
- ZigLLVM_nvptx, // NVPTX: 32-bit
- ZigLLVM_nvptx64, // NVPTX: 64-bit
- ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
- ZigLLVM_le64, // le64: generic little-endian 64-bit CPU (PNaCl)
- ZigLLVM_amdil, // AMDIL
- ZigLLVM_amdil64, // AMDIL with 64-bit pointers
- ZigLLVM_hsail, // AMD HSAIL
- ZigLLVM_hsail64, // AMD HSAIL with 64-bit pointers
- ZigLLVM_spir, // SPIR: standard portable IR for OpenCL 32-bit version
- ZigLLVM_spir64, // SPIR: standard portable IR for OpenCL 64-bit version
- ZigLLVM_kalimba, // Kalimba: generic kalimba
- ZigLLVM_shave, // SHAVE: Movidius vector VLIW processors
- ZigLLVM_wasm32, // WebAssembly with 32-bit pointers
- ZigLLVM_wasm64, // WebAssembly with 64-bit pointers
-
- ZigLLVM_LastArchType = ZigLLVM_wasm64
+ ZigLLVM_arm, // ARM (little endian): arm, armv.*, xscale
+ ZigLLVM_armeb, // ARM (big endian): armeb
+ ZigLLVM_aarch64, // AArch64 (little endian): aarch64
+ ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be
+ ZigLLVM_avr, // AVR: Atmel AVR microcontroller
+ ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
+ ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
+ ZigLLVM_hexagon, // Hexagon: hexagon
+ ZigLLVM_mips, // MIPS: mips, mipsallegrex
+ ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexel
+ ZigLLVM_mips64, // MIPS64: mips64
+ ZigLLVM_mips64el, // MIPS64EL: mips64el
+ ZigLLVM_msp430, // MSP430: msp430
+ ZigLLVM_ppc, // PPC: powerpc
+ ZigLLVM_ppc64, // PPC64: powerpc64, ppu
+ ZigLLVM_ppc64le, // PPC64LE: powerpc64le
+ ZigLLVM_r600, // R600: AMD GPUs HD2XXX - HD6XXX
+ ZigLLVM_amdgcn, // AMDGCN: AMD GCN GPUs
+ ZigLLVM_sparc, // Sparc: sparc
+ ZigLLVM_sparcv9, // Sparcv9: Sparcv9
+ ZigLLVM_sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
+ ZigLLVM_systemz, // SystemZ: s390x
+ ZigLLVM_tce, // TCE (http://tce.cs.tut.fi/): tce
+ ZigLLVM_thumb, // Thumb (little endian): thumb, thumbv.*
+ ZigLLVM_thumbeb, // Thumb (big endian): thumbeb
+ ZigLLVM_x86, // X86: i[3-9]86
+ ZigLLVM_x86_64, // X86-64: amd64, x86_64
+ ZigLLVM_xcore, // XCore: xcore
+ ZigLLVM_nvptx, // NVPTX: 32-bit
+ ZigLLVM_nvptx64, // NVPTX: 64-bit
+ ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
+ ZigLLVM_le64, // le64: generic little-endian 64-bit CPU (PNaCl)
+ ZigLLVM_amdil, // AMDIL
+ ZigLLVM_amdil64, // AMDIL with 64-bit pointers
+ ZigLLVM_hsail, // AMD HSAIL
+ ZigLLVM_hsail64, // AMD HSAIL with 64-bit pointers
+ ZigLLVM_spir, // SPIR: standard portable IR for OpenCL 32-bit version
+ ZigLLVM_spir64, // SPIR: standard portable IR for OpenCL 64-bit version
+ ZigLLVM_kalimba, // Kalimba: generic kalimba
+ ZigLLVM_shave, // SHAVE: Movidius vector VLIW processors
+ ZigLLVM_lanai, // Lanai: Lanai 32-bit
+ ZigLLVM_wasm32, // WebAssembly with 32-bit pointers
+ ZigLLVM_wasm64, // WebAssembly with 64-bit pointers
+ ZigLLVM_renderscript32, // 32-bit RenderScript
+ ZigLLVM_renderscript64, // 64-bit RenderScript
+
+ ZigLLVM_LastArchType = ZigLLVM_renderscript64
};
enum ZigLLVM_SubArchType {
@@ -222,6 +224,8 @@ enum ZigLLVM_SubArchType {
ZigLLVM_ARMSubArch_v8_2a,
ZigLLVM_ARMSubArch_v8_1a,
ZigLLVM_ARMSubArch_v8,
+ ZigLLVM_ARMSubArch_v8m_baseline,
+ ZigLLVM_ARMSubArch_v8m_mainline,
ZigLLVM_ARMSubArch_v7,
ZigLLVM_ARMSubArch_v7em,
ZigLLVM_ARMSubArch_v7m,
@@ -254,8 +258,10 @@ enum ZigLLVM_VendorType {
ZigLLVM_NVIDIA,
ZigLLVM_CSR,
ZigLLVM_Myriad,
+ ZigLLVM_AMD,
+ ZigLLVM_Mesa,
- ZigLLVM_LastVendorType = ZigLLVM_Myriad
+ ZigLLVM_LastVendorType = ZigLLVM_Mesa
};
enum ZigLLVM_OSType {
ZigLLVM_UnknownOS,
@@ -287,13 +293,15 @@ enum ZigLLVM_OSType {
ZigLLVM_ELFIAMCU,
ZigLLVM_TvOS, // Apple tvOS
ZigLLVM_WatchOS, // Apple watchOS
+ ZigLLVM_Mesa3D,
- ZigLLVM_LastOSType = ZigLLVM_WatchOS
+ ZigLLVM_LastOSType = ZigLLVM_Mesa3D
};
enum ZigLLVM_EnvironmentType {
ZigLLVM_UnknownEnvironment,
ZigLLVM_GNU,
+ ZigLLVM_GNUABI64,
ZigLLVM_GNUEABI,
ZigLLVM_GNUEABIHF,
ZigLLVM_GNUX32,
@@ -301,12 +309,16 @@ enum ZigLLVM_EnvironmentType {
ZigLLVM_EABI,
ZigLLVM_EABIHF,
ZigLLVM_Android,
+ ZigLLVM_Musl,
+ ZigLLVM_MuslEABI,
+ ZigLLVM_MuslEABIHF,
ZigLLVM_MSVC,
ZigLLVM_Itanium,
ZigLLVM_Cygnus,
ZigLLVM_AMDOpenCL,
ZigLLVM_CoreCLR,
+
ZigLLVM_LastEnvironmentType = ZigLLVM_CoreCLR
};
enum ZigLLVM_ObjectFormatType {
README.md
@@ -70,8 +70,8 @@ compromises backward compatibility.
### Dependencies
* cmake >= 2.8.5
- * LLVM == 3.8.0
- * libclang == 3.8.0
+ * LLVM == 3.9.x
+ * libclang == 3.9.x
### Debug / Development Build