Commit 40a2dfc12a
Changed files (2)
src
test
behavior
src/Sema.zig
@@ -20179,8 +20179,8 @@ fn analyzeShuffle(
.elem_type = elem_ty,
});
- if (maybe_a_len == null) a = try sema.addConstUndef(a_ty);
- if (maybe_b_len == null) b = try sema.addConstUndef(b_ty);
+ if (maybe_a_len == null) a = try sema.addConstUndef(a_ty) else a = try sema.coerce(block, a_ty, a, a_src);
+ if (maybe_b_len == null) b = try sema.addConstUndef(b_ty) else b = try sema.coerce(block, b_ty, b, b_src);
const operand_info = [2]std.meta.Tuple(&.{ u64, LazySrcLoc, Type }){
.{ a_len, a_src, a_ty },
test/behavior/vector.zig
@@ -3,6 +3,7 @@ const builtin = @import("builtin");
const mem = std.mem;
const math = std.math;
const expect = std.testing.expect;
+const expectEqual = std.testing.expectEqual;
test "implicit cast vector to array - bool" {
if (builtin.zig_backend == .stage1) {
@@ -1231,3 +1232,17 @@ test "modRem with zero divisor" {
_ = zeros[0];
}
}
+
+test "array operands to shuffle are coerced to vectors" {
+ if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
+ if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
+ if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
+ if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
+ if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
+
+ const mask = [5]i32{ -1, 0, 1, 2, 3 };
+
+ var a = [5]u32{ 3, 5, 7, 9, 0 };
+ var b = @shuffle(u32, a, @splat(5, @as(u24, 0)), mask);
+ try expectEqual([_]u32{ 0, 3, 5, 7, 9 }, b);
+}