Commit 38d46a6764

@@ -4228,7 +4228,25 @@ fn genUnOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MCValue
             const addr_reg_lock = self.register_manager.lockRegAssumeUnused(addr_reg);
             defer self.register_manager.unlockReg(addr_reg_lock);
 
-            try self.loadMemPtrIntoRegister(addr_reg, Type.usize, dst_mcv);
+            switch (dst_mcv) {
+                .memory => |addr| try self.genSetReg(Type.usize, addr_reg, .{ .immediate = addr }),
+                .linker_load => |load_struct| {
+                    const atom_index = if (self.bin_file.cast(link.File.MachO)) |macho_file| blk: {
+                        const atom = try macho_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl);
+                        break :blk macho_file.getAtom(atom).getSymbolIndex().?;
+                    } else if (self.bin_file.cast(link.File.Coff)) |coff_file| blk: {
+                        const atom = try coff_file.getOrCreateAtomForDecl(self.mod_fn.owner_decl);
+                        break :blk coff_file.getAtom(atom).getSymbolIndex().?;
+                    } else unreachable;
+
+                    switch (load_struct.type) {
+                        .import => unreachable,
+                        .got => try self.asmMovLinker(addr_reg, atom_index, load_struct),
+                        .direct => try self.asmLeaLinker(addr_reg, atom_index, load_struct),
+                    }
+                },
+                else => unreachable,
+            }
             try self.asmMemory(
                 mir_tag,
                 Memory.sib(Memory.PtrSize.fromSize(abi_size), .{ .base = addr_reg }),