Commit 35da1e1e8f

Alex Rønne Petersen <alex@alexrp.com>
2024-12-14 12:15:50
compiler-rt: Don't export __a(u)ll(div,rem) if linking libc.
libc provides these when targeting MSVC.
1 parent 05a877a
Changed files (2)
lib
lib/compiler_rt/aulldiv.zig
@@ -8,7 +8,7 @@ const common = @import("common.zig");
 pub const panic = common.panic;
 
 comptime {
-    if (arch == .x86 and os == .windows and (abi == .msvc or abi == .itanium) and builtin.zig_backend != .stage2_c) {
+    if (arch == .x86 and os == .windows and (abi == .msvc or abi == .itanium) and !builtin.link_libc) {
         // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
         @export(&_alldiv, .{ .name = "\x01__alldiv", .linkage = common.linkage, .visibility = common.visibility });
         @export(&_aulldiv, .{ .name = "\x01__aulldiv", .linkage = common.linkage, .visibility = common.visibility });
lib/compiler_rt/aullrem.zig
@@ -8,7 +8,7 @@ const common = @import("common.zig");
 pub const panic = common.panic;
 
 comptime {
-    if (arch == .x86 and os == .windows and (abi == .msvc or abi == .itanium) and builtin.zig_backend != .stage2_c) {
+    if (arch == .x86 and os == .windows and (abi == .msvc or abi == .itanium) and !builtin.link_libc) {
         // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
         @export(&_allrem, .{ .name = "\x01__allrem", .linkage = common.linkage, .visibility = common.visibility });
         @export(&_aullrem, .{ .name = "\x01__aullrem", .linkage = common.linkage, .visibility = common.visibility });