Commit 2b9478ce12

Maciej 'vesim' Kuliński <vesim809@pm.me>
2022-12-09 22:18:18
Sema: implement AVR address spaces
Co-authored-by: Veikka Tuominen <git@vexu.eu>
1 parent fd0fb26
Changed files (6)
lib/std/builtin.zig
@@ -174,6 +174,14 @@ pub const AddressSpace = enum {
     param,
     shared,
     local,
+
+    // AVR address spaces.
+    flash,
+    flash1,
+    flash2,
+    flash3,
+    flash4,
+    flash5,
 };
 
 /// This data structure is used by the Zig language code generation and
lib/std/target.zig
@@ -1186,6 +1186,8 @@ pub const Target = struct {
                     .fs, .gs, .ss => arch == .x86_64 or arch == .x86,
                     .global, .constant, .local, .shared => is_gpu,
                     .param => is_nvptx,
+                    // TODO this should also check how many flash banks the cpu has
+                    .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr,
                 };
             }
 
src/codegen/llvm/bindings.zig
@@ -1530,8 +1530,12 @@ pub const address_space = struct {
 
     // See llvm/lib/Target/AVR/AVR.h
     pub const avr = struct {
-        pub const data_memory: c_uint = 0;
-        pub const program_memory: c_uint = 1;
+        pub const flash: c_uint = 1;
+        pub const flash1: c_uint = 2;
+        pub const flash2: c_uint = 3;
+        pub const flash3: c_uint = 4;
+        pub const flash4: c_uint = 5;
+        pub const flash5: c_uint = 6;
     };
 
     // See llvm/lib/Target/NVPTX/NVPTX.h
src/codegen/llvm.zig
@@ -10241,6 +10241,16 @@ fn toLlvmAddressSpace(address_space: std.builtin.AddressSpace, target: std.Targe
             .local => llvm.address_space.amdgpu.private,
             else => unreachable,
         },
+        .avr => switch (address_space) {
+            .generic => llvm.address_space.default,
+            .flash => llvm.address_space.avr.flash,
+            .flash1 => llvm.address_space.avr.flash1,
+            .flash2 => llvm.address_space.avr.flash2,
+            .flash3 => llvm.address_space.avr.flash3,
+            .flash4 => llvm.address_space.avr.flash4,
+            .flash5 => llvm.address_space.avr.flash5,
+            else => unreachable,
+        },
         else => switch (address_space) {
             .generic => llvm.address_space.default,
             else => unreachable,
src/codegen/spirv.zig
@@ -548,7 +548,7 @@ pub const DeclGen = struct {
             .gs, .fs, .ss => unreachable,
             .shared => .Workgroup,
             .local => .Private,
-            .global, .param, .constant => unreachable,
+            .global, .param, .constant, .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => unreachable,
         };
     }
 
src/Sema.zig
@@ -31938,6 +31938,8 @@ pub fn analyzeAddressSpace(
         .param => is_nv,
         .global, .shared, .local => is_gpu,
         .constant => is_gpu and (ctx == .constant),
+        // TODO this should also check how many flash banks the cpu has
+        .flash, .flash1, .flash2, .flash3, .flash4, .flash5 => arch == .avr,
     };
 
     if (!supported) {