Commit 246e1de554

@@ -171,7 +171,13 @@ const Os = switch (builtin.os.tag) {
                         const gop = try w.dir_table.getOrPut(gpa, path);
                         if (!gop.found_existing) {
                             var mount_id: MountId = undefined;
-                            const dir_handle = try Os.getDirHandle(gpa, path, &mount_id);
+                            const dir_handle = Os.getDirHandle(gpa, path, &mount_id) catch |err| switch (err) {
+                                error.FileNotFound => {
+                                    std.debug.assert(w.dir_table.swapRemove(path));
+                                    continue;
+                                },
+                                else => return err,
+                            };
                             const fan_fd = blk: {
                                 const fd_gop = try w.os.poll_fds.getOrPut(gpa, mount_id);
                                 if (!fd_gop.found_existing) {

@@ -3,7 +3,7 @@ const assert = std.debug.assert;
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.spirv_parse);
 
-const spec = @import("../../arch/spirv/spec.zig");
+const spec = @import("../../codegen/spirv/spec.zig");
 const Opcode = spec.Opcode;
 const Word = spec.Word;
 const InstructionSet = spec.InstructionSet;

@@ -4,8 +4,8 @@ const assert = std.debug.assert;
 const log = std.log.scoped(.spirv_link);
 
 const BinaryModule = @import("BinaryModule.zig");
-const Section = @import("../../arch/spirv/Section.zig");
-const spec = @import("../../arch/spirv/spec.zig");
+const Section = @import("../../codegen/spirv/Section.zig");
+const spec = @import("../../codegen/spirv/spec.zig");
 const ResultId = spec.Id;
 const Word = spec.Word;
 

@@ -12,8 +12,8 @@ const assert = std.debug.assert;
 const log = std.log.scoped(.spirv_link);
 
 const BinaryModule = @import("BinaryModule.zig");
-const Section = @import("../../arch/spirv/Section.zig");
-const spec = @import("../../arch/spirv/spec.zig");
+const Section = @import("../../codegen/spirv/Section.zig");
+const spec = @import("../../codegen/spirv/spec.zig");
 const Opcode = spec.Opcode;
 const ResultId = spec.Id;
 const Word = spec.Word;

@@ -11,19 +11,18 @@ const link = @import("../link.zig");
 const Air = @import("../Air.zig");
 const Type = @import("../Type.zig");
 const BinaryModule = @import("SpirV/BinaryModule.zig");
-const CodeGen = @import("../arch/spirv/CodeGen.zig");
-const SpvModule = @import("../arch/spirv/Module.zig");
-const Section = @import("../arch/spirv/Section.zig");
+const CodeGen = @import("../codegen/spirv/CodeGen.zig");
+const Module = @import("../codegen/spirv/Module.zig");
 const trace = @import("../tracy.zig").trace;
 
-const spec = @import("../arch/spirv/spec.zig");
+const spec = @import("../codegen/spirv/spec.zig");
 const Id = spec.Id;
 const Word = spec.Word;
 
 const Linker = @This();
 
 base: link.File,
-module: SpvModule,
+module: Module,
 
 pub fn createEmpty(
     arena: Allocator,

@@ -57,7 +57,7 @@ fn importBackend(comptime backend: std.builtin.CompilerBackend) type {
         .stage2_powerpc => unreachable,
         .stage2_riscv64 => @import("arch/riscv64/CodeGen.zig"),
         .stage2_sparc64 => @import("arch/sparc64/CodeGen.zig"),
-        .stage2_spirv => @import("arch/spirv/CodeGen.zig"),
+        .stage2_spirv => @import("codegen/spirv/CodeGen.zig"),
         .stage2_wasm => @import("arch/wasm/CodeGen.zig"),
         .stage2_x86, .stage2_x86_64 => @import("arch/x86_64/CodeGen.zig"),
         _ => unreachable,

@@ -3646,6 +3646,7 @@ pub fn errorSetBits(zcu: *const Zcu) u16 {
 
     if (zcu.error_limit == 0) return 0;
     if (target.cpu.arch.isSpirV()) {
+        // As expected by https://github.com/Snektron/zig-spirv-test-executor
         if (zcu.comp.config.is_test) return 32;
     }