Commit 21908e100e
Changed files (34)
lib
std
target
cpu
feature
lib/std/target/cpu/AArch64Cpu.zig
@@ -33,298 +33,298 @@ pub const AArch64Cpu = enum {
Thunderxt88,
Tsv110,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.AArch64Feature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.AArch64Feature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType {
- .ZczFp,
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.AppleLatest, "apple-latest", &[_]FeatureType {
+ .ArithBccFusion,
.ArithCbzFusion,
- .FuseAes,
+ .ZczFp,
.AlternateSextloadCvtF32Pattern,
- .ZczFpWorkaround,
- .FpArmv8,
- .Perfmon,
.DisableLatencySchedHeuristic,
- .Zcm,
+ .Perfmon,
.ZczGp,
- .ArithBccFusion,
+ .ZczFpWorkaround,
+ .Zcm,
+ .FpArmv8,
.FuseCryptoEor,
+ .FuseAes,
.Cyclone,
- },
- CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
.Perfmon,
.FpArmv8,
.Crc,
.A35,
- },
- CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
- .UseAa,
- .FuseAes,
- .FpArmv8,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
.Perfmon,
- .Crc,
- .BalanceFpOps,
.UsePostraScheduler,
+ .Crc,
.CustomCheapAsMove,
+ .BalanceFpOps,
+ .UseAa,
+ .FpArmv8,
+ .FuseAes,
.A53,
- },
- CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
- .Rcpc,
- .Ccpp,
- .Pan,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+ .Lse,
+ .Vh,
.Rdm,
- .FuseAes,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
.Uaops,
- .Vh,
.Ras,
- .A55,
- },
- CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
- .FuseLiterals,
- .FuseAes,
+ .Rcpc,
+ .Ccpp,
.FpArmv8,
+ .FuseAes,
+ .A55,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
.Perfmon,
- .Crc,
- .BalanceFpOps,
.UsePostraScheduler,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
- .A57,
- },
- CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType {
- .Rcpc,
- .Ccpp,
- .Pan,
- .Rdm,
+ .CustomCheapAsMove,
+ .BalanceFpOps,
+ .FuseLiterals,
.FpArmv8,
+ .FuseAes,
+ .A57,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA65, "cortex-a65", &[_]FeatureType {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
- .A65,
- },
- CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
.Rcpc,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ .A65,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
.A65,
- },
- CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
.Perfmon,
- .FuseAes,
.FpArmv8,
.Crc,
+ .FuseAes,
.A72,
- },
- CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
.Perfmon,
- .FuseAes,
.FpArmv8,
.Crc,
+ .FuseAes,
.A73,
- },
- CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
- .Rcpc,
- .Ccpp,
- .Pan,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+ .Lse,
+ .Vh,
.Rdm,
- .FuseAes,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
.Uaops,
- .Vh,
.Ras,
- .A75,
- },
- CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
.Rcpc,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ .FuseAes,
+ .A75,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
- .A76,
- },
- CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
.Rcpc,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ .A76,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
.A76,
- },
- CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
- .ZczFp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
+ .ArithBccFusion,
.ArithCbzFusion,
- .FuseAes,
+ .ZczFp,
.AlternateSextloadCvtF32Pattern,
- .ZczFpWorkaround,
- .FpArmv8,
- .Perfmon,
.DisableLatencySchedHeuristic,
- .Zcm,
+ .Perfmon,
.ZczGp,
- .ArithBccFusion,
+ .ZczFpWorkaround,
+ .Zcm,
+ .FpArmv8,
.FuseCryptoEor,
+ .FuseAes,
.Cyclone,
- },
- CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
.ZczFp,
- .FuseAes,
- .SlowPaired128,
- .Force32bitJumpTables,
- .UseReciprocalSquareRoot,
- .FpArmv8,
.Perfmon,
- .SlowMisaligned128store,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .UseReciprocalSquareRoot,
.CustomCheapAsMove,
- .Exynosm1,
- },
- CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
- .ZczFp,
- .FuseAes,
- .SlowPaired128,
.Force32bitJumpTables,
+ .SlowMisaligned128store,
.FpArmv8,
+ .SlowPaired128,
+ .FuseAes,
+ .Exynosm1,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+ .ZczFp,
.Perfmon,
- .SlowMisaligned128store,
- .Crc,
.UsePostraScheduler,
+ .Crc,
.CustomCheapAsMove,
- .Exynosm2,
- },
- CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
- .ZczFp,
- .FuseLiterals,
- .FuseAes,
.Force32bitJumpTables,
+ .SlowMisaligned128store,
.FpArmv8,
+ .SlowPaired128,
+ .FuseAes,
+ .Exynosm2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+ .FuseCsel,
+ .ZczFp,
.Perfmon,
- .Crc,
- .LslFast,
- .FuseAddress,
.UsePostraScheduler,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
- .FuseCsel,
+ .CustomCheapAsMove,
+ .Force32bitJumpTables,
+ .FuseLiterals,
+ .FuseAddress,
+ .LslFast,
+ .FpArmv8,
+ .FuseAes,
.Exynosm3,
- },
- CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+ .ArithBccFusion,
+ .Vh,
+ .ArithCbzFusion,
.ZczFp,
- .Lse,
- .FuseArithLogic,
- .Lor,
+ .Rdm,
.UsePostraScheduler,
- .Uaops,
- .CustomCheapAsMove,
- .ArithBccFusion,
+ .Ras,
+ .Force32bitJumpTables,
.Ccpp,
- .Perfmon,
+ .FuseCsel,
.Pan,
- .Rdm,
+ .Uaops,
.FuseLiterals,
- .Force32bitJumpTables,
.LslFast,
+ .Lse,
+ .Perfmon,
+ .Dotprod,
+ .Lor,
+ .FuseArithLogic,
+ .Crc,
+ .CustomCheapAsMove,
.FuseAddress,
.ZczGp,
- .Ras,
- .FuseCsel,
- .ArithCbzFusion,
- .FuseAes,
.FpArmv8,
- .Crc,
- .Dotprod,
- .Vh,
+ .FuseAes,
.Exynosm4,
- },
- CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+ .ArithBccFusion,
+ .Vh,
+ .ArithCbzFusion,
.ZczFp,
- .Lse,
- .FuseArithLogic,
- .Lor,
+ .Rdm,
.UsePostraScheduler,
- .Uaops,
- .CustomCheapAsMove,
- .ArithBccFusion,
+ .Ras,
+ .Force32bitJumpTables,
.Ccpp,
- .Perfmon,
+ .FuseCsel,
.Pan,
- .Rdm,
+ .Uaops,
.FuseLiterals,
- .Force32bitJumpTables,
.LslFast,
+ .Lse,
+ .Perfmon,
+ .Dotprod,
+ .Lor,
+ .FuseArithLogic,
+ .Crc,
+ .CustomCheapAsMove,
.FuseAddress,
.ZczGp,
- .Ras,
- .FuseCsel,
- .ArithCbzFusion,
- .FuseAes,
.FpArmv8,
- .Crc,
- .Dotprod,
- .Vh,
+ .FuseAes,
.Exynosm4,
- },
- CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Falkor, "falkor", &[_]FeatureType {
.ZczFp,
.Rdm,
- .SlowStrqroStore,
.Perfmon,
- .FpArmv8,
- .Crc,
- .LslFast,
.UsePostraScheduler,
- .ZczGp,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
+ .CustomCheapAsMove,
+ .ZczGp,
+ .FpArmv8,
+ .SlowStrqroStore,
+ .LslFast,
.Falkor,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
.Trbe,
.Ete,
.FpArmv8,
@@ -332,149 +332,149 @@ pub const AArch64Cpu = enum {
.Neon,
.Perfmon,
.UsePostraScheduler,
- },
- CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
.ZczFp,
.Perfmon,
- .FpArmv8,
- .Crc,
- .LslFast,
.UsePostraScheduler,
- .ZczGp,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
- .Kryo,
- },
- CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
- .Rcpc,
- .Ccpp,
- .Pan,
- .Rdm,
+ .CustomCheapAsMove,
+ .ZczGp,
.FpArmv8,
+ .LslFast,
+ .Kryo,
+ }),
+ CpuInfo(@This(), FeatureType).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
- .Neoversee1,
- },
- CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
.Rcpc,
- .Spe,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ .Neoversee1,
+ }),
+ CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
.Lse,
- .Crc,
+ .Spe,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
.Neoversen1,
- },
- CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Saphira, "saphira", &[_]FeatureType {
+ .Spe,
+ .Vh,
.ZczFp,
- .Nv,
+ .Rdm,
+ .UsePostraScheduler,
+ .Dit,
.Am,
- .Lse,
+ .Ras,
+ .Rcpc,
.Sel2,
- .Lor,
- .Tracev84,
- .Uaops,
- .UsePostraScheduler,
- .CustomCheapAsMove,
.Ccpp,
+ .Pa,
+ .Pan,
+ .Uaops,
+ .Tracev84,
+ .Mpam,
+ .LslFast,
+ .Lse,
+ .Nv,
.Perfmon,
+ .Dotprod,
.TlbRmi,
+ .Lor,
+ .Ccidx,
.PredictableSelectExpensive,
+ .Crc,
+ .CustomCheapAsMove,
.Fmi,
- .Rcpc,
- .Pan,
- .Rdm,
- .LslFast,
- .Pa,
.ZczGp,
- .Dit,
- .Ras,
- .Spe,
- .Mpam,
.FpArmv8,
- .Ccidx,
- .Dotprod,
- .Crc,
- .Vh,
.Saphira,
- },
- CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Thunderx, "thunderx", &[_]FeatureType {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
.Thunderx,
- },
- CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
- .Pan,
- .Rdm,
- .Vh,
- .AggressiveFma,
- .FpArmv8,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
.Lse,
+ .ArithBccFusion,
+ .Vh,
+ .Rdm,
+ .UsePostraScheduler,
.Crc,
.Lor,
- .UsePostraScheduler,
- .ArithBccFusion,
+ .Pan,
+ .AggressiveFma,
+ .FpArmv8,
.PredictableSelectExpensive,
.Thunderx2t99,
- },
- CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
.Thunderxt81,
- },
- CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
.Thunderxt83,
- },
- CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
.Thunderxt88,
- },
- CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType {
- .Uaops,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tsv110, "tsv110", &[_]FeatureType {
+ .Lse,
.Spe,
- .Ccpp,
- .Pan,
- .Rdm,
- .FuseAes,
.Vh,
+ .Rdm,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .UsePostraScheduler,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
- .UsePostraScheduler,
+ .Uaops,
.CustomCheapAsMove,
.Ras,
+ .Ccpp,
+ .FpArmv8,
+ .FuseAes,
.Tsv110,
- },
+ }),
};
};
lib/std/target/cpu/AmdGpuCpu.zig
@@ -42,135 +42,135 @@ pub const AmdGpuCpu = enum {
Tonga,
Verde,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.AmdGpuFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.AmdGpuFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Bonaire, "bonaire", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Carrizo, "carrizo", &[_]FeatureType {
.CodeObjectV3,
.FastFmaf,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
.Xnack,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Fiji, "fiji", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
.Wavefrontsize64,
- },
- CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
.FlatAddressSpace,
.Wavefrontsize64,
- },
- CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx1010, "gfx1010", &[_]FeatureType {
.CodeObjectV3,
.DlInsts,
.NoXnackSupport,
.FlatSegmentOffsetBug,
- .Gfx9Insts,
- .NoSdstCmpx,
- .Fp64,
- .FastFmaf,
- .Sdwa,
- .SdwaScalar,
- .Dpp,
- .RegisterBanking,
+ .Vscnt,
+ .ApertureRegs,
.Gfx10Insts,
- .AddNoCarryInsts,
+ .IntClampInsts,
+ .PkFmacF16Inst,
.SdwaOmod,
- .SdwaSdst,
+ .SdwaScalar,
+ .AddNoCarryInsts,
+ .Movrel,
+ .SMemrealtime,
+ .NoSdstCmpx,
+ .CiInsts,
.FlatAddressSpace,
+ .Sdwa,
+ .NoSramEccSupport,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .RegisterBanking,
+ .Dpp,
+ .Localmemorysize65536,
+ .Vop3p,
+ .BitInsts16,
+ .Dpp8,
.Gfx8Insts,
+ .Inv2piInlineImm,
+ .Gfx9Insts,
.FmaMixInsts,
- .PkFmacF16Inst,
- .Vop3Literal,
.MimgR128,
- .NoSramEccSupport,
- .IntClampInsts,
- .Movrel,
- .Dpp8,
- .ApertureRegs,
- .NoDataDepHazard,
- .CiInsts,
+ .Vop3Literal,
.FlatGlobalInsts,
- .BitInsts16,
.FlatScratchInsts,
- .SMemrealtime,
- .Vop3p,
- .FlatInstOffsets,
- .Inv2piInlineImm,
- .Localmemorysize65536,
- .Vscnt,
+ .Fp64,
+ .FastFmaf,
+ .NoDataDepHazard,
.Gfx10,
.InstFwdPrefetchBug,
.Ldsbankcount32,
@@ -187,8 +187,8 @@ pub const AmdGpuCpu = enum {
.VcmpxExecWarHazard,
.VcmpxPermlaneHazard,
.Wavefrontsize32,
- },
- CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx1011, "gfx1011", &[_]FeatureType {
.CodeObjectV3,
.DlInsts,
.NoXnackSupport,
@@ -197,40 +197,40 @@ pub const AmdGpuCpu = enum {
.Dot5Insts,
.Dot6Insts,
.FlatSegmentOffsetBug,
- .Gfx9Insts,
- .NoSdstCmpx,
- .Fp64,
- .FastFmaf,
- .Sdwa,
- .SdwaScalar,
- .Dpp,
- .RegisterBanking,
+ .Vscnt,
+ .ApertureRegs,
.Gfx10Insts,
- .AddNoCarryInsts,
+ .IntClampInsts,
+ .PkFmacF16Inst,
.SdwaOmod,
- .SdwaSdst,
+ .SdwaScalar,
+ .AddNoCarryInsts,
+ .Movrel,
+ .SMemrealtime,
+ .NoSdstCmpx,
+ .CiInsts,
.FlatAddressSpace,
+ .Sdwa,
+ .NoSramEccSupport,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .RegisterBanking,
+ .Dpp,
+ .Localmemorysize65536,
+ .Vop3p,
+ .BitInsts16,
+ .Dpp8,
.Gfx8Insts,
+ .Inv2piInlineImm,
+ .Gfx9Insts,
.FmaMixInsts,
- .PkFmacF16Inst,
- .Vop3Literal,
.MimgR128,
- .NoSramEccSupport,
- .IntClampInsts,
- .Movrel,
- .Dpp8,
- .ApertureRegs,
- .NoDataDepHazard,
- .CiInsts,
+ .Vop3Literal,
.FlatGlobalInsts,
- .BitInsts16,
.FlatScratchInsts,
- .SMemrealtime,
- .Vop3p,
- .FlatInstOffsets,
- .Inv2piInlineImm,
- .Localmemorysize65536,
- .Vscnt,
+ .Fp64,
+ .FastFmaf,
+ .NoDataDepHazard,
.Gfx10,
.InstFwdPrefetchBug,
.Ldsbankcount32,
@@ -246,8 +246,8 @@ pub const AmdGpuCpu = enum {
.VcmpxExecWarHazard,
.VcmpxPermlaneHazard,
.Wavefrontsize32,
- },
- CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx1012, "gfx1012", &[_]FeatureType {
.CodeObjectV3,
.DlInsts,
.NoXnackSupport,
@@ -256,40 +256,40 @@ pub const AmdGpuCpu = enum {
.Dot5Insts,
.Dot6Insts,
.FlatSegmentOffsetBug,
- .Gfx9Insts,
- .NoSdstCmpx,
- .Fp64,
- .FastFmaf,
- .Sdwa,
- .SdwaScalar,
- .Dpp,
- .RegisterBanking,
+ .Vscnt,
+ .ApertureRegs,
.Gfx10Insts,
- .AddNoCarryInsts,
+ .IntClampInsts,
+ .PkFmacF16Inst,
.SdwaOmod,
- .SdwaSdst,
+ .SdwaScalar,
+ .AddNoCarryInsts,
+ .Movrel,
+ .SMemrealtime,
+ .NoSdstCmpx,
+ .CiInsts,
.FlatAddressSpace,
+ .Sdwa,
+ .NoSramEccSupport,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .RegisterBanking,
+ .Dpp,
+ .Localmemorysize65536,
+ .Vop3p,
+ .BitInsts16,
+ .Dpp8,
.Gfx8Insts,
+ .Inv2piInlineImm,
+ .Gfx9Insts,
.FmaMixInsts,
- .PkFmacF16Inst,
- .Vop3Literal,
.MimgR128,
- .NoSramEccSupport,
- .IntClampInsts,
- .Movrel,
- .Dpp8,
- .ApertureRegs,
- .NoDataDepHazard,
- .CiInsts,
+ .Vop3Literal,
.FlatGlobalInsts,
- .BitInsts16,
.FlatScratchInsts,
- .SMemrealtime,
- .Vop3p,
- .FlatInstOffsets,
- .Inv2piInlineImm,
- .Localmemorysize65536,
- .Vscnt,
+ .Fp64,
+ .FastFmaf,
+ .NoDataDepHazard,
.Gfx10,
.InstFwdPrefetchBug,
.Ldsbankcount32,
@@ -306,392 +306,392 @@ pub const AmdGpuCpu = enum {
.VcmpxExecWarHazard,
.VcmpxPermlaneHazard,
.Wavefrontsize32,
- },
- CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx600, "gfx600", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.FastFmaf,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx601, "gfx601", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
- },
- CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx700, "gfx700", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx701, "gfx701", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.FastFmaf,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
- .SeaIslands,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
+ .SeaIslands,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx702, "gfx702", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.FastFmaf,
.Ldsbankcount16,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx703, "gfx703", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount16,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx704, "gfx704", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx801, "gfx801", &[_]FeatureType {
.CodeObjectV3,
.FastFmaf,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
.Xnack,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx802, "gfx802", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.SgprInitBug,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx803, "gfx803", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx810, "gfx810", &[_]FeatureType {
.CodeObjectV3,
.Ldsbankcount16,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
.Xnack,
- },
- CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx900, "gfx900", &[_]FeatureType {
.CodeObjectV3,
.NoSramEccSupport,
.NoXnackSupport,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
.MadMixInsts,
- },
- CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx902, "gfx902", &[_]FeatureType {
.CodeObjectV3,
.NoSramEccSupport,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
.MadMixInsts,
.Xnack,
- },
- CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx904, "gfx904", &[_]FeatureType {
.CodeObjectV3,
.NoSramEccSupport,
.NoXnackSupport,
.FmaMixInsts,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
- },
- CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx906, "gfx906", &[_]FeatureType {
.CodeObjectV3,
.DlInsts,
.NoXnackSupport,
.Dot1Insts,
.Dot2Insts,
.FmaMixInsts,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx908, "gfx908", &[_]FeatureType {
.AtomicFaddInsts,
.CodeObjectV3,
.DlInsts,
@@ -702,36 +702,36 @@ pub const AmdGpuCpu = enum {
.Dot5Insts,
.Dot6Insts,
.FmaMixInsts,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
.MaiInsts,
@@ -739,322 +739,322 @@ pub const AmdGpuCpu = enum {
.PkFmacF16Inst,
.SramEcc,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gfx909, "gfx909", &[_]FeatureType {
.CodeObjectV3,
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .Gfx9Insts,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
+ .Fp64,
+ .FastFmaf,
.Gfx9,
.Ldsbankcount32,
.MadMixInsts,
.Xnack,
- },
- CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hainan, "hainan", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
- },
- CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hawaii, "hawaii", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.FastFmaf,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Iceland, "iceland", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.SgprInitBug,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Kabini, "kabini", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount16,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Kaveri, "kaveri", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mullins, "mullins", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount16,
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
.SeaIslands,
- },
- CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Oland, "oland", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
- },
- CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pitcairn, "pitcairn", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
- },
- CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Polaris10, "polaris10", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Polaris11, "polaris11", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Stoney, "stoney", &[_]FeatureType {
.CodeObjectV3,
.Ldsbankcount16,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
.Xnack,
- },
- CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tahiti, "tahiti", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.FastFmaf,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
.HalfRate64Ops,
- },
- CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tonga, "tonga", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
.SgprInitBug,
.UnpackedD16Vmem,
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
.VolcanicIslands,
- },
- CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Verde, "verde", &[_]FeatureType {
.CodeObjectV3,
.NoXnackSupport,
.Ldsbankcount32,
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
.TrigReducedRange,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Localmemorysize32768,
.SouthernIslands,
- },
+ }),
};
};
lib/std/target/cpu/ArmCpu.zig
@@ -86,154 +86,154 @@ pub const ArmCpu = enum {
Swift,
Xscale,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.ArmFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.ArmFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Arm1020e, "arm1020e", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1020t, "arm1020t", &[_]FeatureType {
.V4t,
.Armv5t,
- },
- CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1022e, "arm1022e", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm10e, "arm10e", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
.V4t,
.Armv5t,
- },
- CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
.V4t,
.Dsp,
.Armv6,
- },
- CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
.V4t,
.Dsp,
.Armv6,
.Slowfpvmlx,
.Fpregs,
.Vfp2,
- },
- CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
.V4t,
+ .Thumb2,
.Dsp,
.Armv6t2,
- },
- CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
.V4t,
+ .Thumb2,
.Dsp,
.Armv6t2,
.Slowfpvmlx,
.Fpregs,
.Vfp2,
- },
- CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
.V4t,
.Trustzone,
.Armv6kz,
- },
- CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
.V4t,
.Trustzone,
.Armv6kz,
- },
- CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
.V4t,
.Trustzone,
.Armv6kz,
.Slowfpvmlx,
.Fpregs,
.Vfp2,
- },
- CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm710t, "arm710t", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm720t, "arm720t", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm8, "arm8", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm810, "arm810", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm9, "arm9", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm920, "arm920", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm920t, "arm920t", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm922t, "arm922t", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm940t, "arm940t", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm9e, "arm9e", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA12, "cortex-a12", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidPartialCpsr,
@@ -247,16 +247,16 @@ pub const ArmCpu = enum {
.Hwdiv,
.Virtualization,
.A12,
- },
- CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA15, "cortex-a15", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidPartialCpsr,
@@ -273,16 +273,16 @@ pub const ArmCpu = enum {
.Hwdiv,
.Virtualization,
.A15,
- },
- CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA17, "cortex-a17", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidPartialCpsr,
@@ -296,57 +296,57 @@ pub const ArmCpu = enum {
.Hwdiv,
.Virtualization,
.A17,
- },
- CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA32, "cortex-a32", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
- },
- CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
.A35,
- },
- CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA5, "cortex-a5", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.RetAddrStack,
@@ -358,84 +358,84 @@ pub const ArmCpu = enum {
.Vfp4,
.VmlxForwarding,
.A5,
- },
- CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
.Fpao,
.A53,
- },
- CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Dotprod,
.A55,
- },
- CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.AvoidPartialCpsr,
.CheapPredicableCpsr,
.Crypto,
.Fpao,
.A57,
- },
- CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA7, "cortex-a7", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.RetAddrStack,
@@ -451,128 +451,128 @@ pub const ArmCpu = enum {
.Hwdiv,
.Virtualization,
.A7,
- },
- CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
.A72,
- },
- CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
.A73,
- },
- CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Dotprod,
.A75,
- },
- CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Crypto,
.Dotprod,
.Fullfp16,
.A76,
- },
- CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Crypto,
.Dotprod,
.Fullfp16,
.A76,
- },
- CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA8, "cortex-a8", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.RetAddrStack,
@@ -583,16 +583,16 @@ pub const ArmCpu = enum {
.Trustzone,
.VmlxForwarding,
.A8,
- },
- CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexA9, "cortex-a9", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidPartialCpsr,
@@ -608,171 +608,171 @@ pub const ArmCpu = enum {
.Trustzone,
.VmlxForwarding,
.A9,
- },
- CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType {
- .Mclass,
- .StrictAlign,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM0, "cortex-m0", &[_]FeatureType {
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.Armv6M,
- },
- CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
- .Mclass,
- .StrictAlign,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.Armv6M,
- },
- CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType {
- .Mclass,
- .StrictAlign,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM1, "cortex-m1", &[_]FeatureType {
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.Armv6M,
- },
- CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType {
- .Mclass,
- .StrictAlign,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM23, "cortex-m23", &[_]FeatureType {
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Db,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.AcquireRelease,
+ .Hwdiv,
.Armv8Mbase,
.NoMovt,
- },
- CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM3, "cortex-m3", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
.Armv7M,
.NoBranchPredictor,
.LoopAlign,
.UseAa,
.UseMisched,
.M3,
- },
- CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM33, "cortex-m33", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
.AcquireRelease,
+ .Hwdiv,
.Armv8Mmain,
.Dsp,
- .Fp16,
.Fpregs,
+ .Fp16,
.FpArmv8d16sp,
.NoBranchPredictor,
.Slowfpvmlx,
.LoopAlign,
.UseAa,
.UseMisched,
- },
- CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
.AcquireRelease,
+ .Hwdiv,
.Armv8Mmain,
.Dsp,
- .Fp16,
.Fpregs,
+ .Fp16,
.FpArmv8d16sp,
.NoBranchPredictor,
.Slowfpvmlx,
.LoopAlign,
.UseAa,
.UseMisched,
- },
- CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM4, "cortex-m4", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
- .Dsp,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Dsp,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
.Armv7eM,
.NoBranchPredictor,
.Slowfpvmlx,
.LoopAlign,
.UseAa,
.UseMisched,
- .Fp16,
.Fpregs,
+ .Fp16,
.Vfp4d16sp,
- },
- CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexM7, "cortex-m7", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
- .Dsp,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Dsp,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
.Armv7eM,
- .Fp16,
.Fpregs,
+ .Fp16,
.FpArmv8d16,
- },
- CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR4, "cortex-r4", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
.Armv7R,
.AvoidPartialCpsr,
.RetAddrStack,
.R4,
- },
- CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
.Armv7R,
.AvoidPartialCpsr,
.RetAddrStack,
@@ -781,16 +781,16 @@ pub const ArmCpu = enum {
.Fpregs,
.Vfp3d16,
.R4,
- },
- CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR5, "cortex-r5", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
.Armv7R,
.AvoidPartialCpsr,
.HwdivArm,
@@ -800,39 +800,39 @@ pub const ArmCpu = enum {
.Fpregs,
.Vfp3d16,
.R5,
- },
- CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR52, "cortex-r52", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
.Crc,
- .Fp16,
+ .Fpregs,
+ .Mp,
.Dfb,
.Dsp,
- .Rclass,
- .V7clrex,
+ .Fp16,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .Db,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Rclass,
.Armv8R,
.Fpao,
.UseAa,
.UseMisched,
.R52,
- },
- CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR7, "cortex-r7", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
.Armv7R,
.AvoidPartialCpsr,
.Fp16,
@@ -844,16 +844,16 @@ pub const ArmCpu = enum {
.Fpregs,
.Vfp3d16,
.R7,
- },
- CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.CortexR8, "cortex-r8", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
.Armv7R,
.AvoidPartialCpsr,
.Fp16,
@@ -864,24 +864,24 @@ pub const ArmCpu = enum {
.SlowFpBrcc,
.Fpregs,
.Vfp3d16,
- },
- CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.AvoidMovsShop,
.AvoidPartialCpsr,
@@ -894,197 +894,197 @@ pub const ArmCpu = enum {
.Vfp4,
.Zcz,
.Swift,
- },
- CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ep9312, "ep9312", &[_]FeatureType {
.V4t,
.Armv4t,
- },
- CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
- .Zcz,
- .SlowVdup32,
+ .RetAddrStack,
.SlowVgetlni32,
- .DontWidenVmovs,
- .FuseAes,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
.ExpandFpMlx,
- .RetAddrStack,
- .UseAa,
.Exynos,
- },
- CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
- .Zcz,
- .SlowVdup32,
+ .RetAddrStack,
.SlowVgetlni32,
- .DontWidenVmovs,
- .FuseAes,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
.ExpandFpMlx,
- .RetAddrStack,
- .UseAa,
.Exynos,
- },
- CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
- .Zcz,
- .SlowVdup32,
+ .RetAddrStack,
.SlowVgetlni32,
- .DontWidenVmovs,
- .FuseAes,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
.ExpandFpMlx,
- .RetAddrStack,
- .UseAa,
.Exynos,
- },
- CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Dotprod,
.Fullfp16,
- .Zcz,
- .SlowVdup32,
+ .RetAddrStack,
.SlowVgetlni32,
- .DontWidenVmovs,
- .FuseAes,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
.ExpandFpMlx,
- .RetAddrStack,
- .UseAa,
.Exynos,
- },
- CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Dotprod,
.Fullfp16,
- .Zcz,
- .SlowVdup32,
+ .RetAddrStack,
.SlowVgetlni32,
- .DontWidenVmovs,
- .FuseAes,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
.ExpandFpMlx,
- .RetAddrStack,
- .UseAa,
.Exynos,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
.V4t,
.Armv5te,
- },
- CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Krait, "krait", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidPartialCpsr,
@@ -1097,107 +1097,107 @@ pub const ArmCpu = enum {
.Vfp4,
.VmlxForwarding,
.Krait,
- },
- CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv8A,
.Crypto,
.Kryo,
- },
- CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mpcore, "mpcore", &[_]FeatureType {
.V4t,
.Armv6k,
.Slowfpvmlx,
.Fpregs,
.Vfp2,
- },
- CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
.V4t,
.Armv6k,
- },
- CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
- .Thumb2,
- .Mp,
+ }),
+ CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
.Armv82A,
.Crypto,
.Dotprod,
- },
- CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType {
- .Mclass,
- .StrictAlign,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sc000, "sc000", &[_]FeatureType {
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.Armv6M,
- },
- CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType {
- .Thumb2,
- .Mclass,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sc300, "sc300", &[_]FeatureType {
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
.Armv7M,
.NoBranchPredictor,
.UseAa,
.UseMisched,
.M3,
- },
- CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Strongarm, "strongarm", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Strongarm110, "strongarm110", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
.Armv4,
- },
- CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType {
- .Thumb2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Swift, "swift", &[_]FeatureType {
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
.Armv7A,
.AvoidMovsShop,
@@ -1221,10 +1221,10 @@ pub const ArmCpu = enum {
.Fp16,
.Vfp4,
.Swift,
- },
- CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Xscale, "xscale", &[_]FeatureType {
.V4t,
.Armv5te,
- },
+ }),
};
};
lib/std/target/cpu/AvrCpu.zig
@@ -260,3604 +260,3604 @@ pub const AvrCpu = enum {
Avrxmega7,
M3000,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.AvrFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.AvrFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.At43usb320, "at43usb320", &[_]FeatureType {
+ .Lpm,
.Elpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr31,
- },
- CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr31,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At43usb355, "at43usb355", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr3,
- },
- CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At76c711, "at76c711", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr3,
- },
- CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At86rf401, "at86rf401", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr2,
.Lpmx,
.Movw,
- },
- CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90c8534, "at90c8534", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90can128, "at90can128", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90can32, "at90can32", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90can64, "at90can64", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
.Avr4,
- },
- CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s1200, "at90s1200", &[_]FeatureType {
.Avr0,
- },
- CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s2313, "at90s2313", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s2323, "at90s2323", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s2333, "at90s2333", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s2343, "at90s2343", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s4414, "at90s4414", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s4433, "at90s4433", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s4434, "at90s4434", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s8515, "at90s8515", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90s8535, "at90s8535", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType {
.Ijmpcall,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90scr100, "at90scr100", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb162, "at90usb162", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb646, "at90usb646", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb647, "at90usb647", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At90usb82, "at90usb82", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.At94k, "at94k", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr3,
.Lpmx,
.Movw,
.Mul,
- },
- CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata5272, "ata5272", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata5505, "ata5505", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata5790, "ata5790", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata5795, "ata5795", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata6285, "ata6285", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata6286, "ata6286", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ata6289, "ata6289", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega103, "atmega103", &[_]FeatureType {
+ .Lpm,
.Elpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr31,
- },
- CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Avr31,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega128, "atmega128", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega1280, "atmega1280", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega1281, "atmega1281", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega1284, "atmega1284", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
.Lpmx,
+ .Ijmpcall,
+ .Break,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega128a, "atmega128a", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16, "atmega16", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega161, "atmega161", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr3,
.Lpmx,
.Movw,
.Mul,
.Spm,
- },
- CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega162, "atmega162", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega163, "atmega163", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr3,
.Lpmx,
.Movw,
.Mul,
.Spm,
- },
- CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega164a, "atmega164a", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
- .Break,
- .Spm,
.Lpmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega164p, "atmega164p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega165, "atmega165", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega165a, "atmega165a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega165p, "atmega165p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega168, "atmega168", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega168a, "atmega168a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega168p, "atmega168p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega169, "atmega169", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega169a, "atmega169a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega169p, "atmega169p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16a, "atmega16a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Elpm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr6,
- },
- CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega2560, "atmega2560", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr6,
- },
- CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega2561, "atmega2561", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr6,
- },
- CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr6,
- },
- CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
+ .Movw,
+ .Elpmx,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32, "atmega32", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega323, "atmega323", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega324a, "atmega324a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega324p, "atmega324p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega325, "atmega325", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3250, "atmega3250", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
- .Break,
- .Spm,
.Lpmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega325a, "atmega325a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega325p, "atmega325p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega328, "atmega328", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega328p, "atmega328p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega329, "atmega329", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3290, "atmega3290", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega329a, "atmega329a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega329p, "atmega329p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32a, "atmega32a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
+ .Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega406, "atmega406", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
+ .Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega48, "atmega48", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega48a, "atmega48a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega48p, "atmega48p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
- .Jmpcall,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
- .Jmpcall,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64, "atmega64", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega640, "atmega640", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega644, "atmega644", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega644a, "atmega644a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega644p, "atmega644p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega645, "atmega645", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6450, "atmega6450", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega645a, "atmega645a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega645p, "atmega645p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega649, "atmega649", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6490, "atmega6490", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega649a, "atmega649a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega649p, "atmega649p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64a, "atmega64a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
+ .Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
+ .Spm,
+ .Avr0,
.Sram,
+ .Jmpcall,
+ .Addsubiw,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
+ .Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
+ .Spm,
+ .Avr0,
.Sram,
+ .Jmpcall,
+ .Addsubiw,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8, "atmega8", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8515, "atmega8515", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr2,
.Lpmx,
.Movw,
.Mul,
.Spm,
- },
- CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8535, "atmega8535", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr2,
.Lpmx,
.Movw,
.Mul,
.Spm,
- },
- CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega88, "atmega88", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega88a, "atmega88a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega88p, "atmega88p", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8a, "atmega8a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType {
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Tinyencoding,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny10, "attiny10", &[_]FeatureType {
.Avr0,
.Sram,
- .Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType {
.Break,
.Tinyencoding,
+ .Avrtiny,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny102, "attiny102", &[_]FeatureType {
.Avr0,
.Sram,
- .Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType {
.Break,
.Tinyencoding,
+ .Avrtiny,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny104, "attiny104", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType {
- .Lpm,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny11, "attiny11", &[_]FeatureType {
.Avr0,
- .Avr1,
- },
- CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType {
.Lpm,
+ .Avr1,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny12, "attiny12", &[_]FeatureType {
.Avr0,
+ .Lpm,
.Avr1,
- },
- CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny13, "attiny13", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny13a, "attiny13a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
.Avr25,
- },
- CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType {
- .Lpm,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny15, "attiny15", &[_]FeatureType {
.Avr0,
+ .Lpm,
.Avr1,
- },
- CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny1634, "attiny1634", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny167, "attiny167", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType {
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Tinyencoding,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny20, "attiny20", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny22, "attiny22", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType {
.Ijmpcall,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny2313, "attiny2313", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny24, "attiny24", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny24a, "attiny24a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny25, "attiny25", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny26, "attiny26", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
.Avr2,
.Lpmx,
- },
- CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny261, "attiny261", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny261a, "attiny261a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
.Avr25,
- },
- CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType {
- .Lpm,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny28, "attiny28", &[_]FeatureType {
.Avr0,
+ .Lpm,
.Avr1,
- },
- CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType {
- .Break,
- .Tinyencoding,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny4, "attiny4", &[_]FeatureType {
.Avr0,
.Sram,
- .Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType {
.Break,
.Tinyencoding,
+ .Avrtiny,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny40, "attiny40", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny4313, "attiny4313", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny43u, "attiny43u", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny44, "attiny44", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny44a, "attiny44a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny45, "attiny45", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny461, "attiny461", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny461a, "attiny461a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny48, "attiny48", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType {
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Tinyencoding,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny5, "attiny5", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType {
- .Ijmpcall,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny828, "attiny828", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny84, "attiny84", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny84a, "attiny84a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny85, "attiny85", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny861, "attiny861", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny861a, "attiny861a", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny87, "attiny87", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Sram,
.Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny88, "attiny88", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType {
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Tinyencoding,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Attiny9, "attiny9", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
.Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
- .Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
- .Lpmx,
.Spmx,
- .Avr0,
- .Jmpcall,
.Addsubiw,
- .Lpm,
- .Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
.Mul,
- .Rmw,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
.Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
- .Lpm,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
.Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
- .Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Eijmpcall,
- .Mul,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
- .Lpmx,
.Spmx,
- .Avr0,
- .Jmpcall,
.Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
.Mul,
- .Rmw,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
.Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
- .Lpm,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
.Lpm,
- .Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
- .Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Eijmpcall,
- .Mul,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
- .Lpmx,
.Spmx,
- .Avr0,
- .Jmpcall,
.Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
.Mul,
- .Sram,
- .Break,
- .Spm,
- .Elpm,
.Lpmx,
- .Spmx,
- .Avr0,
- .Jmpcall,
- .Addsubiw,
- .Lpm,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
- .Addsubiw,
- .Lpm,
- .Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
- .Addsubiw,
- .Lpm,
- .Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
+ .Lpmx,
.Rmw,
- .Sram,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmegau,
- },
- CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmegau,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
+ .Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
+ .Elpmx,
+ .Spm,
+ .Avr0,
+ .Sram,
+ .Jmpcall,
.Eijmpcall,
+ .Spmx,
+ .Addsubiw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Des,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
+ .Ijmpcall,
+ .Break,
.Xmega,
- },
- CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType {
- .Lpm,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr1, "avr1", &[_]FeatureType {
.Avr0,
+ .Lpm,
.Avr1,
- },
- CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType {
- .Ijmpcall,
- .Sram,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr2, "avr2", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr2,
- },
- CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType {
.Ijmpcall,
+ .Avr2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr25, "avr25", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr25,
- },
- CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Sram,
+ .Break,
+ .Avr25,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr3, "avr3", &[_]FeatureType {
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr3,
- },
- CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType {
.Ijmpcall,
- .Sram,
+ .Avr3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr31, "avr31", &[_]FeatureType {
+ .Lpm,
.Elpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr31,
- },
- CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType {
.Ijmpcall,
+ .Avr31,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr35, "avr35", &[_]FeatureType {
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr35,
- },
- CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType {
+ .Lpmx,
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Avr35,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr4, "avr4", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
- .Avr4,
- },
- CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType {
- .Ijmpcall,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
+ .Avr4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr5, "avr5", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr5,
- },
- CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr51, "avr51", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr51,
- },
- CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
- .Movw,
.Mul,
- .Sram,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Spm,
+ .Avr51,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avr6, "avr6", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
- .Avr6,
- },
- CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType {
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
.Break,
- .Tinyencoding,
+ .Avr6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrtiny, "avrtiny", &[_]FeatureType {
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
.Avrtiny,
- },
- CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
- .Ijmpcall,
- .Elpmx,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
+ .Lpm,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
.Ijmpcall,
- .Elpmx,
- .Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
.Break,
- .Spm,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
+ .Lpm,
.Elpm,
- .Lpmx,
- .Spmx,
+ .Movw,
+ .Elpmx,
+ .Spm,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
- .Xmega,
- },
- CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType {
.Ijmpcall,
- .Movw,
- .Mul,
- .Sram,
.Break,
+ .Xmega,
+ }),
+ CpuInfo(@This(), FeatureType).create(.M3000, "m3000", &[_]FeatureType {
+ .Lpm,
+ .Movw,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
.Avr5,
- },
+ }),
};
};
lib/std/target/cpu/BpfCpu.zig
@@ -8,22 +8,22 @@ pub const BpfCpu = enum {
V2,
V3,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.BpfFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.BpfFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType {
- },
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Probe, "probe", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V1, "v1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V2, "v2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V3, "v3", &[_]FeatureType {
+ }),
};
};
lib/std/target/cpu/empty.zig
@@ -1,6 +1,6 @@
const feature = @import("std").target.feature;
const CpuInfo = @import("std").target.cpu.CpuInfo;
-pub const EmptyCpu = enum {
- pub const cpu_infos = [0]CpuInfo(@This()) {};
+pub const EmptyCpu = struct {
+ pub const cpu_infos = [0]CpuInfo(@This(), feature.EmptyFeature) {};
};
lib/std/target/cpu/HexagonCpu.zig
@@ -10,14 +10,14 @@ pub const HexagonCpu = enum {
Hexagonv65,
Hexagonv66,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.HexagonFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.HexagonFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
.V5,
.V55,
.V60,
@@ -27,8 +27,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
.V5,
.Duplex,
.Memops,
@@ -36,8 +36,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
.V5,
.V55,
.Duplex,
@@ -46,8 +46,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
.V5,
.V55,
.V60,
@@ -57,8 +57,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
.V5,
.V55,
.V60,
@@ -69,8 +69,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
.V5,
.V55,
.V60,
@@ -83,8 +83,8 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
- CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
.V5,
.V55,
.V60,
@@ -98,6 +98,6 @@ pub const HexagonCpu = enum {
.Nvj,
.Nvs,
.SmallData,
- },
+ }),
};
};
lib/std/target/cpu/MipsCpu.zig
@@ -20,171 +20,171 @@ pub const MipsCpu = enum {
Octeon,
P5600,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.MipsFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.MipsFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Mips1, "mips1", &[_]FeatureType {
.Mips1,
- },
- CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips2, "mips2", &[_]FeatureType {
.Mips1,
.Mips2,
- },
- CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType {
- .Mips3_32,
- .Fp64,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips3, "mips3", &[_]FeatureType {
.Mips3_32r2,
- .Mips1,
+ .Fp64,
.Gp64,
- .Mips3,
- },
- CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
+ .Mips3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips32, "mips32", &[_]FeatureType {
.Mips4_32,
.Mips1,
- .Mips32,
- },
- CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType {
.Mips3_32,
+ .Mips32,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips32r2, "mips32r2", &[_]FeatureType {
+ .Mips5_32r2,
.Mips4_32r2,
.Mips3_32r2,
- .Mips1,
.Mips4_32,
- .Mips5_32r2,
- .Mips32r2,
- },
- CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Mips4_32r2,
+ .Mips32r2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips32r3, "mips32r3", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
- .Mips32r3,
- },
- CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Mips4_32r2,
+ .Mips32r3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips32r5, "mips32r5", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
- .Mips32r5,
- },
- CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Fp64,
+ .Mips32r5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips32r6, "mips32r6", &[_]FeatureType {
+ .Mips5_32r2,
+ .Mips3_32r2,
.Mips4_32r2,
.Abs2008,
- .Mips3_32r2,
- .Mips1,
- .Mips4_32,
.Nan2008,
- .Mips5_32r2,
- .Mips32r6,
- },
- CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType {
- .Mips3_32,
.Fp64,
- .Mips4_32r2,
- .Mips3_32r2,
- .Mips1,
.Mips4_32,
- .Gp64,
- .Mips4,
- },
- CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips32r6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips4, "mips4", &[_]FeatureType {
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
+ .Fp64,
.Gp64,
- .Mips5_32r2,
- .Mips5,
- },
- CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType {
+ .Mips4_32,
+ .Mips1,
.Mips3_32,
- .Fp64,
+ .Mips4,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips5, "mips5", &[_]FeatureType {
+ .Mips5_32r2,
.Mips4_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
.Gp64,
- .Mips5_32r2,
- .Mips64,
- },
- CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType {
- .Mips3_32,
.Fp64,
- .Mips4_32r2,
- .Mips3_32r2,
- .Mips1,
.Mips4_32,
- .Gp64,
- .Mips5_32r2,
- .Mips64r2,
- },
- CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips64, "mips64", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
- .Mips64r3,
- },
- CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType {
- .Mips3_32,
.Fp64,
- .Mips4_32r2,
- .Mips3_32r2,
- .Mips1,
.Mips4_32,
- .Gp64,
- .Mips5_32r2,
- .Mips64r5,
- },
- CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType {
+ .Mips1,
.Mips3_32,
- .Fp64,
+ .Mips64,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips64r2, "mips64r2", &[_]FeatureType {
+ .Mips5_32r2,
+ .Mips3_32r2,
.Mips4_32r2,
- .Abs2008,
+ .Gp64,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
+ .Mips64r2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips64r3, "mips64r3", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
+ .Mips4_32r2,
+ .Gp64,
+ .Fp64,
+ .Mips4_32,
.Mips1,
+ .Mips3_32,
+ .Mips64r3,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips64r5, "mips64r5", &[_]FeatureType {
+ .Mips5_32r2,
+ .Mips3_32r2,
+ .Mips4_32r2,
+ .Gp64,
+ .Fp64,
.Mips4_32,
+ .Mips1,
+ .Mips3_32,
+ .Mips64r5,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mips64r6, "mips64r6", &[_]FeatureType {
+ .Mips5_32r2,
+ .Mips3_32r2,
.Nan2008,
+ .Abs2008,
+ .Mips4_32r2,
+ .Fp64,
.Gp64,
- .Mips5_32r2,
- .Mips64r6,
- },
- CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType {
+ .Mips4_32,
+ .Mips1,
.Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips64r6,
+ }),
+ CpuInfo(@This(), FeatureType).create(.Octeon, "octeon", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
.Cnmips,
.Mips64r2,
- },
- CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType {
- .Mips3_32,
- .Mips4_32r2,
+ }),
+ CpuInfo(@This(), FeatureType).create(.P5600, "p5600", &[_]FeatureType {
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
+ .Mips1,
+ .Mips3_32,
.P5600,
- },
+ }),
};
};
lib/std/target/cpu/Msp430Cpu.zig
@@ -6,19 +6,19 @@ pub const Msp430Cpu = enum {
Msp430,
Msp430x,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.Msp430Feature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.Msp430Feature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Msp430, "msp430", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Msp430x, "msp430x", &[_]FeatureType {
.Ext,
- },
+ }),
};
};
lib/std/target/cpu/NvptxCpu.zig
@@ -18,68 +18,68 @@ pub const NvptxCpu = enum {
Sm_72,
Sm_75,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.NvptxFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.NvptxFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Sm_20, "sm_20", &[_]FeatureType {
.Sm_20,
- },
- CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_21, "sm_21", &[_]FeatureType {
.Sm_21,
- },
- CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_30, "sm_30", &[_]FeatureType {
.Sm_30,
- },
- CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_32, "sm_32", &[_]FeatureType {
.Ptx40,
.Sm_32,
- },
- CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_35, "sm_35", &[_]FeatureType {
.Sm_35,
- },
- CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_37, "sm_37", &[_]FeatureType {
.Ptx41,
.Sm_37,
- },
- CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_50, "sm_50", &[_]FeatureType {
.Ptx40,
.Sm_50,
- },
- CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_52, "sm_52", &[_]FeatureType {
.Ptx41,
.Sm_52,
- },
- CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_53, "sm_53", &[_]FeatureType {
.Ptx42,
.Sm_53,
- },
- CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_60, "sm_60", &[_]FeatureType {
.Ptx50,
.Sm_60,
- },
- CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_61, "sm_61", &[_]FeatureType {
.Ptx50,
.Sm_61,
- },
- CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_62, "sm_62", &[_]FeatureType {
.Ptx50,
.Sm_62,
- },
- CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_70, "sm_70", &[_]FeatureType {
.Ptx60,
.Sm_70,
- },
- CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_72, "sm_72", &[_]FeatureType {
.Ptx61,
.Sm_72,
- },
- CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sm_75, "sm_75", &[_]FeatureType {
.Ptx63,
.Sm_75,
- },
+ }),
};
};
lib/std/target/cpu/PowerPcCpu.zig
@@ -2,20 +2,20 @@ const feature = @import("std").target.feature;
const CpuInfo = @import("std").target.cpu.CpuInfo;
pub const PowerPcCpu = enum {
- 440,
- 450,
- 601,
- 602,
- 603,
+ Cpu440,
+ Cpu450,
+ Cpu601,
+ Cpu602,
+ Cpu603,
E603,
Ev603,
- 604,
+ Cpu604,
E604,
- 620,
- 7400,
- 7450,
- 750,
- 970,
+ Cpu620,
+ Cpu7400,
+ Cpu7450,
+ Cpu750,
+ Cpu970,
A2,
A2q,
E500,
@@ -23,7 +23,7 @@ pub const PowerPcCpu = enum {
E5500,
G3,
G4,
- G4+,
+ G4plus,
G5,
Generic,
Ppc,
@@ -40,14 +40,14 @@ pub const PowerPcCpu = enum {
Pwr8,
Pwr9,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.PowerPcFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.PowerPcFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.440, "440", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Cpu440, "440", &[_]FeatureType {
.Icbt,
.Booke,
.HardFloat,
@@ -55,8 +55,8 @@ pub const PowerPcCpu = enum {
.Frsqrte,
.Isel,
.Msync,
- },
- CpuInfo(@This()).create(.450, "450", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu450, "450", &[_]FeatureType {
.Icbt,
.Booke,
.HardFloat,
@@ -64,63 +64,63 @@ pub const PowerPcCpu = enum {
.Frsqrte,
.Isel,
.Msync,
- },
- CpuInfo(@This()).create(.601, "601", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu601, "601", &[_]FeatureType {
.HardFloat,
.Fpu,
- },
- CpuInfo(@This()).create(.602, "602", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu602, "602", &[_]FeatureType {
.HardFloat,
.Fpu,
- },
- CpuInfo(@This()).create(.603, "603", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu603, "603", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.E603, "603e", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ev603, "603ev", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.604, "604", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu604, "604", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.E604, "604e", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.620, "620", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu620, "620", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu7400, "7400", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu7450, "7450", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.750, "750", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu750, "750", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.970, "970", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cpu970, "970", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -129,8 +129,8 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.A2, "a2", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
@@ -151,8 +151,8 @@ pub const PowerPcCpu = enum {
.Recipprec,
.Stfiwx,
.SlowPopcntd,
- },
- CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.A2q, "a2q", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
@@ -174,20 +174,20 @@ pub const PowerPcCpu = enum {
.Recipprec,
.Stfiwx,
.SlowPopcntd,
- },
- CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.E500, "e500", &[_]FeatureType {
.Icbt,
.Booke,
.Isel,
- },
- CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.E500mc, "e500mc", &[_]FeatureType {
.Icbt,
.Booke,
.Isel,
.HardFloat,
.Stfiwx,
- },
- CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.E5500, "e5500", &[_]FeatureType {
.Bit64,
.Icbt,
.Booke,
@@ -195,25 +195,25 @@ pub const PowerPcCpu = enum {
.Mfocrf,
.HardFloat,
.Stfiwx,
- },
- CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.G3, "g3", &[_]FeatureType {
.HardFloat,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.G4, "g4", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.G4plus, "g4+", &[_]FeatureType {
.HardFloat,
.Altivec,
.Fres,
.Frsqrte,
- },
- CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.G5, "g5", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -222,17 +222,17 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
.HardFloat,
- },
- CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ppc, "ppc", &[_]FeatureType {
.HardFloat,
- },
- CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ppc32, "ppc32", &[_]FeatureType {
.HardFloat,
- },
- CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ppc64, "ppc64", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -241,8 +241,8 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ppc64le, "ppc64le", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -273,8 +273,8 @@ pub const PowerPcCpu = enum {
.Stfiwx,
.TwoConstNr,
.Vsx,
- },
- CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr3, "pwr3", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -282,8 +282,8 @@ pub const PowerPcCpu = enum {
.Frsqrte,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr4, "pwr4", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -292,8 +292,8 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr5, "pwr5", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -304,8 +304,8 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr5x, "pwr5x", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -317,8 +317,8 @@ pub const PowerPcCpu = enum {
.Fsqrt,
.Mfocrf,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr6, "pwr6", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -334,8 +334,8 @@ pub const PowerPcCpu = enum {
.Mfocrf,
.Recipprec,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr6x, "pwr6x", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -351,8 +351,8 @@ pub const PowerPcCpu = enum {
.Mfocrf,
.Recipprec,
.Stfiwx,
- },
- CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr7, "pwr7", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -376,8 +376,8 @@ pub const PowerPcCpu = enum {
.Stfiwx,
.TwoConstNr,
.Vsx,
- },
- CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr8, "pwr8", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -408,8 +408,8 @@ pub const PowerPcCpu = enum {
.Stfiwx,
.TwoConstNr,
.Vsx,
- },
- CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pwr9, "pwr9", &[_]FeatureType {
.Bit64,
.HardFloat,
.Altivec,
@@ -446,6 +446,6 @@ pub const PowerPcCpu = enum {
.TwoConstNr,
.Vsx,
.VectorsUseTwoUnits,
- },
+ }),
};
};
lib/std/target/cpu/RiscVCpu.zig
@@ -5,19 +5,19 @@ pub const RiscVCpu = enum {
GenericRv32,
GenericRv64,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.RiscVFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.RiscVFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
.RvcHints,
- },
- CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
.Bit64,
.RvcHints,
- },
+ }),
};
};
lib/std/target/cpu/SparcCpu.zig
@@ -43,174 +43,174 @@ pub const SparcCpu = enum {
V8,
V9,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.SparcFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.SparcFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.At697e, "at697e", &[_]FeatureType {
.Leon,
.Insertnopload,
- },
- CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.At697f, "at697f", &[_]FeatureType {
.Leon,
.Insertnopload,
- },
- CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.F934, "f934", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gr712rc, "gr712rc", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Gr740, "gr740", &[_]FeatureType {
.Leon,
.Leonpwrpsr,
.Hasleoncasa,
.Leoncyclecounter,
.Hasumacsmac,
- },
- CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Hypersparc, "hypersparc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Leon2, "leon2", &[_]FeatureType {
.Leon,
- },
- CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Leon3, "leon3", &[_]FeatureType {
.Leon,
.Hasumacsmac,
- },
- CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Leon4, "leon4", &[_]FeatureType {
.Leon,
.Hasleoncasa,
.Hasumacsmac,
- },
- CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2080, "ma2080", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2085, "ma2085", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2100, "ma2100", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2150, "ma2150", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2155, "ma2155", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2450, "ma2450", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2455, "ma2455", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2480, "ma2480", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2485, "ma2485", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Myriad2, "myriad2", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Myriad21, "myriad2.1", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Myriad22, "myriad2.2", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Myriad23, "myriad2.3", &[_]FeatureType {
.Leon,
.Hasleoncasa,
- },
- CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Niagara, "niagara", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
.Vis2,
- },
- CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Niagara2, "niagara2", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
.Vis2,
.Popc,
- },
- CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Niagara3, "niagara3", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
.Vis2,
.Popc,
- },
- CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Niagara4, "niagara4", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
.Vis2,
.Vis3,
.Popc,
- },
- CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sparclet, "sparclet", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sparclite, "sparclite", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Supersparc, "supersparc", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tsc701, "tsc701", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
- },
- CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
.DeprecatedV8,
.V9,
.Vis,
.Vis2,
- },
- CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ut699, "ut699", &[_]FeatureType {
.Leon,
.NoFmuls,
.NoFsmuld,
.Fixallfdivsqrt,
.Insertnopload,
- },
- CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V7, "v7", &[_]FeatureType {
.NoFsmuld,
.SoftMulDiv,
- },
- CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V8, "v8", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.V9, "v9", &[_]FeatureType {
.V9,
- },
+ }),
};
};
lib/std/target/cpu/SystemZCpu.zig
@@ -16,14 +16,14 @@ pub const SystemZCpu = enum {
Z196,
ZEC12,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.SystemZFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.SystemZFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Arch10, "arch10", &[_]FeatureType {
.DfpZonedConversion,
.DistinctOps,
.EnhancedDat2,
@@ -41,8 +41,8 @@ pub const SystemZCpu = enum {
.ProcessorAssist,
.ResetReferenceBitsMultiple,
.TransactionalExecution,
- },
- CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arch11, "arch11", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DistinctOps,
@@ -65,8 +65,8 @@ pub const SystemZCpu = enum {
.ResetReferenceBitsMultiple,
.TransactionalExecution,
.Vector,
- },
- CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arch12, "arch12", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DistinctOps,
@@ -96,8 +96,8 @@ pub const SystemZCpu = enum {
.Vector,
.VectorEnhancements1,
.VectorPackedDecimal,
- },
- CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arch13, "arch13", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DeflateConversion,
@@ -133,10 +133,10 @@ pub const SystemZCpu = enum {
.VectorEnhancements2,
.VectorPackedDecimal,
.VectorPackedDecimalEnhancement,
- },
- CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arch8, "arch8", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Arch9, "arch9", &[_]FeatureType {
.DistinctOps,
.FpExtension,
.FastSerialization,
@@ -147,12 +147,12 @@ pub const SystemZCpu = enum {
.MessageSecurityAssistExtension4,
.PopulationCount,
.ResetReferenceBitsMultiple,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Z10, "z10", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Z13, "z13", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DistinctOps,
@@ -175,8 +175,8 @@ pub const SystemZCpu = enum {
.ResetReferenceBitsMultiple,
.TransactionalExecution,
.Vector,
- },
- CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Z14, "z14", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DistinctOps,
@@ -206,8 +206,8 @@ pub const SystemZCpu = enum {
.Vector,
.VectorEnhancements1,
.VectorPackedDecimal,
- },
- CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Z15, "z15", &[_]FeatureType {
.DfpPackedConversion,
.DfpZonedConversion,
.DeflateConversion,
@@ -243,8 +243,8 @@ pub const SystemZCpu = enum {
.VectorEnhancements2,
.VectorPackedDecimal,
.VectorPackedDecimalEnhancement,
- },
- CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Z196, "z196", &[_]FeatureType {
.DistinctOps,
.FpExtension,
.FastSerialization,
@@ -255,8 +255,8 @@ pub const SystemZCpu = enum {
.MessageSecurityAssistExtension4,
.PopulationCount,
.ResetReferenceBitsMultiple,
- },
- CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.ZEC12, "zEC12", &[_]FeatureType {
.DfpZonedConversion,
.DistinctOps,
.EnhancedDat2,
@@ -274,6 +274,6 @@ pub const SystemZCpu = enum {
.ProcessorAssist,
.ResetReferenceBitsMultiple,
.TransactionalExecution,
- },
+ }),
};
};
lib/std/target/cpu/WebAssemblyCpu.zig
@@ -6,23 +6,23 @@ pub const WebAssemblyCpu = enum {
Generic,
Mvp,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.WebAssemblyFeature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.WebAssemblyFeature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
.Atomics,
.MutableGlobals,
.NontrappingFptoint,
.Simd128,
.SignExt,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType {
- },
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Mvp, "mvp", &[_]FeatureType {
+ }),
};
};
lib/std/target/cpu/X86Cpu.zig
@@ -82,14 +82,14 @@ pub const X86Cpu = enum {
Znver1,
Znver2,
- pub fn getInfo(self: @This()) CpuInfo {
+ const FeatureType = feature.X86Feature;
+
+ pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
return cpu_infos[@enumToInt(self)];
}
- pub const FeatureType = feature.X86Feature;
-
- const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
- CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType {
+ pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+ CpuInfo(@This(), FeatureType).create(.Amdfam10, "amdfam10", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -106,8 +106,8 @@ pub const X86Cpu = enum {
.Sse4a,
.SlowShld,
.X87,
- },
- CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Athlon, "athlon", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cmov,
@@ -116,8 +116,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Athlon4, "athlon-4", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cmov,
@@ -128,8 +128,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -143,8 +143,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cmov,
@@ -155,8 +155,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cmov,
@@ -165,8 +165,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cmov,
@@ -177,8 +177,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Athlon64, "athlon64", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -192,8 +192,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -208,8 +208,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Atom, "atom", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -229,8 +229,8 @@ pub const X86Cpu = enum {
.SlowTwoMemOps,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Barcelona, "barcelona", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -247,8 +247,8 @@ pub const X86Cpu = enum {
.Sse4a,
.SlowShld,
.X87,
- },
- CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Bdver1, "bdver1", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -271,8 +271,8 @@ pub const X86Cpu = enum {
.X87,
.Xop,
.Xsave,
- },
- CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Bdver2, "bdver2", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -300,8 +300,8 @@ pub const X86Cpu = enum {
.X87,
.Xop,
.Xsave,
- },
- CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Bdver3, "bdver3", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -331,8 +331,8 @@ pub const X86Cpu = enum {
.Xop,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Bdver4, "bdver4", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -365,8 +365,8 @@ pub const X86Cpu = enum {
.Xop,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Bonnell, "bonnell", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -386,8 +386,8 @@ pub const X86Cpu = enum {
.SlowTwoMemOps,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Broadwell, "broadwell", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -427,8 +427,8 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Btver1, "btver1", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -448,8 +448,8 @@ pub const X86Cpu = enum {
.Ssse3,
.SlowShld,
.X87,
- },
- CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Btver2, "btver2", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -481,14 +481,14 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.C3, "c3", &[_]FeatureType {
.Mmx,
.Dnow3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.C32, "c3-2", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -496,8 +496,8 @@ pub const X86Cpu = enum {
.Sse,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cannonlake, "cannonlake", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -552,8 +552,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cascadelake, "cascadelake", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -607,8 +607,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Cooperlake, "cooperlake", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -663,8 +663,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -692,8 +692,8 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -730,8 +730,8 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Core2, "core2", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -745,8 +745,8 @@ pub const X86Cpu = enum {
.Ssse3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Corei7, "corei7", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -760,8 +760,8 @@ pub const X86Cpu = enum {
.Sse,
.Sse42,
.X87,
- },
- CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -786,20 +786,20 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Geode, "geode", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Goldmont, "goldmont", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -830,8 +830,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -864,8 +864,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Haswell, "haswell", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -902,27 +902,27 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.I386, "i386", &[_]FeatureType {
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.I486, "i486", &[_]FeatureType {
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.I586, "i586", &[_]FeatureType {
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.I686, "i686", &[_]FeatureType {
.Cmov,
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -986,8 +986,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1053,8 +1053,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Ivybridge, "ivybridge", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -1082,28 +1082,28 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.K6, "k6", &[_]FeatureType {
.Cx8,
.Mmx,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.K62, "k6-2", &[_]FeatureType {
.Mmx,
.Dnow3,
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.K63, "k6-3", &[_]FeatureType {
.Mmx,
.Dnow3,
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.K8, "k8", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -1117,8 +1117,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -1133,8 +1133,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Knl, "knl", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1173,8 +1173,8 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Knm, "knm", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1214,10 +1214,10 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType {
- },
- CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Lakemont, "lakemont", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Nehalem, "nehalem", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1231,8 +1231,8 @@ pub const X86Cpu = enum {
.Sse,
.Sse42,
.X87,
- },
- CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Nocona, "nocona", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1244,8 +1244,8 @@ pub const X86Cpu = enum {
.Sse3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Opteron, "opteron", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -1259,8 +1259,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
.Mmx,
.Dnowa3,
.Bit64,
@@ -1275,8 +1275,8 @@ pub const X86Cpu = enum {
.SlowShld,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Penryn, "penryn", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1290,13 +1290,13 @@ pub const X86Cpu = enum {
.Sse41,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium, "pentium", &[_]FeatureType {
.Cx8,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.PentiumM, "pentium-m", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1306,14 +1306,14 @@ pub const X86Cpu = enum {
.Sse2,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
.Cx8,
.Mmx,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium2, "pentium2", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1321,8 +1321,8 @@ pub const X86Cpu = enum {
.Nopl,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium3, "pentium3", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1331,8 +1331,8 @@ pub const X86Cpu = enum {
.Sse,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium3m, "pentium3m", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1341,8 +1341,8 @@ pub const X86Cpu = enum {
.Sse,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium4, "pentium4", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1352,8 +1352,8 @@ pub const X86Cpu = enum {
.Sse2,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentium4m, "pentium4m", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1363,15 +1363,15 @@ pub const X86Cpu = enum {
.Sse2,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
.Cmov,
.Cx8,
.Nopl,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Prescott, "prescott", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1381,8 +1381,8 @@ pub const X86Cpu = enum {
.Sse3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Sandybridge, "sandybridge", &[_]FeatureType {
.Bit64,
.Sse,
.Avx,
@@ -1407,8 +1407,8 @@ pub const X86Cpu = enum {
.X87,
.Xsave,
.Xsaveopt,
- },
- CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Silvermont, "silvermont", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1432,8 +1432,8 @@ pub const X86Cpu = enum {
.SlowPmulld,
.SlowTwoMemOps,
.X87,
- },
- CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Skx, "skx", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1486,8 +1486,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Skylake, "skylake", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1533,8 +1533,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1587,8 +1587,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Slm, "slm", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1612,8 +1612,8 @@ pub const X86Cpu = enum {
.SlowPmulld,
.SlowTwoMemOps,
.X87,
- },
- CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tigerlake, "tigerlake", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1681,8 +1681,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Tremont, "tremont", &[_]FeatureType {
.Bit64,
.Sse,
.Aes,
@@ -1720,8 +1720,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Westmere, "westmere", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1736,19 +1736,19 @@ pub const X86Cpu = enum {
.Popcnt,
.Sse42,
.X87,
- },
- CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
.Mmx,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Winchip2, "winchip2", &[_]FeatureType {
.Mmx,
.Dnow3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.X8664, "x86-64", &[_]FeatureType {
.Bit64,
.Cmov,
.Cx8,
@@ -1761,8 +1761,8 @@ pub const X86Cpu = enum {
.Slow3opsLea,
.SlowIncdec,
.X87,
- },
- CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Yonah, "yonah", &[_]FeatureType {
.Cmov,
.Cx8,
.Fxsr,
@@ -1772,8 +1772,8 @@ pub const X86Cpu = enum {
.Sse3,
.SlowUnalignedMem16,
.X87,
- },
- CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Znver1, "znver1", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1814,8 +1814,8 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
- CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType {
+ }),
+ CpuInfo(@This(), FeatureType).create(.Znver2, "znver2", &[_]FeatureType {
.Bit64,
.Adx,
.Sse,
@@ -1859,6 +1859,6 @@ pub const X86Cpu = enum {
.Xsavec,
.Xsaveopt,
.Xsaves,
- },
+ }),
};
};
lib/std/target/feature/AArch64Feature.zig
@@ -155,7 +155,7 @@ pub const AArch64Feature = enum {
Thunderxt83,
Thunderxt88,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
@@ -291,19 +291,19 @@ pub const AArch64Feature = enum {
.Sve,
}),
FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() {
- .Sve,
.FpArmv8,
+ .Sve,
}),
FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() {
.Sve,
}),
FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() {
- .Sve,
.FpArmv8,
+ .Sve,
}),
FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() {
- .Sve,
.FpArmv8,
+ .Sve,
}),
FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"),
FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"),
@@ -323,101 +323,101 @@ pub const AArch64Feature = enum {
FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"),
FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"),
FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() {
- .ZczFp,
.ZczGp,
+ .ZczFp,
}),
FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"),
FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"),
FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"),
FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
- .Pan,
- .Rdm,
.Lse,
+ .Rdm,
.Crc,
.Lor,
+ .Pan,
.Vh,
}),
FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
- .Ccpp,
- .Pan,
- .Rdm,
.Lse,
+ .Rdm,
+ .Pan,
.Crc,
.Lor,
.Uaops,
- .Vh,
.Ras,
+ .Ccpp,
+ .Vh,
}),
FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
- .Rcpc,
- .Ccpp,
- .Pan,
- .Rdm,
- .FpArmv8,
.Lse,
- .Ccidx,
+ .Vh,
+ .Pa,
+ .Rdm,
+ .Pan,
.Crc,
.Lor,
- .Pa,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .Ccidx,
+ .FpArmv8,
}),
FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
- .Nv,
+ .Rdm,
+ .Dit,
.Am,
- .Lse,
+ .Ras,
+ .Rcpc,
.Sel2,
- .Lor,
- .Tracev84,
- .Uaops,
.Ccpp,
- .TlbRmi,
- .Fmi,
- .Rcpc,
- .Pan,
- .Rdm,
.Pa,
- .Dit,
- .Ras,
+ .Pan,
+ .Uaops,
+ .Tracev84,
.Mpam,
- .FpArmv8,
- .Ccidx,
+ .Lse,
+ .Nv,
.Dotprod,
+ .TlbRmi,
+ .Lor,
+ .Ccidx,
+ .FpArmv8,
.Crc,
+ .Fmi,
.Vh,
}),
FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
- .Nv,
+ .Vh,
+ .Rdm,
+ .Dit,
.Am,
- .Lse,
- .Fptoint,
+ .Ssbs,
+ .Specrestrict,
+ .Ras,
+ .Rcpc,
.Sel2,
- .Lor,
- .Tracev84,
- .Uaops,
- .Sb,
.Ccpp,
- .Specrestrict,
+ .Pa,
.Bti,
.Ccdp,
- .TlbRmi,
- .Fmi,
- .Rcpc,
.Pan,
- .Rdm,
- .Pa,
- .Ssbs,
- .Dit,
- .Ras,
+ .Uaops,
+ .Tracev84,
.Mpam,
+ .Lse,
+ .Sb,
+ .Nv,
.Altnzcv,
- .FpArmv8,
- .Ccidx,
.Dotprod,
- .Crc,
+ .TlbRmi,
+ .Lor,
+ .Ccidx,
.Predres,
- .Vh,
+ .Crc,
+ .Fptoint,
+ .Fmi,
+ .FpArmv8,
}),
FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() {
.Perfmon,
@@ -425,325 +425,325 @@ pub const AArch64Feature = enum {
.Crc,
}),
FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() {
- .UseAa,
- .FuseAes,
- .FpArmv8,
.Perfmon,
- .Crc,
- .BalanceFpOps,
.UsePostraScheduler,
+ .Crc,
.CustomCheapAsMove,
+ .BalanceFpOps,
+ .UseAa,
+ .FpArmv8,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() {
- .Rcpc,
- .Ccpp,
- .Pan,
+ .Lse,
+ .Vh,
.Rdm,
- .FuseAes,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() {
- .FuseLiterals,
- .FuseAes,
- .FpArmv8,
.Perfmon,
- .Crc,
- .BalanceFpOps,
.UsePostraScheduler,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
+ .CustomCheapAsMove,
+ .BalanceFpOps,
+ .FuseLiterals,
+ .FpArmv8,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() {
- .Rcpc,
- .Ccpp,
- .Pan,
- .Rdm,
- .FpArmv8,
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
}),
FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() {
.Perfmon,
- .FuseAes,
.FpArmv8,
.Crc,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() {
.Perfmon,
- .FuseAes,
.FpArmv8,
.Crc,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() {
- .Rcpc,
- .Ccpp,
- .Pan,
+ .Lse,
+ .Vh,
.Rdm,
- .FuseAes,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
.Uaops,
- .Vh,
.Ras,
- }),
- FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
.Rcpc,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ .FuseAes,
+ }),
+ FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
}),
FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() {
- .ZczFp,
+ .ArithBccFusion,
.ArithCbzFusion,
- .FuseAes,
+ .ZczFp,
.AlternateSextloadCvtF32Pattern,
- .ZczFpWorkaround,
- .FpArmv8,
- .Perfmon,
.DisableLatencySchedHeuristic,
- .Zcm,
+ .Perfmon,
.ZczGp,
- .ArithBccFusion,
+ .ZczFpWorkaround,
+ .Zcm,
+ .FpArmv8,
.FuseCryptoEor,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() {
.ZczFp,
- .FuseAes,
- .SlowPaired128,
- .Force32bitJumpTables,
- .UseReciprocalSquareRoot,
- .FpArmv8,
.Perfmon,
- .SlowMisaligned128store,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .UseReciprocalSquareRoot,
.CustomCheapAsMove,
+ .Force32bitJumpTables,
+ .SlowMisaligned128store,
+ .FpArmv8,
+ .SlowPaired128,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() {
.ZczFp,
- .FuseAes,
- .SlowPaired128,
- .Force32bitJumpTables,
- .FpArmv8,
.Perfmon,
- .SlowMisaligned128store,
- .Crc,
.UsePostraScheduler,
+ .Crc,
.CustomCheapAsMove,
+ .Force32bitJumpTables,
+ .SlowMisaligned128store,
+ .FpArmv8,
+ .SlowPaired128,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() {
+ .FuseCsel,
.ZczFp,
- .FuseLiterals,
- .FuseAes,
- .Force32bitJumpTables,
- .FpArmv8,
.Perfmon,
- .Crc,
- .LslFast,
- .FuseAddress,
.UsePostraScheduler,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
- .FuseCsel,
+ .CustomCheapAsMove,
+ .Force32bitJumpTables,
+ .FuseLiterals,
+ .FuseAddress,
+ .LslFast,
+ .FpArmv8,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() {
+ .ArithBccFusion,
+ .Vh,
+ .ArithCbzFusion,
.ZczFp,
- .Lse,
- .FuseArithLogic,
- .Lor,
+ .Rdm,
.UsePostraScheduler,
- .Uaops,
- .CustomCheapAsMove,
- .ArithBccFusion,
+ .Ras,
+ .Force32bitJumpTables,
.Ccpp,
- .Perfmon,
+ .FuseCsel,
.Pan,
- .Rdm,
+ .Uaops,
.FuseLiterals,
- .Force32bitJumpTables,
.LslFast,
+ .Lse,
+ .Perfmon,
+ .Dotprod,
+ .Lor,
+ .FuseArithLogic,
+ .Crc,
+ .CustomCheapAsMove,
.FuseAddress,
.ZczGp,
- .Ras,
- .FuseCsel,
- .ArithCbzFusion,
- .FuseAes,
.FpArmv8,
- .Crc,
- .Dotprod,
- .Vh,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() {
.ZczFp,
.Rdm,
- .SlowStrqroStore,
.Perfmon,
- .FpArmv8,
- .Crc,
- .LslFast,
.UsePostraScheduler,
- .ZczGp,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
+ .CustomCheapAsMove,
+ .ZczGp,
+ .FpArmv8,
+ .SlowStrqroStore,
+ .LslFast,
}),
FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() {
.ZczFp,
.Perfmon,
- .FpArmv8,
- .Crc,
- .LslFast,
.UsePostraScheduler,
- .ZczGp,
- .CustomCheapAsMove,
+ .Crc,
.PredictableSelectExpensive,
+ .CustomCheapAsMove,
+ .ZczGp,
+ .FpArmv8,
+ .LslFast,
}),
FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() {
- .Rcpc,
- .Ccpp,
- .Pan,
- .Rdm,
- .FpArmv8,
.Lse,
- .Crc,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
- }),
- FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
.Rcpc,
- .Spe,
.Ccpp,
- .Pan,
- .Rdm,
.FpArmv8,
+ }),
+ FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
.Lse,
- .Crc,
+ .Spe,
+ .Vh,
+ .Rdm,
+ .Pan,
.Dotprod,
- .Lor,
+ .Crc,
.Ssbs,
+ .Lor,
.Uaops,
- .Vh,
.Ras,
+ .Rcpc,
+ .Ccpp,
+ .FpArmv8,
}),
FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() {
+ .Spe,
+ .Vh,
.ZczFp,
- .Nv,
+ .Rdm,
+ .UsePostraScheduler,
+ .Dit,
.Am,
- .Lse,
+ .Ras,
+ .Rcpc,
.Sel2,
- .Lor,
- .Tracev84,
- .Uaops,
- .UsePostraScheduler,
- .CustomCheapAsMove,
.Ccpp,
+ .Pa,
+ .Pan,
+ .Uaops,
+ .Tracev84,
+ .Mpam,
+ .LslFast,
+ .Lse,
+ .Nv,
.Perfmon,
+ .Dotprod,
.TlbRmi,
+ .Lor,
+ .Ccidx,
.PredictableSelectExpensive,
+ .Crc,
+ .CustomCheapAsMove,
.Fmi,
- .Rcpc,
- .Pan,
- .Rdm,
- .LslFast,
- .Pa,
.ZczGp,
- .Dit,
- .Ras,
- .Spe,
- .Mpam,
.FpArmv8,
- .Ccidx,
- .Dotprod,
- .Crc,
- .Vh,
}),
FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() {
- .Uaops,
+ .Lse,
.Spe,
- .Ccpp,
- .Pan,
- .Rdm,
- .FuseAes,
.Vh,
+ .Rdm,
.Perfmon,
- .FpArmv8,
- .Lse,
- .Crc,
+ .UsePostraScheduler,
+ .Pan,
.Dotprod,
+ .Crc,
.Lor,
- .UsePostraScheduler,
+ .Uaops,
.CustomCheapAsMove,
.Ras,
+ .Ccpp,
+ .FpArmv8,
+ .FuseAes,
}),
FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
}),
FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() {
- .Pan,
- .Rdm,
- .Vh,
- .AggressiveFma,
- .FpArmv8,
.Lse,
+ .ArithBccFusion,
+ .Vh,
+ .Rdm,
+ .UsePostraScheduler,
.Crc,
.Lor,
- .UsePostraScheduler,
- .ArithBccFusion,
+ .Pan,
+ .AggressiveFma,
+ .FpArmv8,
.PredictableSelectExpensive,
}),
FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
}),
FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
}),
FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() {
.Perfmon,
- .FpArmv8,
- .Crc,
.UsePostraScheduler,
+ .Crc,
+ .FpArmv8,
.PredictableSelectExpensive,
}),
};
lib/std/target/feature/AmdGpuFeature.zig
@@ -110,7 +110,7 @@ pub const AmdGpuFeature = enum {
Xnack,
HalfRate64Ops,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
@@ -166,73 +166,73 @@ pub const AmdGpuFeature = enum {
FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"),
FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"),
FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() {
- .Gfx9Insts,
- .Wavefrontsize64,
- .Fp64,
- .Gcn3Encoding,
- .FastFmaf,
- .Sdwa,
+ .ApertureRegs,
+ .IntClampInsts,
+ .SdwaOmod,
.SdwaScalar,
- .VgprIndexMode,
- .Dpp,
.AddNoCarryInsts,
- .SdwaOmod,
- .SdwaSdst,
.ScalarAtomics,
+ .SMemrealtime,
+ .Gcn3Encoding,
+ .CiInsts,
.FlatAddressSpace,
- .ScalarFlatScratchInsts,
- .Gfx8Insts,
+ .Sdwa,
+ .Wavefrontsize64,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .ScalarStores,
.Gfx7Gfx8Gfx9Insts,
.R128A16,
- .IntClampInsts,
- .ScalarStores,
- .ApertureRegs,
- .CiInsts,
- .FlatGlobalInsts,
- .BitInsts16,
- .FlatScratchInsts,
- .SMemrealtime,
+ .Dpp,
+ .Localmemorysize65536,
.Vop3p,
- .FlatInstOffsets,
+ .BitInsts16,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
- }),
- FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
- FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
.Gfx9Insts,
- .NoSdstCmpx,
+ .ScalarFlatScratchInsts,
+ .FlatGlobalInsts,
+ .FlatScratchInsts,
.Fp64,
.FastFmaf,
- .Sdwa,
- .SdwaScalar,
- .Dpp,
- .RegisterBanking,
+ }),
+ FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
+ FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
+ .Vscnt,
+ .ApertureRegs,
.Gfx10Insts,
- .AddNoCarryInsts,
+ .IntClampInsts,
+ .PkFmacF16Inst,
.SdwaOmod,
- .SdwaSdst,
+ .SdwaScalar,
+ .AddNoCarryInsts,
+ .Movrel,
+ .SMemrealtime,
+ .NoSdstCmpx,
+ .CiInsts,
.FlatAddressSpace,
+ .Sdwa,
+ .NoSramEccSupport,
+ .SdwaSdst,
+ .FlatInstOffsets,
+ .RegisterBanking,
+ .Dpp,
+ .Localmemorysize65536,
+ .Vop3p,
+ .BitInsts16,
+ .Dpp8,
.Gfx8Insts,
+ .Inv2piInlineImm,
+ .Gfx9Insts,
.FmaMixInsts,
- .PkFmacF16Inst,
- .Vop3Literal,
.MimgR128,
- .NoSramEccSupport,
- .IntClampInsts,
- .Movrel,
- .Dpp8,
- .ApertureRegs,
- .NoDataDepHazard,
- .CiInsts,
+ .Vop3Literal,
.FlatGlobalInsts,
- .BitInsts16,
.FlatScratchInsts,
- .SMemrealtime,
- .Vop3p,
- .FlatInstOffsets,
- .Inv2piInlineImm,
- .Localmemorysize65536,
- .Vscnt,
+ .Fp64,
+ .FastFmaf,
+ .NoDataDepHazard,
}),
FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"),
FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"),
@@ -276,25 +276,25 @@ pub const AmdGpuFeature = enum {
FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"),
FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"),
FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() {
- .Wavefrontsize64,
- .MimgR128,
+ .Movrel,
+ .Gfx7Gfx8Gfx9Insts,
.Fp64,
+ .TrigReducedRange,
.CiInsts,
.FlatAddressSpace,
- .TrigReducedRange,
- .NoSramEccSupport,
- .Movrel,
.Localmemorysize65536,
- .Gfx7Gfx8Gfx9Insts,
+ .Wavefrontsize64,
+ .NoSramEccSupport,
+ .MimgR128,
}),
FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() {
- .Wavefrontsize64,
+ .Movrel,
.MimgR128,
.Fp64,
- .NoXnackSupport,
.TrigReducedRange,
+ .NoXnackSupport,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .Movrel,
.Ldsbankcount32,
.Localmemorysize32768,
}),
@@ -310,28 +310,28 @@ pub const AmdGpuFeature = enum {
FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"),
FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"),
FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() {
- .Wavefrontsize64,
- .Fp64,
+ .IntClampInsts,
+ .SdwaMav,
+ .Movrel,
+ .SMemrealtime,
.Gcn3Encoding,
.TrigReducedRange,
- .Sdwa,
- .VgprIndexMode,
- .Dpp,
+ .CiInsts,
.FlatAddressSpace,
- .Gfx8Insts,
- .Gfx7Gfx8Gfx9Insts,
- .MimgR128,
+ .Sdwa,
+ .Wavefrontsize64,
.NoSramEccSupport,
- .IntClampInsts,
.ScalarStores,
- .Movrel,
- .SdwaMav,
- .CiInsts,
+ .Gfx7Gfx8Gfx9Insts,
+ .Dpp,
+ .Localmemorysize65536,
.BitInsts16,
- .SMemrealtime,
+ .VgprIndexMode,
+ .Gfx8Insts,
.Inv2piInlineImm,
- .Localmemorysize65536,
+ .MimgR128,
.SdwaOutModsVopc,
+ .Fp64,
}),
FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"),
FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"),
lib/std/target/feature/ArmFeature.zig
@@ -177,7 +177,7 @@ pub const ArmFeature = enum {
Swift,
Xscale,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
@@ -215,283 +215,283 @@ pub const ArmFeature = enum {
.Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() {
- .Mclass,
- .StrictAlign,
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() {
- .Mclass,
- .StrictAlign,
+ .V4t,
.ThumbMode,
.Db,
- .V4t,
+ .StrictAlign,
+ .Mclass,
.Noarm,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() {
- .Thumb2,
.V4t,
+ .Thumb2,
.Dsp,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() {
- .Thumb2,
- .Mclass,
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
- .Dsp,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Dsp,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() {
- .Thumb2,
- .Mclass,
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
+ .Hwdiv,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Db,
- .Dsp,
- .Rclass,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Hwdiv,
+ .Rclass,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
- .Dsp,
- .V7clrex,
- .V4t,
- .Fpregs,
.D32,
- .Hwdiv,
- .HwdivArm,
+ .Mp,
+ .Fpregs,
+ .V4t,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
+ .Db,
.Aclass,
+ .Hwdiv,
.Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() {
- .Mclass,
- .StrictAlign,
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Db,
+ .StrictAlign,
+ .Mclass,
.Noarm,
.AcquireRelease,
+ .Hwdiv,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() {
- .Thumb2,
- .Mclass,
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Mclass,
.Noarm,
.AcquireRelease,
+ .Hwdiv,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
.Crc,
- .Fp16,
+ .Fpregs,
+ .Mp,
.Dfb,
.Dsp,
- .Rclass,
- .V7clrex,
+ .Fp16,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .Db,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Rclass,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() {
- .Thumb2,
- .Mclass,
.Perfmon,
+ .V4t,
.ThumbMode,
- .Db,
.Msecext8,
- .Ras,
.V7clrex,
- .V4t,
- .Hwdiv,
+ .Thumb2,
+ .Db,
+ .Ras,
+ .Mclass,
.Noarm,
- .Lob,
.AcquireRelease,
+ .Hwdiv,
+ .Lob,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() {
- .Thumb2,
- .Mp,
+ .HwdivArm,
.Perfmon,
- .Sb,
- .Db,
+ .D32,
+ .Fpregs,
.Crc,
+ .Mp,
.Fp16,
- .Ras,
.Dsp,
- .V7clrex,
.V4t,
- .Fpregs,
- .D32,
- .Hwdiv,
- .HwdivArm,
+ .V7clrex,
+ .Db,
.Aclass,
- .Trustzone,
+ .Thumb2,
+ .Ras,
+ .Sb,
.AcquireRelease,
+ .Hwdiv,
+ .Trustzone,
}),
FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"),
FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"),
FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"),
FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"),
@@ -500,8 +500,8 @@ pub const ArmFeature = enum {
FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"),
FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"),
FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"),
FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"),
@@ -509,37 +509,37 @@ pub const ArmFeature = enum {
FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"),
FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"),
FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"),
FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"),
FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"),
FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() {
.Fpregs,
}),
FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"),
FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() {
- .Fp16,
- .Fpregs,
.D32,
+ .Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() {
- .Fp16,
- .Fpregs,
.D32,
+ .Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"),
FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() {
@@ -549,8 +549,8 @@ pub const ArmFeature = enum {
.Fpregs,
}),
FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
@@ -569,8 +569,8 @@ pub const ArmFeature = enum {
FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"),
FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"),
FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"),
FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"),
@@ -592,8 +592,8 @@ pub const ArmFeature = enum {
FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"),
FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"),
FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"),
FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"),
@@ -617,8 +617,8 @@ pub const ArmFeature = enum {
.Fpregs,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() {
.Fpregs,
@@ -627,26 +627,26 @@ pub const ArmFeature = enum {
.Fpregs,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() {
- .Fpregs,
.D32,
+ .Fpregs,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() {
- .Fp16,
- .Fpregs,
.D32,
+ .Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() {
- .Fp16,
.Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() {
- .Fp16,
- .Fpregs,
.D32,
+ .Fpregs,
+ .Fp16,
}),
FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"),
FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() {
@@ -655,21 +655,21 @@ pub const ArmFeature = enum {
}),
FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"),
FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Fp16,
- .Dsp,
- .V7clrex,
.V4t,
.Fpregs,
+ .V7clrex,
+ .Fp16,
+ .Dsp,
+ .Thumb2,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Dsp,
- .V7clrex,
.V4t,
.Fpregs,
+ .V7clrex,
+ .Dsp,
+ .Thumb2,
}),
FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"),
FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() {
@@ -688,76 +688,76 @@ pub const ArmFeature = enum {
.V4t,
}),
FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() {
- .Thumb2,
.V4t,
+ .Thumb2,
}),
FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() {
- .V7clrex,
- .V4t,
.Perfmon,
.Thumb2,
+ .V4t,
+ .V7clrex,
}),
FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() {
.V4t,
}),
FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() {
- .V7clrex,
- .V4t,
.Perfmon,
.Thumb2,
+ .V4t,
+ .V7clrex,
}),
FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() {
- .Thumb2,
.Perfmon,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
}),
FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() {
- .V7clrex,
- .V4t,
.Perfmon,
.Thumb2,
+ .V4t,
+ .V7clrex,
}),
FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
}),
FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
}),
FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .V7clrex,
.V4t,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
}),
FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
}),
FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
- .Thumb2,
.Perfmon,
- .Sb,
- .V7clrex,
.V4t,
- .Fpregs,
.D32,
+ .Fpregs,
+ .V7clrex,
+ .Thumb2,
.AcquireRelease,
+ .Sb,
}),
FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() {
.V4t,
@@ -784,24 +784,24 @@ pub const ArmFeature = enum {
FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"),
FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"),
FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() {
- .Zcz,
- .SlowVdup32,
- .SlowVgetlni32,
- .DontWidenVmovs,
+ .HwdivArm,
+ .D32,
.Crc,
- .FuseAes,
+ .Fpregs,
+ .RetAddrStack,
+ .SlowVgetlni32,
.WideStrideVfp,
+ .SlowVdup32,
+ .SlowFpBrcc,
.ProfUnpr,
+ .DontWidenVmovs,
+ .Zcz,
+ .Hwdiv,
+ .FuseAes,
.Slowfpvmlx,
- .SlowFpBrcc,
+ .UseAa,
.FuseLiterals,
- .Fpregs,
- .D32,
.ExpandFpMlx,
- .Hwdiv,
- .HwdivArm,
- .RetAddrStack,
- .UseAa,
}),
FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"),
FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"),
lib/std/target/feature/AvrFeature.zig
@@ -35,160 +35,160 @@ pub const AvrFeature = enum {
Smallstack,
Tinyencoding,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"),
FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() {
- .Lpm,
.Avr0,
+ .Lpm,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() {
- .Ijmpcall,
- .Sram,
+ .Lpm,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() {
- .Ijmpcall,
- .Sram,
+ .Lpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() {
- .Ijmpcall,
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() {
- .Ijmpcall,
+ .Lpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() {
- .Ijmpcall,
- .Elpmx,
+ .Lpm,
+ .Elpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() {
- .Ijmpcall,
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() {
- .Ijmpcall,
- .Sram,
+ .Lpm,
.Elpm,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Ijmpcall,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() {
- .Ijmpcall,
+ .Lpm,
.Movw,
- .Sram,
- .Break,
.Spm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() {
- .Ijmpcall,
- .Elpmx,
+ .Lpm,
+ .Elpm,
.Movw,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
.Avr0,
+ .Sram,
.Jmpcall,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() {
- .Break,
- .Tinyencoding,
.Avr0,
.Sram,
+ .Break,
+ .Tinyencoding,
}),
FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() {
- .Ijmpcall,
- .Elpmx,
+ .Lpm,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
.Des,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() {
- .Ijmpcall,
- .Elpmx,
+ .Lpm,
+ .Elpm,
.Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
- .Break,
+ .Elpmx,
.Spm,
- .Elpm,
- .Lpmx,
- .Spmx,
.Avr0,
+ .Sram,
.Jmpcall,
+ .Eijmpcall,
+ .Spmx,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"),
FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"),
@@ -207,22 +207,22 @@ pub const AvrFeature = enum {
FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"),
FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"),
FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() {
- .Ijmpcall,
+ .Lpm,
+ .Elpm,
.Elpmx,
.Movw,
- .Eijmpcall,
- .Mul,
- .Rmw,
- .Sram,
- .Break,
- .Elpm,
.Spm,
- .Lpmx,
+ .Eijmpcall,
.Spmx,
.Jmpcall,
+ .Sram,
.Addsubiw,
- .Lpm,
+ .Mul,
+ .Lpmx,
+ .Rmw,
.Des,
+ .Ijmpcall,
+ .Break,
}),
FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"),
FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"),
lib/std/target/feature/BpfFeature.zig
@@ -5,7 +5,7 @@ pub const BpfFeature = enum {
Dummy,
Dwarfris,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/empty.zig
@@ -1,5 +1,5 @@
const FeatureInfo = @import("std").target.feature.FeatureInfo;
-pub const EmptyFeature = enum {
+pub const EmptyFeature = struct {
pub const feature_infos = [0]FeatureInfo(@This()) {};
-}
+};
lib/std/target/feature/HexagonFeature.zig
@@ -26,7 +26,7 @@ pub const HexagonFeature = enum {
ReservedR19,
SmallData,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/MipsFeature.zig
@@ -52,7 +52,7 @@ pub const MipsFeature = enum {
Xgot,
P5600,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
@@ -60,14 +60,14 @@ pub const MipsFeature = enum {
FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
@@ -91,128 +91,128 @@ pub const MipsFeature = enum {
.Mips1,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
- .Mips3_32,
- .Fp64,
.Mips3_32r2,
- .Mips1,
+ .Fp64,
.Gp64,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
+ .Fp64,
.Gp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
- .Mips3_32,
- .Fp64,
+ .Mips5_32r2,
.Mips4_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
- .Mips3_32,
.Mips4_32,
.Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
- .Mips3_32,
+ .Mips5_32r2,
.Mips4_32r2,
.Mips3_32r2,
- .Mips1,
.Mips4_32,
- .Mips5_32r2,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
- .Mips3_32,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
- .Mips3_32,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
- .Mips3_32,
- .Fp64,
+ .Mips5_32r2,
+ .Mips3_32r2,
.Mips4_32r2,
.Abs2008,
- .Mips3_32r2,
- .Mips1,
- .Mips4_32,
.Nan2008,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
+ .Mips4_32r2,
.Gp64,
- .Mips5_32r2,
+ .Fp64,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
- .Mips3_32,
- .Fp64,
- .Mips4_32r2,
- .Abs2008,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
- .Mips4_32,
.Nan2008,
+ .Abs2008,
+ .Mips4_32r2,
+ .Fp64,
.Gp64,
- .Mips5_32r2,
+ .Mips4_32,
+ .Mips1,
+ .Mips3_32,
}),
FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
@@ -227,12 +227,12 @@ pub const MipsFeature = enum {
FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
- .Mips3_32,
- .Mips4_32r2,
+ .Mips5_32r2,
.Mips3_32r2,
- .Mips1,
+ .Mips4_32r2,
.Mips4_32,
- .Mips5_32r2,
+ .Mips1,
+ .Mips3_32,
}),
};
};
lib/std/target/feature/Msp430Feature.zig
@@ -6,7 +6,7 @@ pub const Msp430Feature = enum {
Hwmultf5,
Ext,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/NvptxFeature.zig
@@ -27,7 +27,7 @@ pub const NvptxFeature = enum {
Sm_72,
Sm_75,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/PowerPcFeature.zig
@@ -53,7 +53,7 @@ pub const PowerPcFeature = enum {
Vsx,
VectorsUseTwoUnits,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/RiscVFeature.zig
@@ -11,7 +11,7 @@ pub const RiscVFeature = enum {
F,
M,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/SparcFeature.zig
@@ -21,7 +21,7 @@ pub const SparcFeature = enum {
Hasumacsmac,
Popc,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/SystemZFeature.zig
@@ -37,7 +37,7 @@ pub const SystemZFeature = enum {
VectorPackedDecimal,
VectorPackedDecimalEnhancement,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/WebAssemblyFeature.zig
@@ -12,7 +12,7 @@ pub const WebAssemblyFeature = enum {
TailCall,
UnimplementedSimd128,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
lib/std/target/feature/X86Feature.zig
@@ -128,7 +128,7 @@ pub const X86Feature = enum {
BitMode32,
BitMode64,
- pub fn getInfo(self: @This()) FeatureInfo {
+ pub fn getInfo(self: @This()) FeatureInfo(@This()) {
return feature_infos[@enumToInt(self)];
}
@@ -254,8 +254,8 @@ pub const X86Feature = enum {
FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"),
FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"),
FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() {
- .RetpolineIndirectBranches,
.RetpolineIndirectCalls,
+ .RetpolineIndirectBranches,
}),
FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() {
.RetpolineIndirectCalls,
lib/std/target/cpu.zig
@@ -1,7 +1,7 @@
const std = @import("std");
const feature = @import("feature.zig");
-const Arch = @import("arch.zig").Arch;
+const Arch = std.Target.Arch;
pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu;
pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu;
@@ -19,7 +19,7 @@ pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu;
pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu;
pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu;
-const EmptyCpu = @import("feature/empty.zig").EmptyCpu;
+pub const EmptyCpu = @import("cpu/empty.zig").EmptyCpu;
pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
return switch (arch) {
@@ -44,19 +44,21 @@ pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
}
pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type {
- return CpuInfo(feature.ArchFeature(arch));
+ return CpuInfo(ArchCpu(arch), feature.ArchFeature(arch));
}
-pub fn CpuInfo(comptime FeatureType: type) type {
+pub fn CpuInfo(comptime CpuType: type, comptime FeatureType: type) type {
return struct {
+ value: CpuType,
name: []const u8,
features: []const FeatureType,
const Self = @This();
- fn create(name: []const u8, features: []const FeatureType) Self {
+ pub fn create(value: CpuType, name: []const u8, features: []const FeatureType) Self {
return Self {
+ .value = value,
.name = name,
.features = features,
};
lib/std/target/feature.zig
@@ -17,7 +17,7 @@ pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature;
pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature;
pub const X86Feature = @import("feature/X86Feature.zig").X86Feature;
-const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
+pub const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
pub fn ArchFeature(comptime arch: @TagType(Arch)) type {
return switch (arch) {
@@ -49,24 +49,30 @@ pub fn FeatureInfo(comptime EnumType: type) type {
return struct {
value: EnumType,
name: []const u8,
+ description: []const u8,
+ llvm_name: []const u8,
subfeatures: []const EnumType,
const Self = @This();
- fn create(value: EnumType, name: []const u8) Self {
+ pub fn create(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8) Self {
return Self {
.value = value,
.name = name,
+ .description = description,
+ .llvm_name = llvm_name,
.subfeatures = &[_]EnumType{},
};
}
- fn createWithSubfeatures(value: EnumType, name: []const u8, subfeatures: []const EnumType) Self {
+ pub fn createWithSubfeatures(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8, subfeatures: []const EnumType) Self {
return Self {
.value = value,
.name = name,
+ .description = description,
+ .llvm_name = llvm_name,
.subfeatures = subfeatures,
};