Commit 1f2e3b39ae

Alex Rønne Petersen <alex@alexrp.com>
2025-06-30 07:04:35
test: Disable vector division operators on RISC-V with vector support
https://github.com/ziglang/zig/issues/24301
master
1 parent 1fcabe0
Changed files (1)
test
behavior
vector.zig
test/behavior/vector.zig
@@ -560,6 +560,7 @@ test "vector division operators" {
     if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
+    if (comptime builtin.cpu.has(.riscv, .v) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/24301
 
     const S = struct {
         fn doTheTestDiv(comptime T: type, x: @Vector(4, T), y: @Vector(4, T)) !void {