Commit 0941364d70

Alex Rønne Petersen <alex@alexrp.com>
2024-10-06 11:55:44
compiler-rt: Always use f16 as the half type for riscv.
master
1 parent 958f57d
Changed files (1)
lib
compiler_rt
common.zig
lib/compiler_rt/common.zig
@@ -103,7 +103,7 @@ pub fn F16T(comptime OtherType: type) type {
         else
             u16,
         .aarch64, .aarch64_be => f16,
-        .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
+        .riscv32, .riscv64 => f16,
         .x86, .x86_64 => if (builtin.target.isDarwin()) switch (OtherType) {
             // Starting with LLVM 16, Darwin uses different abi for f16
             // depending on the type of the other return/argument..???