Commit 085d049a08

Andrew Kelley <superjoe30@gmail.com>
2018-11-17 17:19:46
aarch64 improvements
* support C ABI for all return types * don't include __aeabi_uldivmod & co on aarch64 since it's 64 bit
1 parent 2a58027
Changed files (4)
src
std
special
compiler_rt
src/analyze.cpp
@@ -1059,7 +1059,7 @@ bool want_first_arg_sret(CodeGen *g, FnTypeId *fn_type_id) {
         }
         zig_panic("TODO implement C ABI for x86_64 return types. type '%s'\nSee https://github.com/ziglang/zig/issues/1481",
                 buf_ptr(&fn_type_id->return_type->name));
-    } else if (g->zig_target.arch.arch == ZigLLVM_arm || g->zig_target.arch.arch == ZigLLVM_armeb) {
+    } else if (target_is_arm(&g->zig_target)) {
         return type_size(g, fn_type_id->return_type) > 16;
     }
     zig_panic("TODO implement C ABI for this architecture. See https://github.com/ziglang/zig/issues/1481");
src/target.cpp
@@ -1011,3 +1011,64 @@ const char *arch_stack_pointer_register_name(const ArchType *arch) {
     }
     zig_unreachable();
 }
+
+bool target_is_arm(const ZigTarget *target) {
+    switch (target->arch.arch) {
+        case ZigLLVM_UnknownArch:
+            zig_unreachable();
+        case ZigLLVM_aarch64:
+        case ZigLLVM_arm:
+        case ZigLLVM_thumb:
+        case ZigLLVM_aarch64_be:
+        case ZigLLVM_armeb:
+        case ZigLLVM_thumbeb:
+            return true;
+
+        case ZigLLVM_x86:
+        case ZigLLVM_x86_64:
+        case ZigLLVM_amdgcn:
+        case ZigLLVM_amdil:
+        case ZigLLVM_amdil64:
+        case ZigLLVM_arc:
+        case ZigLLVM_avr:
+        case ZigLLVM_bpfeb:
+        case ZigLLVM_bpfel:
+        case ZigLLVM_hexagon:
+        case ZigLLVM_lanai:
+        case ZigLLVM_hsail:
+        case ZigLLVM_hsail64:
+        case ZigLLVM_kalimba:
+        case ZigLLVM_le32:
+        case ZigLLVM_le64:
+        case ZigLLVM_mips:
+        case ZigLLVM_mips64:
+        case ZigLLVM_mips64el:
+        case ZigLLVM_mipsel:
+        case ZigLLVM_msp430:
+        case ZigLLVM_nios2:
+        case ZigLLVM_nvptx:
+        case ZigLLVM_nvptx64:
+        case ZigLLVM_ppc64le:
+        case ZigLLVM_r600:
+        case ZigLLVM_renderscript32:
+        case ZigLLVM_renderscript64:
+        case ZigLLVM_riscv32:
+        case ZigLLVM_riscv64:
+        case ZigLLVM_shave:
+        case ZigLLVM_sparc:
+        case ZigLLVM_sparcel:
+        case ZigLLVM_sparcv9:
+        case ZigLLVM_spir:
+        case ZigLLVM_spir64:
+        case ZigLLVM_systemz:
+        case ZigLLVM_tce:
+        case ZigLLVM_tcele:
+        case ZigLLVM_wasm32:
+        case ZigLLVM_wasm64:
+        case ZigLLVM_xcore:
+        case ZigLLVM_ppc:
+        case ZigLLVM_ppc64:
+            return false;
+    }
+    zig_unreachable();
+}
src/target.hpp
@@ -121,4 +121,6 @@ Buf *target_dynamic_linker(ZigTarget *target);
 bool target_can_exec(const ZigTarget *host_target, const ZigTarget *guest_target);
 ZigLLVM_OSType get_llvm_os_type(Os os_type);
 
+bool target_is_arm(const ZigTarget *target);
+
 #endif
std/special/compiler_rt/index.zig
@@ -59,7 +59,7 @@ comptime {
     @export("__umoddi3", __umoddi3, linkage);
     @export("__udivmodsi4", __udivmodsi4, linkage);
 
-    if (isArmArch()) {
+    if (is_arm_arch and !is_arm_64) {
         @export("__aeabi_uldivmod", __aeabi_uldivmod, linkage);
         @export("__aeabi_uidivmod", __aeabi_uidivmod, linkage);
         @export("__aeabi_uidiv", __udivsi3, linkage);
@@ -149,68 +149,85 @@ extern fn __aeabi_uldivmod(numerator: u64, denominator: u64) AeabiUlDivModResult
     return result;
 }
 
-fn isArmArch() bool {
-    return switch (builtin.arch) {
-        builtin.Arch.armv8_3a,
-        builtin.Arch.armv8_2a,
-        builtin.Arch.armv8_1a,
-        builtin.Arch.armv8,
-        builtin.Arch.armv8r,
-        builtin.Arch.armv8m_baseline,
-        builtin.Arch.armv8m_mainline,
-        builtin.Arch.armv7,
-        builtin.Arch.armv7em,
-        builtin.Arch.armv7m,
-        builtin.Arch.armv7s,
-        builtin.Arch.armv7k,
-        builtin.Arch.armv7ve,
-        builtin.Arch.armv6,
-        builtin.Arch.armv6m,
-        builtin.Arch.armv6k,
-        builtin.Arch.armv6t2,
-        builtin.Arch.armv5,
-        builtin.Arch.armv5te,
-        builtin.Arch.armv4t,
-        builtin.Arch.armebv8_3a,
-        builtin.Arch.armebv8_2a,
-        builtin.Arch.armebv8_1a,
-        builtin.Arch.armebv8,
-        builtin.Arch.armebv8r,
-        builtin.Arch.armebv8m_baseline,
-        builtin.Arch.armebv8m_mainline,
-        builtin.Arch.armebv7,
-        builtin.Arch.armebv7em,
-        builtin.Arch.armebv7m,
-        builtin.Arch.armebv7s,
-        builtin.Arch.armebv7k,
-        builtin.Arch.armebv7ve,
-        builtin.Arch.armebv6,
-        builtin.Arch.armebv6m,
-        builtin.Arch.armebv6k,
-        builtin.Arch.armebv6t2,
-        builtin.Arch.armebv5,
-        builtin.Arch.armebv5te,
-        builtin.Arch.armebv4t,
-        builtin.Arch.aarch64v8_3a,
-        builtin.Arch.aarch64v8_2a,
-        builtin.Arch.aarch64v8_1a,
-        builtin.Arch.aarch64v8,
-        builtin.Arch.aarch64v8r,
-        builtin.Arch.aarch64v8m_baseline,
-        builtin.Arch.aarch64v8m_mainline,
-        builtin.Arch.aarch64_bev8_3a,
-        builtin.Arch.aarch64_bev8_2a,
-        builtin.Arch.aarch64_bev8_1a,
-        builtin.Arch.aarch64_bev8,
-        builtin.Arch.aarch64_bev8r,
-        builtin.Arch.aarch64_bev8m_baseline,
-        builtin.Arch.aarch64_bev8m_mainline,
-        builtin.Arch.thumb,
-        builtin.Arch.thumbeb,
-        => true,
-        else => false,
-    };
-}
+const is_arm_64 = switch (builtin.arch) {
+    builtin.Arch.aarch64v8_3a,
+    builtin.Arch.aarch64v8_2a,
+    builtin.Arch.aarch64v8_1a,
+    builtin.Arch.aarch64v8,
+    builtin.Arch.aarch64v8r,
+    builtin.Arch.aarch64v8m_baseline,
+    builtin.Arch.aarch64v8m_mainline,
+    builtin.Arch.aarch64_bev8_3a,
+    builtin.Arch.aarch64_bev8_2a,
+    builtin.Arch.aarch64_bev8_1a,
+    builtin.Arch.aarch64_bev8,
+    builtin.Arch.aarch64_bev8r,
+    builtin.Arch.aarch64_bev8m_baseline,
+    builtin.Arch.aarch64_bev8m_mainline,
+    => true,
+    else => false,
+};
+
+const is_arm_arch = switch (builtin.arch) {
+    builtin.Arch.armv8_3a,
+    builtin.Arch.armv8_2a,
+    builtin.Arch.armv8_1a,
+    builtin.Arch.armv8,
+    builtin.Arch.armv8r,
+    builtin.Arch.armv8m_baseline,
+    builtin.Arch.armv8m_mainline,
+    builtin.Arch.armv7,
+    builtin.Arch.armv7em,
+    builtin.Arch.armv7m,
+    builtin.Arch.armv7s,
+    builtin.Arch.armv7k,
+    builtin.Arch.armv7ve,
+    builtin.Arch.armv6,
+    builtin.Arch.armv6m,
+    builtin.Arch.armv6k,
+    builtin.Arch.armv6t2,
+    builtin.Arch.armv5,
+    builtin.Arch.armv5te,
+    builtin.Arch.armv4t,
+    builtin.Arch.armebv8_3a,
+    builtin.Arch.armebv8_2a,
+    builtin.Arch.armebv8_1a,
+    builtin.Arch.armebv8,
+    builtin.Arch.armebv8r,
+    builtin.Arch.armebv8m_baseline,
+    builtin.Arch.armebv8m_mainline,
+    builtin.Arch.armebv7,
+    builtin.Arch.armebv7em,
+    builtin.Arch.armebv7m,
+    builtin.Arch.armebv7s,
+    builtin.Arch.armebv7k,
+    builtin.Arch.armebv7ve,
+    builtin.Arch.armebv6,
+    builtin.Arch.armebv6m,
+    builtin.Arch.armebv6k,
+    builtin.Arch.armebv6t2,
+    builtin.Arch.armebv5,
+    builtin.Arch.armebv5te,
+    builtin.Arch.armebv4t,
+    builtin.Arch.aarch64v8_3a,
+    builtin.Arch.aarch64v8_2a,
+    builtin.Arch.aarch64v8_1a,
+    builtin.Arch.aarch64v8,
+    builtin.Arch.aarch64v8r,
+    builtin.Arch.aarch64v8m_baseline,
+    builtin.Arch.aarch64v8m_mainline,
+    builtin.Arch.aarch64_bev8_3a,
+    builtin.Arch.aarch64_bev8_2a,
+    builtin.Arch.aarch64_bev8_1a,
+    builtin.Arch.aarch64_bev8,
+    builtin.Arch.aarch64_bev8r,
+    builtin.Arch.aarch64_bev8m_baseline,
+    builtin.Arch.aarch64_bev8m_mainline,
+    builtin.Arch.thumb,
+    builtin.Arch.thumbeb,
+    => true,
+    else => false,
+};
 
 nakedcc fn __aeabi_uidivmod() void {
     @setRuntimeSafety(false);