Commit 060c475fcd

David Rubin <daviru007@icloud.com>
2024-03-14 03:26:10
riscv: update `start.zig` and restore ra from the proper stack offset
1 parent 5e77040
Changed files (2)
lib
src
arch
riscv64
lib/std/start.zig
@@ -155,7 +155,7 @@ fn exit2(code: usize) noreturn {
                 asm volatile ("ecall"
                     :
                     : [number] "{a7}" (94),
-                      [arg1] "{a0}" (0),
+                      [arg1] "{a0}" (code),
                     : "rcx", "r11", "memory"
                 );
             },
src/arch/riscv64/Emit.zig
@@ -287,7 +287,7 @@ fn mirPsuedo(emit: *Emit, inst: Mir.Inst.Index) !void {
             };
 
             // Restore ra
-            try emit.writeInstruction(Instruction.ld(.ra, stack_size - 16, .sp));
+            try emit.writeInstruction(Instruction.ld(.ra, stack_size - 8, .sp));
 
             // Restore s0
             try emit.writeInstruction(Instruction.ld(.s0, stack_size - 16, .sp));