Commit 01dc0d5a72
Changed files (2)
lib
std
src
codegen
lib/std/Target.zig
@@ -1967,7 +1967,6 @@ pub fn stackAlignment(target: Target) u16 {
.bpfel,
.mips64,
.mips64el,
- .riscv32,
.riscv64,
.sparc64,
.x86_64,
@@ -1976,6 +1975,8 @@ pub fn stackAlignment(target: Target) u16 {
.wasm64,
.loongarch64,
=> 16,
+ .riscv32,
+ => if (Target.riscv.featureSetHas(target.cpu.features, .e)) 4 else 16,
.powerpc64,
.powerpc64le,
=> switch (target.os.tag) {
src/codegen/llvm.zig
@@ -542,7 +542,8 @@ const DataLayoutBuilder = struct {
try self.typeAlignment(.float, 64, 64, 64, true, writer);
}
if (stack_abi != ptr_bit_width or self.target.cpu.arch == .msp430 or
- self.target.os.tag == .uefi or self.target.os.tag == .windows)
+ self.target.os.tag == .uefi or self.target.os.tag == .windows or
+ self.target.cpu.arch == .riscv32)
try writer.print("-S{d}", .{stack_abi});
switch (self.target.cpu.arch) {
.hexagon, .ve => {