Commit 019c884481
Changed files (2)
src
arch
x86_64
test
behavior
src/arch/x86_64/CodeGen.zig
@@ -6345,6 +6345,7 @@ fn genBinOp(
switch (air_tag) {
.add => .{ .v_ss, .add },
.sub => .{ .v_ss, .sub },
+ .mul => .{ .v_ss, .mul },
.div_float, .div_trunc, .div_floor, .div_exact => .{ .v_ss, .div },
.max => .{ .v_ss, .max },
.min => .{ .v_ss, .max },
@@ -6421,6 +6422,7 @@ fn genBinOp(
switch (air_tag) {
.add => .{ .v_ss, .add },
.sub => .{ .v_ss, .sub },
+ .mul => .{ .v_ss, .mul },
.div_float, .div_trunc, .div_floor, .div_exact => .{ .v_ss, .div },
.max => .{ .v_ss, .max },
.min => .{ .v_ss, .max },
@@ -6468,6 +6470,7 @@ fn genBinOp(
switch (air_tag) {
.add => .{ .v_ps, .add },
.sub => .{ .v_ps, .sub },
+ .mul => .{ .v_ps, .mul },
.div_float, .div_trunc, .div_floor, .div_exact => .{ .v_ps, .div },
.max => .{ .v_ps, .max },
.min => .{ .v_ps, .max },
@@ -6507,6 +6510,7 @@ fn genBinOp(
switch (air_tag) {
.add => .{ .v_ps, .add },
.sub => .{ .v_ps, .sub },
+ .mul => .{ .v_ps, .mul },
.div_float, .div_trunc, .div_floor, .div_exact => .{ .v_ps, .div },
.max => .{ .v_ps, .max },
.min => .{ .v_ps, .max },
@@ -6546,6 +6550,7 @@ fn genBinOp(
switch (air_tag) {
.add => .{ .v_ps, .add },
.sub => .{ .v_ps, .sub },
+ .mul => .{ .v_ps, .mul },
.div_float, .div_trunc, .div_floor, .div_exact => .{ .v_ps, .div },
.max => .{ .v_ps, .max },
.min => .{ .v_ps, .max },
test/behavior/floatop.zig
@@ -184,7 +184,7 @@ test "more @sqrt f16 tests" {
test "another, possibly redundant @sqrt test" {
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
- if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
+ if (no_x86_64_hardware_f16_support) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
try testSqrtLegacy(f64, 12.0);