master
 1const builtin = @import("builtin");
 2const std = @import("std");
 3
 4test "@prefetch()" {
 5    if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
 6    if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.isLoongArch()) return error.SkipZigTest; // https://github.com/llvm/llvm-project/issues/134624
 7
 8    var a: [2]u32 = .{ 42, 42 };
 9    var a_len = a.len;
10    _ = &a_len;
11
12    @prefetch(&a, .{});
13
14    @prefetch(&a[0], .{ .rw = .read, .locality = 3, .cache = .data });
15    @prefetch(&a, .{ .rw = .read, .locality = 2, .cache = .data });
16    @prefetch(a[0..].ptr, .{ .rw = .read, .locality = 1, .cache = .data });
17    @prefetch(a[0..a_len], .{ .rw = .read, .locality = 0, .cache = .data });
18
19    @prefetch(&a[0], .{ .rw = .write, .locality = 3, .cache = .data });
20    @prefetch(&a, .{ .rw = .write, .locality = 2, .cache = .data });
21    @prefetch(a[0..].ptr, .{ .rw = .write, .locality = 1, .cache = .data });
22    @prefetch(a[0..a_len], .{ .rw = .write, .locality = 0, .cache = .data });
23
24    @prefetch(&a[0], .{ .rw = .read, .locality = 3, .cache = .instruction });
25    @prefetch(&a, .{ .rw = .read, .locality = 2, .cache = .instruction });
26    @prefetch(a[0..].ptr, .{ .rw = .read, .locality = 1, .cache = .instruction });
27    @prefetch(a[0..a_len], .{ .rw = .read, .locality = 0, .cache = .instruction });
28
29    @prefetch(&a[0], .{ .rw = .write, .locality = 3, .cache = .instruction });
30    @prefetch(&a, .{ .rw = .write, .locality = 2, .cache = .instruction });
31    @prefetch(a[0..].ptr, .{ .rw = .write, .locality = 1, .cache = .instruction });
32    @prefetch(a[0..a_len], .{ .rw = .write, .locality = 0, .cache = .instruction });
33}