master
1pub const Mnemonic = enum(u16) {
2 // Arithmetics
3 addi,
4 add,
5 addw,
6
7 sub,
8 subw,
9
10 // Bits
11 xori,
12 xor,
13 @"or",
14
15 @"and",
16 andi,
17
18 slt,
19 sltu,
20 sltiu,
21
22 slli,
23 srli,
24 srai,
25
26 slliw,
27 srliw,
28 sraiw,
29
30 sll,
31 srl,
32 sra,
33
34 sllw,
35 srlw,
36 sraw,
37
38 // Control Flow
39 jalr,
40 jal,
41
42 beq,
43 bne,
44
45 // Memory
46 lui,
47 auipc,
48
49 ld,
50 lw,
51 lh,
52 lb,
53 lbu,
54 lhu,
55 lwu,
56
57 sd,
58 sw,
59 sh,
60 sb,
61
62 // System
63 ebreak,
64 ecall,
65 unimp,
66 nop,
67
68 // M extension
69 mul,
70 mulh,
71 mulhu,
72 mulhsu,
73 mulw,
74
75 div,
76 divu,
77 divw,
78 divuw,
79
80 rem,
81 remu,
82 remw,
83 remuw,
84
85 // F extension (32-bit float)
86 fadds,
87 fsubs,
88 fmuls,
89 fdivs,
90
91 fmins,
92 fmaxs,
93
94 fsqrts,
95
96 flw,
97 fsw,
98
99 feqs,
100 flts,
101 fles,
102
103 // D extension (64-bit float)
104 faddd,
105 fsubd,
106 fmuld,
107 fdivd,
108
109 fmind,
110 fmaxd,
111
112 fsqrtd,
113
114 fld,
115 fsd,
116
117 feqd,
118 fltd,
119 fled,
120
121 fcvtws,
122 fcvtwus,
123 fcvtls,
124 fcvtlus,
125
126 fcvtwd,
127 fcvtwud,
128 fcvtld,
129 fcvtlud,
130
131 fcvtsw,
132 fcvtswu,
133 fcvtsl,
134 fcvtslu,
135
136 fcvtdw,
137 fcvtdwu,
138 fcvtdl,
139 fcvtdlu,
140
141 fsgnjns,
142 fsgnjnd,
143
144 fsgnjxs,
145 fsgnjxd,
146
147 // Zicsr Extension Instructions
148 csrrs,
149
150 // V Extension Instructions
151 vsetvli,
152 vsetivli,
153 vaddvv,
154 vfaddvv,
155 vsubvv,
156 vfsubvv,
157 vmulvv,
158 vfmulvv,
159 vslidedownvx,
160
161 vle8v,
162 vle16v,
163 vle32v,
164 vle64v,
165
166 vse8v,
167 vse16v,
168 vse32v,
169 vse64v,
170
171 vadcvv,
172 vmvvx,
173
174 // Zbb Extension Instructions
175 clz,
176 clzw,
177 cpop,
178 cpopw,
179
180 // A Extension Instructions
181 fence,
182 fencetso,
183
184 lrw,
185 scw,
186 amoswapw,
187 amoaddw,
188 amoandw,
189 amoorw,
190 amoxorw,
191 amomaxw,
192 amominw,
193 amomaxuw,
194 amominuw,
195
196 lrd,
197 scd,
198 amoswapd,
199 amoaddd,
200 amoandd,
201 amoord,
202 amoxord,
203 amomaxd,
204 amomind,
205 amomaxud,
206 amominud,
207
208 // Pseudo-instructions. Used for anything that isn't 1:1 with an
209 // assembly instruction.
210
211 /// Pseudo-instruction that will generate a backpatched
212 /// function prologue.
213 pseudo_prologue,
214 /// Pseudo-instruction that will generate a backpatched
215 /// function epilogue
216 pseudo_epilogue,
217
218 /// Pseudo-instruction: End of prologue
219 pseudo_dbg_prologue_end,
220 /// Pseudo-instruction: Beginning of epilogue
221 pseudo_dbg_epilogue_begin,
222 /// Pseudo-instruction: Update debug line
223 pseudo_dbg_line_column,
224
225 /// Pseudo-instruction that loads from memory into a register.
226 pseudo_load_rm,
227 /// Pseudo-instruction that stores from a register into memory
228 pseudo_store_rm,
229 /// Pseudo-instruction that loads the address of memory into a register.
230 pseudo_lea_rm,
231 /// Jumps. Uses `inst` payload.
232 pseudo_j,
233 /// Dead inst, ignored by the emitter.
234 pseudo_dead,
235 /// Loads the address of a value that hasn't yet been allocated in memory.
236 pseudo_load_symbol,
237 /// Loads the address of a TLV.
238 pseudo_load_tlv,
239
240 /// Moves the value of rs1 to rd.
241 pseudo_mv,
242
243 pseudo_restore_regs,
244 pseudo_spill_regs,
245
246 pseudo_compare,
247 pseudo_not,
248 pseudo_extern_fn_reloc,
249};
250
251pub const Pseudo = enum(u8) {
252 li,
253 mv,
254 tail,
255 beqz,
256 ret,
257};