master
1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 @"16bit_mode",
9 @"32bit_mode",
10 @"3dnow",
11 @"3dnowa",
12 @"64bit",
13 adx,
14 aes,
15 allow_light_256_bit,
16 amx_avx512,
17 amx_bf16,
18 amx_complex,
19 amx_fp16,
20 amx_fp8,
21 amx_int8,
22 amx_movrs,
23 amx_tf32,
24 amx_tile,
25 amx_transpose,
26 avx,
27 avx10_1,
28 avx10_2,
29 avx2,
30 avx512bf16,
31 avx512bitalg,
32 avx512bw,
33 avx512cd,
34 avx512dq,
35 avx512er,
36 avx512f,
37 avx512fp16,
38 avx512ifma,
39 avx512pf,
40 avx512vbmi,
41 avx512vbmi2,
42 avx512vl,
43 avx512vnni,
44 avx512vp2intersect,
45 avx512vpopcntdq,
46 avxifma,
47 avxneconvert,
48 avxvnni,
49 avxvnniint16,
50 avxvnniint8,
51 bmi,
52 bmi2,
53 branch_hint,
54 branchfusion,
55 bsf_bsr_0_clobbers_result,
56 ccmp,
57 cf,
58 cldemote,
59 clflushopt,
60 clwb,
61 clzero,
62 cmov,
63 cmpccxadd,
64 crc32,
65 cx16,
66 cx8,
67 egpr,
68 enqcmd,
69 ermsb,
70 evex512,
71 f16c,
72 false_deps_getmant,
73 false_deps_lzcnt_tzcnt,
74 false_deps_mulc,
75 false_deps_mullq,
76 false_deps_perm,
77 false_deps_popcnt,
78 false_deps_range,
79 fast_11bytenop,
80 fast_15bytenop,
81 fast_7bytenop,
82 fast_bextr,
83 fast_dpwssd,
84 fast_gather,
85 fast_hops,
86 fast_imm16,
87 fast_lzcnt,
88 fast_movbe,
89 fast_scalar_fsqrt,
90 fast_scalar_shift_masks,
91 fast_shld_rotate,
92 fast_variable_crosslane_shuffle,
93 fast_variable_perlane_shuffle,
94 fast_vector_fsqrt,
95 fast_vector_shift_masks,
96 faster_shift_than_shuffle,
97 fma,
98 fma4,
99 fsgsbase,
100 fsrm,
101 fxsr,
102 gfni,
103 harden_sls_ijmp,
104 harden_sls_ret,
105 hreset,
106 idivl_to_divb,
107 idivq_to_divl,
108 inline_asm_use_gpr32,
109 invpcid,
110 kl,
111 lea_sp,
112 lea_uses_ag,
113 lvi_cfi,
114 lvi_load_hardening,
115 lwp,
116 lzcnt,
117 macrofusion,
118 mmx,
119 movbe,
120 movdir64b,
121 movdiri,
122 movrs,
123 mwaitx,
124 ndd,
125 nf,
126 no_bypass_delay,
127 no_bypass_delay_blend,
128 no_bypass_delay_mov,
129 no_bypass_delay_shuffle,
130 nopl,
131 pad_short_functions,
132 pclmul,
133 pconfig,
134 pku,
135 popcnt,
136 ppx,
137 prefer_128_bit,
138 prefer_256_bit,
139 prefer_mask_registers,
140 prefer_movmsk_over_vtest,
141 prefer_no_gather,
142 prefer_no_scatter,
143 prefetchi,
144 prefetchwt1,
145 prfchw,
146 ptwrite,
147 push2pop2,
148 raoint,
149 rdpid,
150 rdpru,
151 rdrnd,
152 rdseed,
153 retpoline,
154 retpoline_external_thunk,
155 retpoline_indirect_branches,
156 retpoline_indirect_calls,
157 rtm,
158 sahf,
159 sbb_dep_breaking,
160 serialize,
161 seses,
162 sgx,
163 sha,
164 sha512,
165 shstk,
166 slow_3ops_lea,
167 slow_incdec,
168 slow_lea,
169 slow_pmaddwd,
170 slow_pmulld,
171 slow_shld,
172 slow_two_mem_ops,
173 slow_unaligned_mem_16,
174 slow_unaligned_mem_32,
175 sm3,
176 sm4,
177 smap,
178 smep,
179 soft_float,
180 sse,
181 sse2,
182 sse3,
183 sse4_1,
184 sse4_2,
185 sse4a,
186 sse_unaligned_mem,
187 ssse3,
188 tagged_globals,
189 tbm,
190 tsxldtrk,
191 tuning_fast_imm_vector_shift,
192 uintr,
193 use_glm_div_sqrt_costs,
194 use_slm_arith_costs,
195 usermsr,
196 vaes,
197 vpclmulqdq,
198 vzeroupper,
199 waitpkg,
200 wbnoinvd,
201 widekl,
202 x87,
203 xop,
204 xsave,
205 xsavec,
206 xsaveopt,
207 xsaves,
208 zu,
209};
210
211pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
212pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
213pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
214pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
215
216pub const all_features = blk: {
217 const len = @typeInfo(Feature).@"enum".fields.len;
218 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
219 var result: [len]CpuFeature = undefined;
220 result[@intFromEnum(Feature.@"16bit_mode")] = .{
221 .llvm_name = "16bit-mode",
222 .description = "16-bit mode (i8086)",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@intFromEnum(Feature.@"32bit_mode")] = .{
226 .llvm_name = "32bit-mode",
227 .description = "32-bit mode (80386)",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@intFromEnum(Feature.@"3dnow")] = .{
231 .llvm_name = null,
232 .description = "Enable 3DNow! instructions",
233 .dependencies = featureSet(&[_]Feature{
234 .mmx,
235 }),
236 };
237 result[@intFromEnum(Feature.@"3dnowa")] = .{
238 .llvm_name = null,
239 .description = "Enable 3DNow! Athlon instructions",
240 .dependencies = featureSet(&[_]Feature{
241 .@"3dnow",
242 }),
243 };
244 result[@intFromEnum(Feature.@"64bit")] = .{
245 .llvm_name = "64bit",
246 .description = "Support 64-bit instructions",
247 .dependencies = featureSet(&[_]Feature{}),
248 };
249 result[@intFromEnum(Feature.adx)] = .{
250 .llvm_name = "adx",
251 .description = "Support ADX instructions",
252 .dependencies = featureSet(&[_]Feature{}),
253 };
254 result[@intFromEnum(Feature.aes)] = .{
255 .llvm_name = "aes",
256 .description = "Enable AES instructions",
257 .dependencies = featureSet(&[_]Feature{
258 .sse2,
259 }),
260 };
261 result[@intFromEnum(Feature.allow_light_256_bit)] = .{
262 .llvm_name = "allow-light-256-bit",
263 .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit",
264 .dependencies = featureSet(&[_]Feature{}),
265 };
266 result[@intFromEnum(Feature.amx_avx512)] = .{
267 .llvm_name = "amx-avx512",
268 .description = "Support AMX-AVX512 instructions",
269 .dependencies = featureSet(&[_]Feature{
270 .amx_tile,
271 }),
272 };
273 result[@intFromEnum(Feature.amx_bf16)] = .{
274 .llvm_name = "amx-bf16",
275 .description = "Support AMX-BF16 instructions",
276 .dependencies = featureSet(&[_]Feature{
277 .amx_tile,
278 }),
279 };
280 result[@intFromEnum(Feature.amx_complex)] = .{
281 .llvm_name = "amx-complex",
282 .description = "Support AMX-COMPLEX instructions",
283 .dependencies = featureSet(&[_]Feature{
284 .amx_tile,
285 }),
286 };
287 result[@intFromEnum(Feature.amx_fp16)] = .{
288 .llvm_name = "amx-fp16",
289 .description = "Support AMX amx-fp16 instructions",
290 .dependencies = featureSet(&[_]Feature{
291 .amx_tile,
292 }),
293 };
294 result[@intFromEnum(Feature.amx_fp8)] = .{
295 .llvm_name = "amx-fp8",
296 .description = "Support AMX-FP8 instructions",
297 .dependencies = featureSet(&[_]Feature{
298 .amx_tile,
299 }),
300 };
301 result[@intFromEnum(Feature.amx_int8)] = .{
302 .llvm_name = "amx-int8",
303 .description = "Support AMX-INT8 instructions",
304 .dependencies = featureSet(&[_]Feature{
305 .amx_tile,
306 }),
307 };
308 result[@intFromEnum(Feature.amx_movrs)] = .{
309 .llvm_name = "amx-movrs",
310 .description = "Support AMX-MOVRS instructions",
311 .dependencies = featureSet(&[_]Feature{
312 .amx_tile,
313 }),
314 };
315 result[@intFromEnum(Feature.amx_tf32)] = .{
316 .llvm_name = "amx-tf32",
317 .description = "Support AMX-TF32 instructions",
318 .dependencies = featureSet(&[_]Feature{
319 .amx_tile,
320 }),
321 };
322 result[@intFromEnum(Feature.amx_tile)] = .{
323 .llvm_name = "amx-tile",
324 .description = "Support AMX-TILE instructions",
325 .dependencies = featureSet(&[_]Feature{}),
326 };
327 result[@intFromEnum(Feature.amx_transpose)] = .{
328 .llvm_name = "amx-transpose",
329 .description = "Support AMX amx-transpose instructions",
330 .dependencies = featureSet(&[_]Feature{
331 .amx_tile,
332 }),
333 };
334 result[@intFromEnum(Feature.avx)] = .{
335 .llvm_name = "avx",
336 .description = "Enable AVX instructions",
337 .dependencies = featureSet(&[_]Feature{
338 .sse4_2,
339 }),
340 };
341 result[@intFromEnum(Feature.avx10_1)] = .{
342 .llvm_name = "avx10.1-512",
343 .description = "Support AVX10.1 up to 512-bit instruction",
344 .dependencies = featureSet(&[_]Feature{
345 .avx512bf16,
346 .avx512bitalg,
347 .avx512cd,
348 .avx512dq,
349 .avx512fp16,
350 .avx512ifma,
351 .avx512vbmi,
352 .avx512vbmi2,
353 .avx512vl,
354 .avx512vnni,
355 .avx512vpopcntdq,
356 }),
357 };
358 result[@intFromEnum(Feature.avx10_2)] = .{
359 .llvm_name = "avx10.2-512",
360 .description = "Support AVX10.2 up to 512-bit instruction",
361 .dependencies = featureSet(&[_]Feature{
362 .avx10_1,
363 }),
364 };
365 result[@intFromEnum(Feature.avx2)] = .{
366 .llvm_name = "avx2",
367 .description = "Enable AVX2 instructions",
368 .dependencies = featureSet(&[_]Feature{
369 .avx,
370 }),
371 };
372 result[@intFromEnum(Feature.avx512bf16)] = .{
373 .llvm_name = "avx512bf16",
374 .description = "Support bfloat16 floating point",
375 .dependencies = featureSet(&[_]Feature{
376 .avx512bw,
377 }),
378 };
379 result[@intFromEnum(Feature.avx512bitalg)] = .{
380 .llvm_name = "avx512bitalg",
381 .description = "Enable AVX-512 Bit Algorithms",
382 .dependencies = featureSet(&[_]Feature{
383 .avx512bw,
384 }),
385 };
386 result[@intFromEnum(Feature.avx512bw)] = .{
387 .llvm_name = "avx512bw",
388 .description = "Enable AVX-512 Byte and Word Instructions",
389 .dependencies = featureSet(&[_]Feature{
390 .avx512f,
391 }),
392 };
393 result[@intFromEnum(Feature.avx512cd)] = .{
394 .llvm_name = "avx512cd",
395 .description = "Enable AVX-512 Conflict Detection Instructions",
396 .dependencies = featureSet(&[_]Feature{
397 .avx512f,
398 }),
399 };
400 result[@intFromEnum(Feature.avx512dq)] = .{
401 .llvm_name = "avx512dq",
402 .description = "Enable AVX-512 Doubleword and Quadword Instructions",
403 .dependencies = featureSet(&[_]Feature{
404 .avx512f,
405 }),
406 };
407 result[@intFromEnum(Feature.avx512er)] = .{
408 .llvm_name = null,
409 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
410 .dependencies = featureSet(&[_]Feature{
411 .avx512f,
412 }),
413 };
414 result[@intFromEnum(Feature.avx512f)] = .{
415 .llvm_name = "avx512f",
416 .description = "Enable AVX-512 instructions",
417 .dependencies = featureSet(&[_]Feature{
418 .avx2,
419 .evex512,
420 .f16c,
421 .fma,
422 }),
423 };
424 result[@intFromEnum(Feature.avx512fp16)] = .{
425 .llvm_name = "avx512fp16",
426 .description = "Support 16-bit floating point",
427 .dependencies = featureSet(&[_]Feature{
428 .avx512bw,
429 }),
430 };
431 result[@intFromEnum(Feature.avx512ifma)] = .{
432 .llvm_name = "avx512ifma",
433 .description = "Enable AVX-512 Integer Fused Multiple-Add",
434 .dependencies = featureSet(&[_]Feature{
435 .avx512f,
436 }),
437 };
438 result[@intFromEnum(Feature.avx512pf)] = .{
439 .llvm_name = null,
440 .description = "Enable AVX-512 PreFetch Instructions",
441 .dependencies = featureSet(&[_]Feature{
442 .avx512f,
443 }),
444 };
445 result[@intFromEnum(Feature.avx512vbmi)] = .{
446 .llvm_name = "avx512vbmi",
447 .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
448 .dependencies = featureSet(&[_]Feature{
449 .avx512bw,
450 }),
451 };
452 result[@intFromEnum(Feature.avx512vbmi2)] = .{
453 .llvm_name = "avx512vbmi2",
454 .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
455 .dependencies = featureSet(&[_]Feature{
456 .avx512bw,
457 }),
458 };
459 result[@intFromEnum(Feature.avx512vl)] = .{
460 .llvm_name = "avx512vl",
461 .description = "Enable AVX-512 Vector Length eXtensions",
462 .dependencies = featureSet(&[_]Feature{
463 .avx512f,
464 }),
465 };
466 result[@intFromEnum(Feature.avx512vnni)] = .{
467 .llvm_name = "avx512vnni",
468 .description = "Enable AVX-512 Vector Neural Network Instructions",
469 .dependencies = featureSet(&[_]Feature{
470 .avx512f,
471 }),
472 };
473 result[@intFromEnum(Feature.avx512vp2intersect)] = .{
474 .llvm_name = "avx512vp2intersect",
475 .description = "Enable AVX-512 vp2intersect",
476 .dependencies = featureSet(&[_]Feature{
477 .avx512f,
478 }),
479 };
480 result[@intFromEnum(Feature.avx512vpopcntdq)] = .{
481 .llvm_name = "avx512vpopcntdq",
482 .description = "Enable AVX-512 Population Count Instructions",
483 .dependencies = featureSet(&[_]Feature{
484 .avx512f,
485 }),
486 };
487 result[@intFromEnum(Feature.avxifma)] = .{
488 .llvm_name = "avxifma",
489 .description = "Enable AVX-IFMA",
490 .dependencies = featureSet(&[_]Feature{
491 .avx2,
492 }),
493 };
494 result[@intFromEnum(Feature.avxneconvert)] = .{
495 .llvm_name = "avxneconvert",
496 .description = "Support AVX-NE-CONVERT instructions",
497 .dependencies = featureSet(&[_]Feature{
498 .avx2,
499 }),
500 };
501 result[@intFromEnum(Feature.avxvnni)] = .{
502 .llvm_name = "avxvnni",
503 .description = "Support AVX_VNNI encoding",
504 .dependencies = featureSet(&[_]Feature{
505 .avx2,
506 }),
507 };
508 result[@intFromEnum(Feature.avxvnniint16)] = .{
509 .llvm_name = "avxvnniint16",
510 .description = "Enable AVX-VNNI-INT16",
511 .dependencies = featureSet(&[_]Feature{
512 .avx2,
513 }),
514 };
515 result[@intFromEnum(Feature.avxvnniint8)] = .{
516 .llvm_name = "avxvnniint8",
517 .description = "Enable AVX-VNNI-INT8",
518 .dependencies = featureSet(&[_]Feature{
519 .avx2,
520 }),
521 };
522 result[@intFromEnum(Feature.bmi)] = .{
523 .llvm_name = "bmi",
524 .description = "Support BMI instructions",
525 .dependencies = featureSet(&[_]Feature{}),
526 };
527 result[@intFromEnum(Feature.bmi2)] = .{
528 .llvm_name = "bmi2",
529 .description = "Support BMI2 instructions",
530 .dependencies = featureSet(&[_]Feature{}),
531 };
532 result[@intFromEnum(Feature.branch_hint)] = .{
533 .llvm_name = "branch-hint",
534 .description = "Target has branch hint feature",
535 .dependencies = featureSet(&[_]Feature{}),
536 };
537 result[@intFromEnum(Feature.branchfusion)] = .{
538 .llvm_name = "branchfusion",
539 .description = "CMP/TEST can be fused with conditional branches",
540 .dependencies = featureSet(&[_]Feature{}),
541 };
542 result[@intFromEnum(Feature.bsf_bsr_0_clobbers_result)] = .{
543 .llvm_name = null,
544 .description = "BSF/BSR may clobber the lower 32-bits of the result register when the source is zero",
545 .dependencies = featureSet(&[_]Feature{}),
546 };
547 result[@intFromEnum(Feature.ccmp)] = .{
548 .llvm_name = "ccmp",
549 .description = "Support conditional cmp & test instructions",
550 .dependencies = featureSet(&[_]Feature{}),
551 };
552 result[@intFromEnum(Feature.cf)] = .{
553 .llvm_name = "cf",
554 .description = "Support conditional faulting",
555 .dependencies = featureSet(&[_]Feature{}),
556 };
557 result[@intFromEnum(Feature.cldemote)] = .{
558 .llvm_name = "cldemote",
559 .description = "Enable Cache Line Demote",
560 .dependencies = featureSet(&[_]Feature{}),
561 };
562 result[@intFromEnum(Feature.clflushopt)] = .{
563 .llvm_name = "clflushopt",
564 .description = "Flush A Cache Line Optimized",
565 .dependencies = featureSet(&[_]Feature{}),
566 };
567 result[@intFromEnum(Feature.clwb)] = .{
568 .llvm_name = "clwb",
569 .description = "Cache Line Write Back",
570 .dependencies = featureSet(&[_]Feature{}),
571 };
572 result[@intFromEnum(Feature.clzero)] = .{
573 .llvm_name = "clzero",
574 .description = "Enable Cache Line Zero",
575 .dependencies = featureSet(&[_]Feature{}),
576 };
577 result[@intFromEnum(Feature.cmov)] = .{
578 .llvm_name = "cmov",
579 .description = "Enable conditional move instructions",
580 .dependencies = featureSet(&[_]Feature{}),
581 };
582 result[@intFromEnum(Feature.cmpccxadd)] = .{
583 .llvm_name = "cmpccxadd",
584 .description = "Support CMPCCXADD instructions",
585 .dependencies = featureSet(&[_]Feature{}),
586 };
587 result[@intFromEnum(Feature.crc32)] = .{
588 .llvm_name = "crc32",
589 .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)",
590 .dependencies = featureSet(&[_]Feature{}),
591 };
592 result[@intFromEnum(Feature.cx16)] = .{
593 .llvm_name = "cx16",
594 .description = "64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips)",
595 .dependencies = featureSet(&[_]Feature{
596 .cx8,
597 }),
598 };
599 result[@intFromEnum(Feature.cx8)] = .{
600 .llvm_name = "cx8",
601 .description = "Support CMPXCHG8B instructions",
602 .dependencies = featureSet(&[_]Feature{}),
603 };
604 result[@intFromEnum(Feature.egpr)] = .{
605 .llvm_name = "egpr",
606 .description = "Support extended general purpose register",
607 .dependencies = featureSet(&[_]Feature{}),
608 };
609 result[@intFromEnum(Feature.enqcmd)] = .{
610 .llvm_name = "enqcmd",
611 .description = "Has ENQCMD instructions",
612 .dependencies = featureSet(&[_]Feature{}),
613 };
614 result[@intFromEnum(Feature.ermsb)] = .{
615 .llvm_name = "ermsb",
616 .description = "REP MOVS/STOS are fast",
617 .dependencies = featureSet(&[_]Feature{}),
618 };
619 result[@intFromEnum(Feature.evex512)] = .{
620 .llvm_name = "evex512",
621 .description = "Support ZMM and 64-bit mask instructions",
622 .dependencies = featureSet(&[_]Feature{}),
623 };
624 result[@intFromEnum(Feature.f16c)] = .{
625 .llvm_name = "f16c",
626 .description = "Support 16-bit floating point conversion instructions",
627 .dependencies = featureSet(&[_]Feature{
628 .avx,
629 }),
630 };
631 result[@intFromEnum(Feature.false_deps_getmant)] = .{
632 .llvm_name = "false-deps-getmant",
633 .description = "VGETMANTSS/SD/SH and VGETMANDPS/PD(memory version) has a false dependency on dest register",
634 .dependencies = featureSet(&[_]Feature{}),
635 };
636 result[@intFromEnum(Feature.false_deps_lzcnt_tzcnt)] = .{
637 .llvm_name = "false-deps-lzcnt-tzcnt",
638 .description = "LZCNT/TZCNT have a false dependency on dest register",
639 .dependencies = featureSet(&[_]Feature{}),
640 };
641 result[@intFromEnum(Feature.false_deps_mulc)] = .{
642 .llvm_name = "false-deps-mulc",
643 .description = "VF[C]MULCPH/SH has a false dependency on dest register",
644 .dependencies = featureSet(&[_]Feature{}),
645 };
646 result[@intFromEnum(Feature.false_deps_mullq)] = .{
647 .llvm_name = "false-deps-mullq",
648 .description = "VPMULLQ has a false dependency on dest register",
649 .dependencies = featureSet(&[_]Feature{}),
650 };
651 result[@intFromEnum(Feature.false_deps_perm)] = .{
652 .llvm_name = "false-deps-perm",
653 .description = "VPERMD/Q/PS/PD has a false dependency on dest register",
654 .dependencies = featureSet(&[_]Feature{}),
655 };
656 result[@intFromEnum(Feature.false_deps_popcnt)] = .{
657 .llvm_name = "false-deps-popcnt",
658 .description = "POPCNT has a false dependency on dest register",
659 .dependencies = featureSet(&[_]Feature{}),
660 };
661 result[@intFromEnum(Feature.false_deps_range)] = .{
662 .llvm_name = "false-deps-range",
663 .description = "VRANGEPD/PS/SD/SS has a false dependency on dest register",
664 .dependencies = featureSet(&[_]Feature{}),
665 };
666 result[@intFromEnum(Feature.fast_11bytenop)] = .{
667 .llvm_name = "fast-11bytenop",
668 .description = "Target can quickly decode up to 11 byte NOPs",
669 .dependencies = featureSet(&[_]Feature{}),
670 };
671 result[@intFromEnum(Feature.fast_15bytenop)] = .{
672 .llvm_name = "fast-15bytenop",
673 .description = "Target can quickly decode up to 15 byte NOPs",
674 .dependencies = featureSet(&[_]Feature{}),
675 };
676 result[@intFromEnum(Feature.fast_7bytenop)] = .{
677 .llvm_name = "fast-7bytenop",
678 .description = "Target can quickly decode up to 7 byte NOPs",
679 .dependencies = featureSet(&[_]Feature{}),
680 };
681 result[@intFromEnum(Feature.fast_bextr)] = .{
682 .llvm_name = "fast-bextr",
683 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
684 .dependencies = featureSet(&[_]Feature{}),
685 };
686 result[@intFromEnum(Feature.fast_dpwssd)] = .{
687 .llvm_name = "fast-dpwssd",
688 .description = "Prefer vpdpwssd instruction over vpmaddwd+vpaddd instruction sequence",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@intFromEnum(Feature.fast_gather)] = .{
692 .llvm_name = "fast-gather",
693 .description = "Indicates if gather is reasonably fast (this is true for Skylake client and all AVX-512 CPUs)",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@intFromEnum(Feature.fast_hops)] = .{
697 .llvm_name = "fast-hops",
698 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@intFromEnum(Feature.fast_imm16)] = .{
702 .llvm_name = "fast-imm16",
703 .description = "Prefer a i16 instruction with i16 immediate over extension to i32",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@intFromEnum(Feature.fast_lzcnt)] = .{
707 .llvm_name = "fast-lzcnt",
708 .description = "LZCNT instructions are as fast as most simple integer ops",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@intFromEnum(Feature.fast_movbe)] = .{
712 .llvm_name = "fast-movbe",
713 .description = "Prefer a movbe over a single-use load + bswap / single-use bswap + store",
714 .dependencies = featureSet(&[_]Feature{}),
715 };
716 result[@intFromEnum(Feature.fast_scalar_fsqrt)] = .{
717 .llvm_name = "fast-scalar-fsqrt",
718 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
719 .dependencies = featureSet(&[_]Feature{}),
720 };
721 result[@intFromEnum(Feature.fast_scalar_shift_masks)] = .{
722 .llvm_name = "fast-scalar-shift-masks",
723 .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
724 .dependencies = featureSet(&[_]Feature{}),
725 };
726 result[@intFromEnum(Feature.fast_shld_rotate)] = .{
727 .llvm_name = "fast-shld-rotate",
728 .description = "SHLD can be used as a faster rotate",
729 .dependencies = featureSet(&[_]Feature{}),
730 };
731 result[@intFromEnum(Feature.fast_variable_crosslane_shuffle)] = .{
732 .llvm_name = "fast-variable-crosslane-shuffle",
733 .description = "Cross-lane shuffles with variable masks are fast",
734 .dependencies = featureSet(&[_]Feature{}),
735 };
736 result[@intFromEnum(Feature.fast_variable_perlane_shuffle)] = .{
737 .llvm_name = "fast-variable-perlane-shuffle",
738 .description = "Per-lane shuffles with variable masks are fast",
739 .dependencies = featureSet(&[_]Feature{}),
740 };
741 result[@intFromEnum(Feature.fast_vector_fsqrt)] = .{
742 .llvm_name = "fast-vector-fsqrt",
743 .description = "Vector SQRT is fast (disable Newton-Raphson)",
744 .dependencies = featureSet(&[_]Feature{}),
745 };
746 result[@intFromEnum(Feature.fast_vector_shift_masks)] = .{
747 .llvm_name = "fast-vector-shift-masks",
748 .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
749 .dependencies = featureSet(&[_]Feature{}),
750 };
751 result[@intFromEnum(Feature.faster_shift_than_shuffle)] = .{
752 .llvm_name = "faster-shift-than-shuffle",
753 .description = "Shifts are faster (or as fast) as shuffle",
754 .dependencies = featureSet(&[_]Feature{}),
755 };
756 result[@intFromEnum(Feature.fma)] = .{
757 .llvm_name = "fma",
758 .description = "Enable three-operand fused multiple-add",
759 .dependencies = featureSet(&[_]Feature{
760 .avx,
761 }),
762 };
763 result[@intFromEnum(Feature.fma4)] = .{
764 .llvm_name = "fma4",
765 .description = "Enable four-operand fused multiple-add",
766 .dependencies = featureSet(&[_]Feature{
767 .avx,
768 .sse4a,
769 }),
770 };
771 result[@intFromEnum(Feature.fsgsbase)] = .{
772 .llvm_name = "fsgsbase",
773 .description = "Support FS/GS Base instructions",
774 .dependencies = featureSet(&[_]Feature{}),
775 };
776 result[@intFromEnum(Feature.fsrm)] = .{
777 .llvm_name = "fsrm",
778 .description = "REP MOVSB of short lengths is faster",
779 .dependencies = featureSet(&[_]Feature{}),
780 };
781 result[@intFromEnum(Feature.fxsr)] = .{
782 .llvm_name = "fxsr",
783 .description = "Support fxsave/fxrestore instructions",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
786 result[@intFromEnum(Feature.gfni)] = .{
787 .llvm_name = "gfni",
788 .description = "Enable Galois Field Arithmetic Instructions",
789 .dependencies = featureSet(&[_]Feature{
790 .sse2,
791 }),
792 };
793 result[@intFromEnum(Feature.harden_sls_ijmp)] = .{
794 .llvm_name = "harden-sls-ijmp",
795 .description = "Harden against straight line speculation across indirect JMP instructions.",
796 .dependencies = featureSet(&[_]Feature{}),
797 };
798 result[@intFromEnum(Feature.harden_sls_ret)] = .{
799 .llvm_name = "harden-sls-ret",
800 .description = "Harden against straight line speculation across RET instructions.",
801 .dependencies = featureSet(&[_]Feature{}),
802 };
803 result[@intFromEnum(Feature.hreset)] = .{
804 .llvm_name = "hreset",
805 .description = "Has hreset instruction",
806 .dependencies = featureSet(&[_]Feature{}),
807 };
808 result[@intFromEnum(Feature.idivl_to_divb)] = .{
809 .llvm_name = "idivl-to-divb",
810 .description = "Use 8-bit divide for positive values less than 256",
811 .dependencies = featureSet(&[_]Feature{}),
812 };
813 result[@intFromEnum(Feature.idivq_to_divl)] = .{
814 .llvm_name = "idivq-to-divl",
815 .description = "Use 32-bit divide for positive values less than 2^32",
816 .dependencies = featureSet(&[_]Feature{}),
817 };
818 result[@intFromEnum(Feature.inline_asm_use_gpr32)] = .{
819 .llvm_name = "inline-asm-use-gpr32",
820 .description = "Enable use of GPR32 in inline assembly for APX",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823 result[@intFromEnum(Feature.invpcid)] = .{
824 .llvm_name = "invpcid",
825 .description = "Invalidate Process-Context Identifier",
826 .dependencies = featureSet(&[_]Feature{}),
827 };
828 result[@intFromEnum(Feature.kl)] = .{
829 .llvm_name = "kl",
830 .description = "Support Key Locker kl Instructions",
831 .dependencies = featureSet(&[_]Feature{
832 .sse2,
833 }),
834 };
835 result[@intFromEnum(Feature.lea_sp)] = .{
836 .llvm_name = "lea-sp",
837 .description = "Use LEA for adjusting the stack pointer (this is an optimization for Intel Atom processors)",
838 .dependencies = featureSet(&[_]Feature{}),
839 };
840 result[@intFromEnum(Feature.lea_uses_ag)] = .{
841 .llvm_name = "lea-uses-ag",
842 .description = "LEA instruction needs inputs at AG stage",
843 .dependencies = featureSet(&[_]Feature{}),
844 };
845 result[@intFromEnum(Feature.lvi_cfi)] = .{
846 .llvm_name = "lvi-cfi",
847 .description = "Prevent indirect calls/branches from using a memory operand, and precede all indirect calls/branches from a register with an LFENCE instruction to serialize control flow. Also decompose RET instructions into a POP+LFENCE+JMP sequence.",
848 .dependencies = featureSet(&[_]Feature{}),
849 };
850 result[@intFromEnum(Feature.lvi_load_hardening)] = .{
851 .llvm_name = "lvi-load-hardening",
852 .description = "Insert LFENCE instructions to prevent data speculatively injected into loads from being used maliciously.",
853 .dependencies = featureSet(&[_]Feature{}),
854 };
855 result[@intFromEnum(Feature.lwp)] = .{
856 .llvm_name = "lwp",
857 .description = "Enable LWP instructions",
858 .dependencies = featureSet(&[_]Feature{}),
859 };
860 result[@intFromEnum(Feature.lzcnt)] = .{
861 .llvm_name = "lzcnt",
862 .description = "Support LZCNT instruction",
863 .dependencies = featureSet(&[_]Feature{}),
864 };
865 result[@intFromEnum(Feature.macrofusion)] = .{
866 .llvm_name = "macrofusion",
867 .description = "Various instructions can be fused with conditional branches",
868 .dependencies = featureSet(&[_]Feature{}),
869 };
870 result[@intFromEnum(Feature.mmx)] = .{
871 .llvm_name = "mmx",
872 .description = "Enable MMX instructions",
873 .dependencies = featureSet(&[_]Feature{}),
874 };
875 result[@intFromEnum(Feature.movbe)] = .{
876 .llvm_name = "movbe",
877 .description = "Support MOVBE instruction",
878 .dependencies = featureSet(&[_]Feature{}),
879 };
880 result[@intFromEnum(Feature.movdir64b)] = .{
881 .llvm_name = "movdir64b",
882 .description = "Support movdir64b instruction (direct store 64 bytes)",
883 .dependencies = featureSet(&[_]Feature{}),
884 };
885 result[@intFromEnum(Feature.movdiri)] = .{
886 .llvm_name = "movdiri",
887 .description = "Support movdiri instruction (direct store integer)",
888 .dependencies = featureSet(&[_]Feature{}),
889 };
890 result[@intFromEnum(Feature.movrs)] = .{
891 .llvm_name = "movrs",
892 .description = "Enable MOVRS",
893 .dependencies = featureSet(&[_]Feature{}),
894 };
895 result[@intFromEnum(Feature.mwaitx)] = .{
896 .llvm_name = "mwaitx",
897 .description = "Enable MONITORX/MWAITX timer functionality",
898 .dependencies = featureSet(&[_]Feature{}),
899 };
900 result[@intFromEnum(Feature.ndd)] = .{
901 .llvm_name = "ndd",
902 .description = "Support non-destructive destination",
903 .dependencies = featureSet(&[_]Feature{}),
904 };
905 result[@intFromEnum(Feature.nf)] = .{
906 .llvm_name = "nf",
907 .description = "Support status flags update suppression",
908 .dependencies = featureSet(&[_]Feature{}),
909 };
910 result[@intFromEnum(Feature.no_bypass_delay)] = .{
911 .llvm_name = "no-bypass-delay",
912 .description = "Has no bypass delay when using the 'wrong' domain",
913 .dependencies = featureSet(&[_]Feature{}),
914 };
915 result[@intFromEnum(Feature.no_bypass_delay_blend)] = .{
916 .llvm_name = "no-bypass-delay-blend",
917 .description = "Has no bypass delay when using the 'wrong' blend type",
918 .dependencies = featureSet(&[_]Feature{}),
919 };
920 result[@intFromEnum(Feature.no_bypass_delay_mov)] = .{
921 .llvm_name = "no-bypass-delay-mov",
922 .description = "Has no bypass delay when using the 'wrong' mov type",
923 .dependencies = featureSet(&[_]Feature{}),
924 };
925 result[@intFromEnum(Feature.no_bypass_delay_shuffle)] = .{
926 .llvm_name = "no-bypass-delay-shuffle",
927 .description = "Has no bypass delay when using the 'wrong' shuffle type",
928 .dependencies = featureSet(&[_]Feature{}),
929 };
930 result[@intFromEnum(Feature.nopl)] = .{
931 .llvm_name = "nopl",
932 .description = "Enable NOPL instruction (generally pentium pro+)",
933 .dependencies = featureSet(&[_]Feature{}),
934 };
935 result[@intFromEnum(Feature.pad_short_functions)] = .{
936 .llvm_name = "pad-short-functions",
937 .description = "Pad short functions (to prevent a stall when returning too early)",
938 .dependencies = featureSet(&[_]Feature{}),
939 };
940 result[@intFromEnum(Feature.pclmul)] = .{
941 .llvm_name = "pclmul",
942 .description = "Enable packed carry-less multiplication instructions",
943 .dependencies = featureSet(&[_]Feature{
944 .sse2,
945 }),
946 };
947 result[@intFromEnum(Feature.pconfig)] = .{
948 .llvm_name = "pconfig",
949 .description = "platform configuration instruction",
950 .dependencies = featureSet(&[_]Feature{}),
951 };
952 result[@intFromEnum(Feature.pku)] = .{
953 .llvm_name = "pku",
954 .description = "Enable protection keys",
955 .dependencies = featureSet(&[_]Feature{}),
956 };
957 result[@intFromEnum(Feature.popcnt)] = .{
958 .llvm_name = "popcnt",
959 .description = "Support POPCNT instruction",
960 .dependencies = featureSet(&[_]Feature{}),
961 };
962 result[@intFromEnum(Feature.ppx)] = .{
963 .llvm_name = "ppx",
964 .description = "Support Push-Pop Acceleration",
965 .dependencies = featureSet(&[_]Feature{}),
966 };
967 result[@intFromEnum(Feature.prefer_128_bit)] = .{
968 .llvm_name = "prefer-128-bit",
969 .description = "Prefer 128-bit AVX instructions",
970 .dependencies = featureSet(&[_]Feature{}),
971 };
972 result[@intFromEnum(Feature.prefer_256_bit)] = .{
973 .llvm_name = "prefer-256-bit",
974 .description = "Prefer 256-bit AVX instructions",
975 .dependencies = featureSet(&[_]Feature{}),
976 };
977 result[@intFromEnum(Feature.prefer_mask_registers)] = .{
978 .llvm_name = "prefer-mask-registers",
979 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
980 .dependencies = featureSet(&[_]Feature{}),
981 };
982 result[@intFromEnum(Feature.prefer_movmsk_over_vtest)] = .{
983 .llvm_name = "prefer-movmsk-over-vtest",
984 .description = "Prefer movmsk over vtest instruction",
985 .dependencies = featureSet(&[_]Feature{}),
986 };
987 result[@intFromEnum(Feature.prefer_no_gather)] = .{
988 .llvm_name = "prefer-no-gather",
989 .description = "Prefer no gather instructions",
990 .dependencies = featureSet(&[_]Feature{}),
991 };
992 result[@intFromEnum(Feature.prefer_no_scatter)] = .{
993 .llvm_name = "prefer-no-scatter",
994 .description = "Prefer no scatter instructions",
995 .dependencies = featureSet(&[_]Feature{}),
996 };
997 result[@intFromEnum(Feature.prefetchi)] = .{
998 .llvm_name = "prefetchi",
999 .description = "Prefetch instruction with T0 or T1 Hint",
1000 .dependencies = featureSet(&[_]Feature{}),
1001 };
1002 result[@intFromEnum(Feature.prefetchwt1)] = .{
1003 .llvm_name = null,
1004 .description = "Prefetch with Intent to Write and T1 Hint",
1005 .dependencies = featureSet(&[_]Feature{}),
1006 };
1007 result[@intFromEnum(Feature.prfchw)] = .{
1008 .llvm_name = "prfchw",
1009 .description = "Support PRFCHW instructions",
1010 .dependencies = featureSet(&[_]Feature{}),
1011 };
1012 result[@intFromEnum(Feature.ptwrite)] = .{
1013 .llvm_name = "ptwrite",
1014 .description = "Support ptwrite instruction",
1015 .dependencies = featureSet(&[_]Feature{}),
1016 };
1017 result[@intFromEnum(Feature.push2pop2)] = .{
1018 .llvm_name = "push2pop2",
1019 .description = "Support PUSH2/POP2 instructions",
1020 .dependencies = featureSet(&[_]Feature{}),
1021 };
1022 result[@intFromEnum(Feature.raoint)] = .{
1023 .llvm_name = "raoint",
1024 .description = "Support RAO-INT instructions",
1025 .dependencies = featureSet(&[_]Feature{}),
1026 };
1027 result[@intFromEnum(Feature.rdpid)] = .{
1028 .llvm_name = "rdpid",
1029 .description = "Support RDPID instructions",
1030 .dependencies = featureSet(&[_]Feature{}),
1031 };
1032 result[@intFromEnum(Feature.rdpru)] = .{
1033 .llvm_name = "rdpru",
1034 .description = "Support RDPRU instructions",
1035 .dependencies = featureSet(&[_]Feature{}),
1036 };
1037 result[@intFromEnum(Feature.rdrnd)] = .{
1038 .llvm_name = "rdrnd",
1039 .description = "Support RDRAND instruction",
1040 .dependencies = featureSet(&[_]Feature{}),
1041 };
1042 result[@intFromEnum(Feature.rdseed)] = .{
1043 .llvm_name = "rdseed",
1044 .description = "Support RDSEED instruction",
1045 .dependencies = featureSet(&[_]Feature{}),
1046 };
1047 result[@intFromEnum(Feature.retpoline)] = .{
1048 .llvm_name = "retpoline",
1049 .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
1050 .dependencies = featureSet(&[_]Feature{
1051 .retpoline_indirect_branches,
1052 .retpoline_indirect_calls,
1053 }),
1054 };
1055 result[@intFromEnum(Feature.retpoline_external_thunk)] = .{
1056 .llvm_name = "retpoline-external-thunk",
1057 .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
1058 .dependencies = featureSet(&[_]Feature{
1059 .retpoline_indirect_calls,
1060 }),
1061 };
1062 result[@intFromEnum(Feature.retpoline_indirect_branches)] = .{
1063 .llvm_name = "retpoline-indirect-branches",
1064 .description = "Remove speculation of indirect branches from the generated code",
1065 .dependencies = featureSet(&[_]Feature{}),
1066 };
1067 result[@intFromEnum(Feature.retpoline_indirect_calls)] = .{
1068 .llvm_name = "retpoline-indirect-calls",
1069 .description = "Remove speculation of indirect calls from the generated code",
1070 .dependencies = featureSet(&[_]Feature{}),
1071 };
1072 result[@intFromEnum(Feature.rtm)] = .{
1073 .llvm_name = "rtm",
1074 .description = "Support RTM instructions",
1075 .dependencies = featureSet(&[_]Feature{}),
1076 };
1077 result[@intFromEnum(Feature.sahf)] = .{
1078 .llvm_name = "sahf",
1079 .description = "Support LAHF and SAHF instructions in 64-bit mode",
1080 .dependencies = featureSet(&[_]Feature{}),
1081 };
1082 result[@intFromEnum(Feature.sbb_dep_breaking)] = .{
1083 .llvm_name = "sbb-dep-breaking",
1084 .description = "SBB with same register has no source dependency",
1085 .dependencies = featureSet(&[_]Feature{}),
1086 };
1087 result[@intFromEnum(Feature.serialize)] = .{
1088 .llvm_name = "serialize",
1089 .description = "Has serialize instruction",
1090 .dependencies = featureSet(&[_]Feature{}),
1091 };
1092 result[@intFromEnum(Feature.seses)] = .{
1093 .llvm_name = "seses",
1094 .description = "Prevent speculative execution side channel timing attacks by inserting a speculation barrier before memory reads, memory writes, and conditional branches. Implies LVI Control Flow integrity.",
1095 .dependencies = featureSet(&[_]Feature{
1096 .lvi_cfi,
1097 }),
1098 };
1099 result[@intFromEnum(Feature.sgx)] = .{
1100 .llvm_name = "sgx",
1101 .description = "Enable Software Guard Extensions",
1102 .dependencies = featureSet(&[_]Feature{}),
1103 };
1104 result[@intFromEnum(Feature.sha)] = .{
1105 .llvm_name = "sha",
1106 .description = "Enable SHA instructions",
1107 .dependencies = featureSet(&[_]Feature{
1108 .sse2,
1109 }),
1110 };
1111 result[@intFromEnum(Feature.sha512)] = .{
1112 .llvm_name = "sha512",
1113 .description = "Support SHA512 instructions",
1114 .dependencies = featureSet(&[_]Feature{
1115 .avx2,
1116 }),
1117 };
1118 result[@intFromEnum(Feature.shstk)] = .{
1119 .llvm_name = "shstk",
1120 .description = "Support CET Shadow-Stack instructions",
1121 .dependencies = featureSet(&[_]Feature{}),
1122 };
1123 result[@intFromEnum(Feature.slow_3ops_lea)] = .{
1124 .llvm_name = "slow-3ops-lea",
1125 .description = "LEA instruction with 3 ops or certain registers is slow",
1126 .dependencies = featureSet(&[_]Feature{}),
1127 };
1128 result[@intFromEnum(Feature.slow_incdec)] = .{
1129 .llvm_name = "slow-incdec",
1130 .description = "INC and DEC instructions are slower than ADD and SUB",
1131 .dependencies = featureSet(&[_]Feature{}),
1132 };
1133 result[@intFromEnum(Feature.slow_lea)] = .{
1134 .llvm_name = "slow-lea",
1135 .description = "LEA instruction with certain arguments is slow",
1136 .dependencies = featureSet(&[_]Feature{}),
1137 };
1138 result[@intFromEnum(Feature.slow_pmaddwd)] = .{
1139 .llvm_name = "slow-pmaddwd",
1140 .description = "PMADDWD is slower than PMULLD",
1141 .dependencies = featureSet(&[_]Feature{}),
1142 };
1143 result[@intFromEnum(Feature.slow_pmulld)] = .{
1144 .llvm_name = "slow-pmulld",
1145 .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)",
1146 .dependencies = featureSet(&[_]Feature{}),
1147 };
1148 result[@intFromEnum(Feature.slow_shld)] = .{
1149 .llvm_name = "slow-shld",
1150 .description = "SHLD instruction is slow",
1151 .dependencies = featureSet(&[_]Feature{}),
1152 };
1153 result[@intFromEnum(Feature.slow_two_mem_ops)] = .{
1154 .llvm_name = "slow-two-mem-ops",
1155 .description = "Two memory operand instructions are slow",
1156 .dependencies = featureSet(&[_]Feature{}),
1157 };
1158 result[@intFromEnum(Feature.slow_unaligned_mem_16)] = .{
1159 .llvm_name = "slow-unaligned-mem-16",
1160 .description = "Slow unaligned 16-byte memory access",
1161 .dependencies = featureSet(&[_]Feature{}),
1162 };
1163 result[@intFromEnum(Feature.slow_unaligned_mem_32)] = .{
1164 .llvm_name = "slow-unaligned-mem-32",
1165 .description = "Slow unaligned 32-byte memory access",
1166 .dependencies = featureSet(&[_]Feature{}),
1167 };
1168 result[@intFromEnum(Feature.sm3)] = .{
1169 .llvm_name = "sm3",
1170 .description = "Support SM3 instructions",
1171 .dependencies = featureSet(&[_]Feature{
1172 .avx,
1173 }),
1174 };
1175 result[@intFromEnum(Feature.sm4)] = .{
1176 .llvm_name = "sm4",
1177 .description = "Support SM4 instructions",
1178 .dependencies = featureSet(&[_]Feature{
1179 .avx2,
1180 }),
1181 };
1182 result[@intFromEnum(Feature.smap)] = .{
1183 .llvm_name = null,
1184 .description = "Enable Supervisor Mode Access Prevention",
1185 .dependencies = featureSet(&[_]Feature{}),
1186 };
1187 result[@intFromEnum(Feature.smep)] = .{
1188 .llvm_name = null,
1189 .description = "Enable Supervisor Mode Execution Prevention",
1190 .dependencies = featureSet(&[_]Feature{}),
1191 };
1192 result[@intFromEnum(Feature.soft_float)] = .{
1193 .llvm_name = "soft-float",
1194 .description = "Use software floating point features",
1195 .dependencies = featureSet(&[_]Feature{}),
1196 };
1197 result[@intFromEnum(Feature.sse)] = .{
1198 .llvm_name = "sse",
1199 .description = "Enable SSE instructions",
1200 .dependencies = featureSet(&[_]Feature{}),
1201 };
1202 result[@intFromEnum(Feature.sse2)] = .{
1203 .llvm_name = "sse2",
1204 .description = "Enable SSE2 instructions",
1205 .dependencies = featureSet(&[_]Feature{
1206 .sse,
1207 }),
1208 };
1209 result[@intFromEnum(Feature.sse3)] = .{
1210 .llvm_name = "sse3",
1211 .description = "Enable SSE3 instructions",
1212 .dependencies = featureSet(&[_]Feature{
1213 .sse2,
1214 }),
1215 };
1216 result[@intFromEnum(Feature.sse4_1)] = .{
1217 .llvm_name = "sse4.1",
1218 .description = "Enable SSE 4.1 instructions",
1219 .dependencies = featureSet(&[_]Feature{
1220 .ssse3,
1221 }),
1222 };
1223 result[@intFromEnum(Feature.sse4_2)] = .{
1224 .llvm_name = "sse4.2",
1225 .description = "Enable SSE 4.2 instructions",
1226 .dependencies = featureSet(&[_]Feature{
1227 .crc32,
1228 .sse4_1,
1229 }),
1230 };
1231 result[@intFromEnum(Feature.sse4a)] = .{
1232 .llvm_name = "sse4a",
1233 .description = "Support SSE 4a instructions",
1234 .dependencies = featureSet(&[_]Feature{
1235 .sse3,
1236 }),
1237 };
1238 result[@intFromEnum(Feature.sse_unaligned_mem)] = .{
1239 .llvm_name = "sse-unaligned-mem",
1240 .description = "Allow unaligned memory operands with SSE instructions (this may require setting a configuration bit in the processor)",
1241 .dependencies = featureSet(&[_]Feature{}),
1242 };
1243 result[@intFromEnum(Feature.ssse3)] = .{
1244 .llvm_name = "ssse3",
1245 .description = "Enable SSSE3 instructions",
1246 .dependencies = featureSet(&[_]Feature{
1247 .sse3,
1248 }),
1249 };
1250 result[@intFromEnum(Feature.tagged_globals)] = .{
1251 .llvm_name = "tagged-globals",
1252 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits.",
1253 .dependencies = featureSet(&[_]Feature{}),
1254 };
1255 result[@intFromEnum(Feature.tbm)] = .{
1256 .llvm_name = "tbm",
1257 .description = "Enable TBM instructions",
1258 .dependencies = featureSet(&[_]Feature{}),
1259 };
1260 result[@intFromEnum(Feature.tsxldtrk)] = .{
1261 .llvm_name = "tsxldtrk",
1262 .description = "Support TSXLDTRK instructions",
1263 .dependencies = featureSet(&[_]Feature{}),
1264 };
1265 result[@intFromEnum(Feature.tuning_fast_imm_vector_shift)] = .{
1266 .llvm_name = "tuning-fast-imm-vector-shift",
1267 .description = "Vector shifts are fast (2/cycle) as opposed to slow (1/cycle)",
1268 .dependencies = featureSet(&[_]Feature{}),
1269 };
1270 result[@intFromEnum(Feature.uintr)] = .{
1271 .llvm_name = "uintr",
1272 .description = "Has UINTR Instructions",
1273 .dependencies = featureSet(&[_]Feature{}),
1274 };
1275 result[@intFromEnum(Feature.use_glm_div_sqrt_costs)] = .{
1276 .llvm_name = "use-glm-div-sqrt-costs",
1277 .description = "Use Goldmont specific floating point div/sqrt costs",
1278 .dependencies = featureSet(&[_]Feature{}),
1279 };
1280 result[@intFromEnum(Feature.use_slm_arith_costs)] = .{
1281 .llvm_name = "use-slm-arith-costs",
1282 .description = "Use Silvermont specific arithmetic costs",
1283 .dependencies = featureSet(&[_]Feature{}),
1284 };
1285 result[@intFromEnum(Feature.usermsr)] = .{
1286 .llvm_name = "usermsr",
1287 .description = "Support USERMSR instructions",
1288 .dependencies = featureSet(&[_]Feature{}),
1289 };
1290 result[@intFromEnum(Feature.vaes)] = .{
1291 .llvm_name = "vaes",
1292 .description = "Promote selected AES instructions to AVX512/AVX registers",
1293 .dependencies = featureSet(&[_]Feature{
1294 .aes,
1295 .avx2,
1296 }),
1297 };
1298 result[@intFromEnum(Feature.vpclmulqdq)] = .{
1299 .llvm_name = "vpclmulqdq",
1300 .description = "Enable vpclmulqdq instructions",
1301 .dependencies = featureSet(&[_]Feature{
1302 .avx,
1303 .pclmul,
1304 }),
1305 };
1306 result[@intFromEnum(Feature.vzeroupper)] = .{
1307 .llvm_name = "vzeroupper",
1308 .description = "Should insert vzeroupper instructions",
1309 .dependencies = featureSet(&[_]Feature{}),
1310 };
1311 result[@intFromEnum(Feature.waitpkg)] = .{
1312 .llvm_name = "waitpkg",
1313 .description = "Wait and pause enhancements",
1314 .dependencies = featureSet(&[_]Feature{}),
1315 };
1316 result[@intFromEnum(Feature.wbnoinvd)] = .{
1317 .llvm_name = "wbnoinvd",
1318 .description = "Write Back No Invalidate",
1319 .dependencies = featureSet(&[_]Feature{}),
1320 };
1321 result[@intFromEnum(Feature.widekl)] = .{
1322 .llvm_name = "widekl",
1323 .description = "Support Key Locker wide Instructions",
1324 .dependencies = featureSet(&[_]Feature{
1325 .kl,
1326 }),
1327 };
1328 result[@intFromEnum(Feature.x87)] = .{
1329 .llvm_name = "x87",
1330 .description = "Enable X87 float instructions",
1331 .dependencies = featureSet(&[_]Feature{}),
1332 };
1333 result[@intFromEnum(Feature.xop)] = .{
1334 .llvm_name = "xop",
1335 .description = "Enable XOP instructions",
1336 .dependencies = featureSet(&[_]Feature{
1337 .fma4,
1338 }),
1339 };
1340 result[@intFromEnum(Feature.xsave)] = .{
1341 .llvm_name = "xsave",
1342 .description = "Support xsave instructions",
1343 .dependencies = featureSet(&[_]Feature{}),
1344 };
1345 result[@intFromEnum(Feature.xsavec)] = .{
1346 .llvm_name = "xsavec",
1347 .description = "Support xsavec instructions",
1348 .dependencies = featureSet(&[_]Feature{
1349 .xsave,
1350 }),
1351 };
1352 result[@intFromEnum(Feature.xsaveopt)] = .{
1353 .llvm_name = "xsaveopt",
1354 .description = "Support xsaveopt instructions",
1355 .dependencies = featureSet(&[_]Feature{
1356 .xsave,
1357 }),
1358 };
1359 result[@intFromEnum(Feature.xsaves)] = .{
1360 .llvm_name = "xsaves",
1361 .description = "Support xsaves instructions",
1362 .dependencies = featureSet(&[_]Feature{
1363 .xsave,
1364 }),
1365 };
1366 result[@intFromEnum(Feature.zu)] = .{
1367 .llvm_name = "zu",
1368 .description = "Support zero-upper SETcc/IMUL",
1369 .dependencies = featureSet(&[_]Feature{}),
1370 };
1371 const ti = @typeInfo(Feature);
1372 for (&result, 0..) |*elem, i| {
1373 elem.index = i;
1374 elem.name = ti.@"enum".fields[i].name;
1375 }
1376 break :blk result;
1377};
1378
1379pub const cpu = struct {
1380 pub const alderlake: CpuModel = .{
1381 .name = "alderlake",
1382 .llvm_name = "alderlake",
1383 .features = featureSet(&[_]Feature{
1384 .@"64bit",
1385 .adx,
1386 .allow_light_256_bit,
1387 .avxvnni,
1388 .bmi,
1389 .bmi2,
1390 .clflushopt,
1391 .clwb,
1392 .cmov,
1393 .cx16,
1394 .f16c,
1395 .false_deps_perm,
1396 .false_deps_popcnt,
1397 .fast_15bytenop,
1398 .fast_gather,
1399 .fast_scalar_fsqrt,
1400 .fast_shld_rotate,
1401 .fast_variable_crosslane_shuffle,
1402 .fast_variable_perlane_shuffle,
1403 .fast_vector_fsqrt,
1404 .fma,
1405 .fsgsbase,
1406 .fxsr,
1407 .gfni,
1408 .hreset,
1409 .idivq_to_divl,
1410 .invpcid,
1411 .lzcnt,
1412 .macrofusion,
1413 .mmx,
1414 .movbe,
1415 .movdir64b,
1416 .movdiri,
1417 .no_bypass_delay_blend,
1418 .no_bypass_delay_mov,
1419 .no_bypass_delay_shuffle,
1420 .nopl,
1421 .pconfig,
1422 .pku,
1423 .popcnt,
1424 .prefer_movmsk_over_vtest,
1425 .prfchw,
1426 .ptwrite,
1427 .rdpid,
1428 .rdrnd,
1429 .rdseed,
1430 .sahf,
1431 .serialize,
1432 .sha,
1433 .shstk,
1434 .slow_3ops_lea,
1435 .smap,
1436 .smep,
1437 .tuning_fast_imm_vector_shift,
1438 .vaes,
1439 .vpclmulqdq,
1440 .vzeroupper,
1441 .waitpkg,
1442 .widekl,
1443 .x87,
1444 .xsavec,
1445 .xsaveopt,
1446 .xsaves,
1447 }),
1448 };
1449 pub const amdfam10: CpuModel = .{
1450 .name = "amdfam10",
1451 .llvm_name = "amdfam10",
1452 .features = featureSet(&[_]Feature{
1453 .@"3dnowa",
1454 .@"64bit",
1455 .cmov,
1456 .cx16,
1457 .fast_scalar_shift_masks,
1458 .fxsr,
1459 .idivq_to_divl,
1460 .lzcnt,
1461 .nopl,
1462 .popcnt,
1463 .prfchw,
1464 .sahf,
1465 .sbb_dep_breaking,
1466 .slow_shld,
1467 .sse4a,
1468 .vzeroupper,
1469 .x87,
1470 }),
1471 };
1472 pub const arrowlake: CpuModel = .{
1473 .name = "arrowlake",
1474 .llvm_name = "arrowlake",
1475 .features = featureSet(&[_]Feature{
1476 .@"64bit",
1477 .adx,
1478 .allow_light_256_bit,
1479 .avxifma,
1480 .avxneconvert,
1481 .avxvnni,
1482 .avxvnniint8,
1483 .bmi,
1484 .bmi2,
1485 .clflushopt,
1486 .clwb,
1487 .cmov,
1488 .cmpccxadd,
1489 .cx16,
1490 .enqcmd,
1491 .f16c,
1492 .false_deps_perm,
1493 .false_deps_popcnt,
1494 .fast_15bytenop,
1495 .fast_gather,
1496 .fast_scalar_fsqrt,
1497 .fast_shld_rotate,
1498 .fast_variable_crosslane_shuffle,
1499 .fast_variable_perlane_shuffle,
1500 .fast_vector_fsqrt,
1501 .fma,
1502 .fsgsbase,
1503 .fxsr,
1504 .gfni,
1505 .hreset,
1506 .idivq_to_divl,
1507 .invpcid,
1508 .lzcnt,
1509 .macrofusion,
1510 .mmx,
1511 .movbe,
1512 .movdir64b,
1513 .movdiri,
1514 .no_bypass_delay_blend,
1515 .no_bypass_delay_mov,
1516 .no_bypass_delay_shuffle,
1517 .nopl,
1518 .pconfig,
1519 .pku,
1520 .popcnt,
1521 .prefer_movmsk_over_vtest,
1522 .prfchw,
1523 .ptwrite,
1524 .rdpid,
1525 .rdrnd,
1526 .rdseed,
1527 .sahf,
1528 .serialize,
1529 .sha,
1530 .shstk,
1531 .slow_3ops_lea,
1532 .smap,
1533 .smep,
1534 .tuning_fast_imm_vector_shift,
1535 .uintr,
1536 .vaes,
1537 .vpclmulqdq,
1538 .vzeroupper,
1539 .waitpkg,
1540 .widekl,
1541 .x87,
1542 .xsavec,
1543 .xsaveopt,
1544 .xsaves,
1545 }),
1546 };
1547 pub const arrowlake_s: CpuModel = .{
1548 .name = "arrowlake_s",
1549 .llvm_name = "arrowlake-s",
1550 .features = featureSet(&[_]Feature{
1551 .@"64bit",
1552 .adx,
1553 .allow_light_256_bit,
1554 .avxifma,
1555 .avxneconvert,
1556 .avxvnni,
1557 .avxvnniint16,
1558 .avxvnniint8,
1559 .bmi,
1560 .bmi2,
1561 .clflushopt,
1562 .clwb,
1563 .cmov,
1564 .cmpccxadd,
1565 .cx16,
1566 .enqcmd,
1567 .f16c,
1568 .false_deps_perm,
1569 .false_deps_popcnt,
1570 .fast_15bytenop,
1571 .fast_gather,
1572 .fast_scalar_fsqrt,
1573 .fast_shld_rotate,
1574 .fast_variable_crosslane_shuffle,
1575 .fast_variable_perlane_shuffle,
1576 .fast_vector_fsqrt,
1577 .fma,
1578 .fsgsbase,
1579 .fxsr,
1580 .gfni,
1581 .hreset,
1582 .idivq_to_divl,
1583 .invpcid,
1584 .lzcnt,
1585 .macrofusion,
1586 .mmx,
1587 .movbe,
1588 .movdir64b,
1589 .movdiri,
1590 .no_bypass_delay_blend,
1591 .no_bypass_delay_mov,
1592 .no_bypass_delay_shuffle,
1593 .nopl,
1594 .pconfig,
1595 .pku,
1596 .popcnt,
1597 .prefer_movmsk_over_vtest,
1598 .prfchw,
1599 .ptwrite,
1600 .rdpid,
1601 .rdrnd,
1602 .rdseed,
1603 .sahf,
1604 .serialize,
1605 .sha,
1606 .sha512,
1607 .shstk,
1608 .slow_3ops_lea,
1609 .sm3,
1610 .sm4,
1611 .smap,
1612 .smep,
1613 .tuning_fast_imm_vector_shift,
1614 .uintr,
1615 .vaes,
1616 .vpclmulqdq,
1617 .vzeroupper,
1618 .waitpkg,
1619 .widekl,
1620 .x87,
1621 .xsavec,
1622 .xsaveopt,
1623 .xsaves,
1624 }),
1625 };
1626 pub const athlon: CpuModel = .{
1627 .name = "athlon",
1628 .llvm_name = "athlon",
1629 .features = featureSet(&[_]Feature{
1630 .@"3dnowa",
1631 .cmov,
1632 .cx8,
1633 .nopl,
1634 .prfchw,
1635 .slow_shld,
1636 .slow_unaligned_mem_16,
1637 .vzeroupper,
1638 .x87,
1639 }),
1640 };
1641 pub const athlon64: CpuModel = .{
1642 .name = "athlon64",
1643 .llvm_name = "athlon64",
1644 .features = featureSet(&[_]Feature{
1645 .@"3dnowa",
1646 .@"64bit",
1647 .cmov,
1648 .cx8,
1649 .fast_scalar_shift_masks,
1650 .fxsr,
1651 .nopl,
1652 .prfchw,
1653 .sbb_dep_breaking,
1654 .slow_shld,
1655 .slow_unaligned_mem_16,
1656 .sse2,
1657 .vzeroupper,
1658 .x87,
1659 }),
1660 };
1661 pub const athlon64_sse3: CpuModel = .{
1662 .name = "athlon64_sse3",
1663 .llvm_name = "athlon64-sse3",
1664 .features = featureSet(&[_]Feature{
1665 .@"3dnowa",
1666 .@"64bit",
1667 .cmov,
1668 .cx16,
1669 .fast_scalar_shift_masks,
1670 .fxsr,
1671 .nopl,
1672 .prfchw,
1673 .sbb_dep_breaking,
1674 .slow_shld,
1675 .slow_unaligned_mem_16,
1676 .sse3,
1677 .vzeroupper,
1678 .x87,
1679 }),
1680 };
1681 pub const athlon_4: CpuModel = .{
1682 .name = "athlon_4",
1683 .llvm_name = "athlon-4",
1684 .features = featureSet(&[_]Feature{
1685 .@"3dnowa",
1686 .cmov,
1687 .cx8,
1688 .fxsr,
1689 .nopl,
1690 .prfchw,
1691 .slow_shld,
1692 .slow_unaligned_mem_16,
1693 .sse,
1694 .vzeroupper,
1695 .x87,
1696 }),
1697 };
1698 pub const athlon_fx: CpuModel = .{
1699 .name = "athlon_fx",
1700 .llvm_name = "athlon-fx",
1701 .features = featureSet(&[_]Feature{
1702 .@"3dnowa",
1703 .@"64bit",
1704 .cmov,
1705 .cx8,
1706 .fast_scalar_shift_masks,
1707 .fxsr,
1708 .nopl,
1709 .prfchw,
1710 .sbb_dep_breaking,
1711 .slow_shld,
1712 .slow_unaligned_mem_16,
1713 .sse2,
1714 .vzeroupper,
1715 .x87,
1716 }),
1717 };
1718 pub const athlon_mp: CpuModel = .{
1719 .name = "athlon_mp",
1720 .llvm_name = "athlon-mp",
1721 .features = featureSet(&[_]Feature{
1722 .@"3dnowa",
1723 .cmov,
1724 .cx8,
1725 .fxsr,
1726 .nopl,
1727 .prfchw,
1728 .slow_shld,
1729 .slow_unaligned_mem_16,
1730 .sse,
1731 .vzeroupper,
1732 .x87,
1733 }),
1734 };
1735 pub const athlon_tbird: CpuModel = .{
1736 .name = "athlon_tbird",
1737 .llvm_name = "athlon-tbird",
1738 .features = featureSet(&[_]Feature{
1739 .@"3dnowa",
1740 .cmov,
1741 .cx8,
1742 .nopl,
1743 .prfchw,
1744 .slow_shld,
1745 .slow_unaligned_mem_16,
1746 .vzeroupper,
1747 .x87,
1748 }),
1749 };
1750 pub const athlon_xp: CpuModel = .{
1751 .name = "athlon_xp",
1752 .llvm_name = "athlon-xp",
1753 .features = featureSet(&[_]Feature{
1754 .@"3dnowa",
1755 .cmov,
1756 .cx8,
1757 .fxsr,
1758 .nopl,
1759 .prfchw,
1760 .slow_shld,
1761 .slow_unaligned_mem_16,
1762 .sse,
1763 .vzeroupper,
1764 .x87,
1765 }),
1766 };
1767 pub const atom: CpuModel = .{
1768 .name = "atom",
1769 .llvm_name = "atom",
1770 .features = featureSet(&[_]Feature{
1771 .@"64bit",
1772 .cmov,
1773 .cx16,
1774 .fast_imm16,
1775 .fxsr,
1776 .idivl_to_divb,
1777 .idivq_to_divl,
1778 .lea_sp,
1779 .lea_uses_ag,
1780 .mmx,
1781 .movbe,
1782 .no_bypass_delay,
1783 .nopl,
1784 .pad_short_functions,
1785 .sahf,
1786 .slow_two_mem_ops,
1787 .slow_unaligned_mem_16,
1788 .ssse3,
1789 .vzeroupper,
1790 .x87,
1791 }),
1792 };
1793 pub const atom_sse4_2_movbe: CpuModel = .{
1794 .name = "atom_sse4_2_movbe",
1795 .llvm_name = "atom_sse4_2_movbe",
1796 .features = featureSet(&[_]Feature{
1797 .@"64bit",
1798 .aes,
1799 .clflushopt,
1800 .cmov,
1801 .cx16,
1802 .false_deps_popcnt,
1803 .fast_7bytenop,
1804 .fast_imm16,
1805 .fast_movbe,
1806 .fsgsbase,
1807 .fxsr,
1808 .idivq_to_divl,
1809 .mmx,
1810 .movbe,
1811 .no_bypass_delay,
1812 .nopl,
1813 .pclmul,
1814 .popcnt,
1815 .prfchw,
1816 .rdrnd,
1817 .rdseed,
1818 .sahf,
1819 .sha,
1820 .slow_incdec,
1821 .slow_lea,
1822 .slow_pmulld,
1823 .slow_two_mem_ops,
1824 .sse4_2,
1825 .use_slm_arith_costs,
1826 .vzeroupper,
1827 .x87,
1828 .xsavec,
1829 .xsaveopt,
1830 .xsaves,
1831 }),
1832 };
1833 pub const barcelona: CpuModel = .{
1834 .name = "barcelona",
1835 .llvm_name = "barcelona",
1836 .features = featureSet(&[_]Feature{
1837 .@"3dnowa",
1838 .@"64bit",
1839 .cmov,
1840 .cx16,
1841 .fast_scalar_shift_masks,
1842 .fxsr,
1843 .idivq_to_divl,
1844 .lzcnt,
1845 .nopl,
1846 .popcnt,
1847 .prfchw,
1848 .sahf,
1849 .sbb_dep_breaking,
1850 .slow_shld,
1851 .smap,
1852 .smep,
1853 .sse4a,
1854 .vzeroupper,
1855 .x87,
1856 }),
1857 };
1858 pub const bdver1: CpuModel = .{
1859 .name = "bdver1",
1860 .llvm_name = "bdver1",
1861 .features = featureSet(&[_]Feature{
1862 .@"64bit",
1863 .aes,
1864 .branchfusion,
1865 .cmov,
1866 .cx16,
1867 .fast_11bytenop,
1868 .fast_scalar_shift_masks,
1869 .fxsr,
1870 .idivq_to_divl,
1871 .lwp,
1872 .lzcnt,
1873 .mmx,
1874 .nopl,
1875 .pclmul,
1876 .popcnt,
1877 .prfchw,
1878 .sahf,
1879 .sbb_dep_breaking,
1880 .slow_shld,
1881 .vzeroupper,
1882 .x87,
1883 .xop,
1884 .xsave,
1885 }),
1886 };
1887 pub const bdver2: CpuModel = .{
1888 .name = "bdver2",
1889 .llvm_name = "bdver2",
1890 .features = featureSet(&[_]Feature{
1891 .@"64bit",
1892 .aes,
1893 .bmi,
1894 .branchfusion,
1895 .cmov,
1896 .cx16,
1897 .f16c,
1898 .fast_11bytenop,
1899 .fast_bextr,
1900 .fast_movbe,
1901 .fast_scalar_shift_masks,
1902 .fma,
1903 .fxsr,
1904 .idivq_to_divl,
1905 .lwp,
1906 .lzcnt,
1907 .mmx,
1908 .nopl,
1909 .pclmul,
1910 .popcnt,
1911 .prfchw,
1912 .sahf,
1913 .sbb_dep_breaking,
1914 .slow_shld,
1915 .tbm,
1916 .vzeroupper,
1917 .x87,
1918 .xop,
1919 .xsave,
1920 }),
1921 };
1922 pub const bdver3: CpuModel = .{
1923 .name = "bdver3",
1924 .llvm_name = "bdver3",
1925 .features = featureSet(&[_]Feature{
1926 .@"64bit",
1927 .aes,
1928 .bmi,
1929 .branchfusion,
1930 .cmov,
1931 .cx16,
1932 .f16c,
1933 .fast_11bytenop,
1934 .fast_bextr,
1935 .fast_movbe,
1936 .fast_scalar_shift_masks,
1937 .fma,
1938 .fsgsbase,
1939 .fxsr,
1940 .idivq_to_divl,
1941 .lwp,
1942 .lzcnt,
1943 .mmx,
1944 .nopl,
1945 .pclmul,
1946 .popcnt,
1947 .prfchw,
1948 .sahf,
1949 .sbb_dep_breaking,
1950 .slow_shld,
1951 .tbm,
1952 .vzeroupper,
1953 .x87,
1954 .xop,
1955 .xsaveopt,
1956 }),
1957 };
1958 pub const bdver4: CpuModel = .{
1959 .name = "bdver4",
1960 .llvm_name = "bdver4",
1961 .features = featureSet(&[_]Feature{
1962 .@"64bit",
1963 .aes,
1964 .avx2,
1965 .bmi,
1966 .bmi2,
1967 .branchfusion,
1968 .cmov,
1969 .cx16,
1970 .f16c,
1971 .fast_11bytenop,
1972 .fast_bextr,
1973 .fast_movbe,
1974 .fast_scalar_shift_masks,
1975 .fma,
1976 .fsgsbase,
1977 .fxsr,
1978 .idivq_to_divl,
1979 .lwp,
1980 .lzcnt,
1981 .mmx,
1982 .movbe,
1983 .mwaitx,
1984 .nopl,
1985 .pclmul,
1986 .popcnt,
1987 .prfchw,
1988 .rdrnd,
1989 .sahf,
1990 .sbb_dep_breaking,
1991 .slow_shld,
1992 .tbm,
1993 .vzeroupper,
1994 .x87,
1995 .xop,
1996 .xsaveopt,
1997 }),
1998 };
1999 pub const bonnell: CpuModel = .{
2000 .name = "bonnell",
2001 .llvm_name = "bonnell",
2002 .features = featureSet(&[_]Feature{
2003 .@"64bit",
2004 .cmov,
2005 .cx16,
2006 .fast_imm16,
2007 .fxsr,
2008 .idivl_to_divb,
2009 .idivq_to_divl,
2010 .lea_sp,
2011 .lea_uses_ag,
2012 .mmx,
2013 .movbe,
2014 .no_bypass_delay,
2015 .nopl,
2016 .pad_short_functions,
2017 .sahf,
2018 .slow_two_mem_ops,
2019 .slow_unaligned_mem_16,
2020 .ssse3,
2021 .vzeroupper,
2022 .x87,
2023 }),
2024 };
2025 pub const broadwell: CpuModel = .{
2026 .name = "broadwell",
2027 .llvm_name = "broadwell",
2028 .features = featureSet(&[_]Feature{
2029 .@"64bit",
2030 .adx,
2031 .allow_light_256_bit,
2032 .avx2,
2033 .bmi,
2034 .bmi2,
2035 .cmov,
2036 .cx16,
2037 .ermsb,
2038 .f16c,
2039 .false_deps_lzcnt_tzcnt,
2040 .false_deps_popcnt,
2041 .fast_15bytenop,
2042 .fast_scalar_fsqrt,
2043 .fast_shld_rotate,
2044 .fast_variable_crosslane_shuffle,
2045 .fast_variable_perlane_shuffle,
2046 .fma,
2047 .fsgsbase,
2048 .fxsr,
2049 .idivq_to_divl,
2050 .invpcid,
2051 .lzcnt,
2052 .macrofusion,
2053 .mmx,
2054 .movbe,
2055 .no_bypass_delay_mov,
2056 .no_bypass_delay_shuffle,
2057 .nopl,
2058 .pclmul,
2059 .popcnt,
2060 .prfchw,
2061 .rdrnd,
2062 .rdseed,
2063 .sahf,
2064 .slow_3ops_lea,
2065 .smap,
2066 .smep,
2067 .vzeroupper,
2068 .x87,
2069 .xsaveopt,
2070 }),
2071 };
2072 pub const btver1: CpuModel = .{
2073 .name = "btver1",
2074 .llvm_name = "btver1",
2075 .features = featureSet(&[_]Feature{
2076 .@"64bit",
2077 .cmov,
2078 .cx16,
2079 .fast_15bytenop,
2080 .fast_imm16,
2081 .fast_scalar_shift_masks,
2082 .fast_vector_shift_masks,
2083 .fxsr,
2084 .idivq_to_divl,
2085 .lzcnt,
2086 .mmx,
2087 .nopl,
2088 .popcnt,
2089 .prfchw,
2090 .sahf,
2091 .sbb_dep_breaking,
2092 .slow_shld,
2093 .sse4a,
2094 .ssse3,
2095 .vzeroupper,
2096 .x87,
2097 }),
2098 };
2099 pub const btver2: CpuModel = .{
2100 .name = "btver2",
2101 .llvm_name = "btver2",
2102 .features = featureSet(&[_]Feature{
2103 .@"64bit",
2104 .aes,
2105 .bmi,
2106 .cmov,
2107 .cx16,
2108 .f16c,
2109 .fast_15bytenop,
2110 .fast_bextr,
2111 .fast_hops,
2112 .fast_imm16,
2113 .fast_lzcnt,
2114 .fast_movbe,
2115 .fast_scalar_shift_masks,
2116 .fast_vector_shift_masks,
2117 .fxsr,
2118 .idivq_to_divl,
2119 .lzcnt,
2120 .mmx,
2121 .movbe,
2122 .nopl,
2123 .pclmul,
2124 .popcnt,
2125 .prfchw,
2126 .sahf,
2127 .sbb_dep_breaking,
2128 .slow_shld,
2129 .sse4a,
2130 .x87,
2131 .xsaveopt,
2132 }),
2133 };
2134 pub const c3: CpuModel = .{
2135 .name = "c3",
2136 .llvm_name = "c3",
2137 .features = featureSet(&[_]Feature{
2138 .@"3dnow",
2139 .prfchw,
2140 .slow_unaligned_mem_16,
2141 .vzeroupper,
2142 .x87,
2143 }),
2144 };
2145 pub const c3_2: CpuModel = .{
2146 .name = "c3_2",
2147 .llvm_name = "c3-2",
2148 .features = featureSet(&[_]Feature{
2149 .cmov,
2150 .cx8,
2151 .fxsr,
2152 .mmx,
2153 .slow_unaligned_mem_16,
2154 .sse,
2155 .vzeroupper,
2156 .x87,
2157 }),
2158 };
2159 pub const cannonlake: CpuModel = .{
2160 .name = "cannonlake",
2161 .llvm_name = "cannonlake",
2162 .features = featureSet(&[_]Feature{
2163 .@"64bit",
2164 .adx,
2165 .aes,
2166 .allow_light_256_bit,
2167 .avx512cd,
2168 .avx512dq,
2169 .avx512ifma,
2170 .avx512vbmi,
2171 .avx512vl,
2172 .bmi,
2173 .bmi2,
2174 .clflushopt,
2175 .cmov,
2176 .cx16,
2177 .ermsb,
2178 .fast_15bytenop,
2179 .fast_gather,
2180 .fast_scalar_fsqrt,
2181 .fast_shld_rotate,
2182 .fast_variable_crosslane_shuffle,
2183 .fast_variable_perlane_shuffle,
2184 .fast_vector_fsqrt,
2185 .fsgsbase,
2186 .fxsr,
2187 .idivq_to_divl,
2188 .invpcid,
2189 .lzcnt,
2190 .macrofusion,
2191 .mmx,
2192 .movbe,
2193 .no_bypass_delay_blend,
2194 .no_bypass_delay_mov,
2195 .no_bypass_delay_shuffle,
2196 .nopl,
2197 .pclmul,
2198 .pku,
2199 .popcnt,
2200 .prefer_256_bit,
2201 .prfchw,
2202 .rdrnd,
2203 .rdseed,
2204 .sahf,
2205 .sha,
2206 .slow_3ops_lea,
2207 .smap,
2208 .smep,
2209 .tuning_fast_imm_vector_shift,
2210 .vzeroupper,
2211 .x87,
2212 .xsavec,
2213 .xsaveopt,
2214 .xsaves,
2215 }),
2216 };
2217 pub const cascadelake: CpuModel = .{
2218 .name = "cascadelake",
2219 .llvm_name = "cascadelake",
2220 .features = featureSet(&[_]Feature{
2221 .@"64bit",
2222 .adx,
2223 .aes,
2224 .allow_light_256_bit,
2225 .avx512bw,
2226 .avx512cd,
2227 .avx512dq,
2228 .avx512vl,
2229 .avx512vnni,
2230 .bmi,
2231 .bmi2,
2232 .clflushopt,
2233 .clwb,
2234 .cmov,
2235 .cx16,
2236 .ermsb,
2237 .false_deps_popcnt,
2238 .fast_15bytenop,
2239 .fast_gather,
2240 .fast_scalar_fsqrt,
2241 .fast_shld_rotate,
2242 .fast_variable_crosslane_shuffle,
2243 .fast_variable_perlane_shuffle,
2244 .fast_vector_fsqrt,
2245 .faster_shift_than_shuffle,
2246 .fsgsbase,
2247 .fxsr,
2248 .idivq_to_divl,
2249 .invpcid,
2250 .lzcnt,
2251 .macrofusion,
2252 .mmx,
2253 .movbe,
2254 .no_bypass_delay_blend,
2255 .no_bypass_delay_mov,
2256 .no_bypass_delay_shuffle,
2257 .nopl,
2258 .pclmul,
2259 .pku,
2260 .popcnt,
2261 .prefer_256_bit,
2262 .prfchw,
2263 .rdrnd,
2264 .rdseed,
2265 .sahf,
2266 .slow_3ops_lea,
2267 .smap,
2268 .smep,
2269 .tuning_fast_imm_vector_shift,
2270 .vzeroupper,
2271 .x87,
2272 .xsavec,
2273 .xsaveopt,
2274 .xsaves,
2275 }),
2276 };
2277 pub const clearwaterforest: CpuModel = .{
2278 .name = "clearwaterforest",
2279 .llvm_name = "clearwaterforest",
2280 .features = featureSet(&[_]Feature{
2281 .@"64bit",
2282 .adx,
2283 .allow_light_256_bit,
2284 .avxifma,
2285 .avxneconvert,
2286 .avxvnni,
2287 .avxvnniint16,
2288 .avxvnniint8,
2289 .bmi,
2290 .bmi2,
2291 .cldemote,
2292 .clflushopt,
2293 .clwb,
2294 .cmov,
2295 .cmpccxadd,
2296 .cx16,
2297 .enqcmd,
2298 .f16c,
2299 .false_deps_perm,
2300 .false_deps_popcnt,
2301 .fast_15bytenop,
2302 .fast_gather,
2303 .fast_scalar_fsqrt,
2304 .fast_shld_rotate,
2305 .fast_variable_crosslane_shuffle,
2306 .fast_variable_perlane_shuffle,
2307 .fast_vector_fsqrt,
2308 .fma,
2309 .fsgsbase,
2310 .fxsr,
2311 .gfni,
2312 .hreset,
2313 .idivq_to_divl,
2314 .invpcid,
2315 .lzcnt,
2316 .macrofusion,
2317 .mmx,
2318 .movbe,
2319 .movdir64b,
2320 .movdiri,
2321 .no_bypass_delay_blend,
2322 .no_bypass_delay_mov,
2323 .no_bypass_delay_shuffle,
2324 .nopl,
2325 .pconfig,
2326 .pku,
2327 .popcnt,
2328 .prefer_movmsk_over_vtest,
2329 .prefetchi,
2330 .prfchw,
2331 .ptwrite,
2332 .rdpid,
2333 .rdrnd,
2334 .rdseed,
2335 .sahf,
2336 .serialize,
2337 .sha,
2338 .sha512,
2339 .shstk,
2340 .slow_3ops_lea,
2341 .sm3,
2342 .sm4,
2343 .tuning_fast_imm_vector_shift,
2344 .uintr,
2345 .usermsr,
2346 .vaes,
2347 .vpclmulqdq,
2348 .vzeroupper,
2349 .waitpkg,
2350 .x87,
2351 .xsavec,
2352 .xsaveopt,
2353 .xsaves,
2354 }),
2355 };
2356 pub const cooperlake: CpuModel = .{
2357 .name = "cooperlake",
2358 .llvm_name = "cooperlake",
2359 .features = featureSet(&[_]Feature{
2360 .@"64bit",
2361 .adx,
2362 .aes,
2363 .allow_light_256_bit,
2364 .avx512bf16,
2365 .avx512cd,
2366 .avx512dq,
2367 .avx512vl,
2368 .avx512vnni,
2369 .bmi,
2370 .bmi2,
2371 .clflushopt,
2372 .clwb,
2373 .cmov,
2374 .cx16,
2375 .ermsb,
2376 .false_deps_popcnt,
2377 .fast_15bytenop,
2378 .fast_gather,
2379 .fast_scalar_fsqrt,
2380 .fast_shld_rotate,
2381 .fast_variable_crosslane_shuffle,
2382 .fast_variable_perlane_shuffle,
2383 .fast_vector_fsqrt,
2384 .faster_shift_than_shuffle,
2385 .fsgsbase,
2386 .fxsr,
2387 .idivq_to_divl,
2388 .invpcid,
2389 .lzcnt,
2390 .macrofusion,
2391 .mmx,
2392 .movbe,
2393 .no_bypass_delay_blend,
2394 .no_bypass_delay_mov,
2395 .no_bypass_delay_shuffle,
2396 .nopl,
2397 .pclmul,
2398 .pku,
2399 .popcnt,
2400 .prefer_256_bit,
2401 .prfchw,
2402 .rdrnd,
2403 .rdseed,
2404 .sahf,
2405 .slow_3ops_lea,
2406 .tuning_fast_imm_vector_shift,
2407 .vzeroupper,
2408 .x87,
2409 .xsavec,
2410 .xsaveopt,
2411 .xsaves,
2412 }),
2413 };
2414 pub const core2: CpuModel = .{
2415 .name = "core2",
2416 .llvm_name = "core2",
2417 .features = featureSet(&[_]Feature{
2418 .@"64bit",
2419 .cmov,
2420 .cx16,
2421 .fxsr,
2422 .macrofusion,
2423 .mmx,
2424 .nopl,
2425 .sahf,
2426 .slow_unaligned_mem_16,
2427 .ssse3,
2428 .vzeroupper,
2429 .x87,
2430 }),
2431 };
2432 pub const corei7: CpuModel = .{
2433 .name = "corei7",
2434 .llvm_name = "corei7",
2435 .features = featureSet(&[_]Feature{
2436 .@"64bit",
2437 .cmov,
2438 .cx16,
2439 .fxsr,
2440 .idivq_to_divl,
2441 .macrofusion,
2442 .mmx,
2443 .no_bypass_delay_mov,
2444 .nopl,
2445 .popcnt,
2446 .sahf,
2447 .sse4_2,
2448 .vzeroupper,
2449 .x87,
2450 }),
2451 };
2452 pub const diamondrapids: CpuModel = .{
2453 .name = "diamondrapids",
2454 .llvm_name = "diamondrapids",
2455 .features = featureSet(&[_]Feature{
2456 .@"64bit",
2457 .adx,
2458 .allow_light_256_bit,
2459 .amx_avx512,
2460 .amx_bf16,
2461 .amx_complex,
2462 .amx_fp16,
2463 .amx_fp8,
2464 .amx_int8,
2465 .amx_movrs,
2466 .amx_tf32,
2467 .amx_transpose,
2468 .avx10_2,
2469 .avxifma,
2470 .avxneconvert,
2471 .avxvnni,
2472 .avxvnniint16,
2473 .avxvnniint8,
2474 .bmi,
2475 .bmi2,
2476 .branch_hint,
2477 .ccmp,
2478 .cf,
2479 .cldemote,
2480 .clflushopt,
2481 .clwb,
2482 .cmov,
2483 .cmpccxadd,
2484 .cx16,
2485 .egpr,
2486 .enqcmd,
2487 .ermsb,
2488 .false_deps_getmant,
2489 .false_deps_mulc,
2490 .false_deps_mullq,
2491 .false_deps_perm,
2492 .false_deps_range,
2493 .fast_15bytenop,
2494 .fast_gather,
2495 .fast_scalar_fsqrt,
2496 .fast_shld_rotate,
2497 .fast_variable_crosslane_shuffle,
2498 .fast_variable_perlane_shuffle,
2499 .fast_vector_fsqrt,
2500 .fsgsbase,
2501 .fsrm,
2502 .fxsr,
2503 .gfni,
2504 .idivq_to_divl,
2505 .invpcid,
2506 .lzcnt,
2507 .macrofusion,
2508 .mmx,
2509 .movbe,
2510 .movdir64b,
2511 .movdiri,
2512 .movrs,
2513 .ndd,
2514 .nf,
2515 .no_bypass_delay_blend,
2516 .no_bypass_delay_mov,
2517 .no_bypass_delay_shuffle,
2518 .nopl,
2519 .pconfig,
2520 .pku,
2521 .popcnt,
2522 .ppx,
2523 .prefer_256_bit,
2524 .prefetchi,
2525 .prfchw,
2526 .ptwrite,
2527 .push2pop2,
2528 .rdpid,
2529 .rdrnd,
2530 .rdseed,
2531 .sahf,
2532 .serialize,
2533 .sha,
2534 .sha512,
2535 .shstk,
2536 .sm3,
2537 .sm4,
2538 .tsxldtrk,
2539 .tuning_fast_imm_vector_shift,
2540 .uintr,
2541 .usermsr,
2542 .vaes,
2543 .vpclmulqdq,
2544 .vzeroupper,
2545 .waitpkg,
2546 .wbnoinvd,
2547 .x87,
2548 .xsavec,
2549 .xsaveopt,
2550 .xsaves,
2551 .zu,
2552 }),
2553 };
2554 pub const emeraldrapids: CpuModel = .{
2555 .name = "emeraldrapids",
2556 .llvm_name = "emeraldrapids",
2557 .features = featureSet(&[_]Feature{
2558 .@"64bit",
2559 .adx,
2560 .allow_light_256_bit,
2561 .amx_bf16,
2562 .amx_int8,
2563 .avx512bf16,
2564 .avx512bitalg,
2565 .avx512cd,
2566 .avx512dq,
2567 .avx512fp16,
2568 .avx512ifma,
2569 .avx512vbmi,
2570 .avx512vbmi2,
2571 .avx512vl,
2572 .avx512vnni,
2573 .avx512vpopcntdq,
2574 .avxvnni,
2575 .bmi,
2576 .bmi2,
2577 .cldemote,
2578 .clflushopt,
2579 .clwb,
2580 .cmov,
2581 .cx16,
2582 .enqcmd,
2583 .ermsb,
2584 .false_deps_getmant,
2585 .false_deps_mulc,
2586 .false_deps_mullq,
2587 .false_deps_perm,
2588 .false_deps_range,
2589 .fast_15bytenop,
2590 .fast_gather,
2591 .fast_scalar_fsqrt,
2592 .fast_shld_rotate,
2593 .fast_variable_crosslane_shuffle,
2594 .fast_variable_perlane_shuffle,
2595 .fast_vector_fsqrt,
2596 .fsgsbase,
2597 .fsrm,
2598 .fxsr,
2599 .gfni,
2600 .idivq_to_divl,
2601 .invpcid,
2602 .lzcnt,
2603 .macrofusion,
2604 .mmx,
2605 .movbe,
2606 .movdir64b,
2607 .movdiri,
2608 .no_bypass_delay_blend,
2609 .no_bypass_delay_mov,
2610 .no_bypass_delay_shuffle,
2611 .nopl,
2612 .pconfig,
2613 .pku,
2614 .popcnt,
2615 .prefer_256_bit,
2616 .prfchw,
2617 .ptwrite,
2618 .rdpid,
2619 .rdrnd,
2620 .rdseed,
2621 .sahf,
2622 .serialize,
2623 .sha,
2624 .shstk,
2625 .smap,
2626 .smep,
2627 .tsxldtrk,
2628 .tuning_fast_imm_vector_shift,
2629 .uintr,
2630 .vaes,
2631 .vpclmulqdq,
2632 .vzeroupper,
2633 .waitpkg,
2634 .wbnoinvd,
2635 .x87,
2636 .xsavec,
2637 .xsaveopt,
2638 .xsaves,
2639 }),
2640 };
2641 pub const generic: CpuModel = .{
2642 .name = "generic",
2643 .llvm_name = "generic",
2644 .features = featureSet(&[_]Feature{
2645 .@"64bit",
2646 .cx8,
2647 .fast_15bytenop,
2648 .fast_scalar_fsqrt,
2649 .idivq_to_divl,
2650 .macrofusion,
2651 .slow_3ops_lea,
2652 .vzeroupper,
2653 .x87,
2654 }),
2655 };
2656 pub const geode: CpuModel = .{
2657 .name = "geode",
2658 .llvm_name = "geode",
2659 .features = featureSet(&[_]Feature{
2660 .@"3dnowa",
2661 .cx8,
2662 .prfchw,
2663 .slow_unaligned_mem_16,
2664 .vzeroupper,
2665 .x87,
2666 }),
2667 };
2668 pub const goldmont: CpuModel = .{
2669 .name = "goldmont",
2670 .llvm_name = "goldmont",
2671 .features = featureSet(&[_]Feature{
2672 .@"64bit",
2673 .aes,
2674 .clflushopt,
2675 .cmov,
2676 .cx16,
2677 .false_deps_popcnt,
2678 .fast_imm16,
2679 .fast_movbe,
2680 .fsgsbase,
2681 .fxsr,
2682 .mmx,
2683 .movbe,
2684 .no_bypass_delay,
2685 .nopl,
2686 .pclmul,
2687 .popcnt,
2688 .prfchw,
2689 .rdrnd,
2690 .rdseed,
2691 .sahf,
2692 .sha,
2693 .slow_incdec,
2694 .slow_lea,
2695 .slow_two_mem_ops,
2696 .smap,
2697 .smep,
2698 .sse4_2,
2699 .use_glm_div_sqrt_costs,
2700 .vzeroupper,
2701 .x87,
2702 .xsavec,
2703 .xsaveopt,
2704 .xsaves,
2705 }),
2706 };
2707 pub const goldmont_plus: CpuModel = .{
2708 .name = "goldmont_plus",
2709 .llvm_name = "goldmont-plus",
2710 .features = featureSet(&[_]Feature{
2711 .@"64bit",
2712 .aes,
2713 .clflushopt,
2714 .cmov,
2715 .cx16,
2716 .fast_imm16,
2717 .fast_movbe,
2718 .fsgsbase,
2719 .fxsr,
2720 .mmx,
2721 .movbe,
2722 .no_bypass_delay,
2723 .nopl,
2724 .pclmul,
2725 .popcnt,
2726 .prfchw,
2727 .ptwrite,
2728 .rdpid,
2729 .rdrnd,
2730 .rdseed,
2731 .sahf,
2732 .sha,
2733 .slow_incdec,
2734 .slow_lea,
2735 .slow_two_mem_ops,
2736 .sse4_2,
2737 .use_glm_div_sqrt_costs,
2738 .vzeroupper,
2739 .x87,
2740 .xsavec,
2741 .xsaveopt,
2742 .xsaves,
2743 }),
2744 };
2745 pub const gracemont: CpuModel = .{
2746 .name = "gracemont",
2747 .llvm_name = "gracemont",
2748 .features = featureSet(&[_]Feature{
2749 .@"64bit",
2750 .adx,
2751 .avxvnni,
2752 .bmi,
2753 .bmi2,
2754 .clflushopt,
2755 .clwb,
2756 .cmov,
2757 .cx16,
2758 .f16c,
2759 .false_deps_popcnt,
2760 .fast_15bytenop,
2761 .fast_scalar_fsqrt,
2762 .fast_variable_perlane_shuffle,
2763 .fast_vector_fsqrt,
2764 .fma,
2765 .fsgsbase,
2766 .fxsr,
2767 .gfni,
2768 .hreset,
2769 .invpcid,
2770 .lzcnt,
2771 .macrofusion,
2772 .mmx,
2773 .movbe,
2774 .movdir64b,
2775 .movdiri,
2776 .nopl,
2777 .pconfig,
2778 .pku,
2779 .popcnt,
2780 .prfchw,
2781 .ptwrite,
2782 .rdpid,
2783 .rdrnd,
2784 .rdseed,
2785 .sahf,
2786 .serialize,
2787 .sha,
2788 .shstk,
2789 .slow_3ops_lea,
2790 .vaes,
2791 .vpclmulqdq,
2792 .vzeroupper,
2793 .waitpkg,
2794 .widekl,
2795 .x87,
2796 .xsavec,
2797 .xsaveopt,
2798 .xsaves,
2799 }),
2800 };
2801 pub const grandridge: CpuModel = .{
2802 .name = "grandridge",
2803 .llvm_name = "grandridge",
2804 .features = featureSet(&[_]Feature{
2805 .@"64bit",
2806 .adx,
2807 .avxifma,
2808 .avxneconvert,
2809 .avxvnni,
2810 .avxvnniint8,
2811 .bmi,
2812 .bmi2,
2813 .cldemote,
2814 .clflushopt,
2815 .clwb,
2816 .cmov,
2817 .cmpccxadd,
2818 .cx16,
2819 .enqcmd,
2820 .f16c,
2821 .false_deps_popcnt,
2822 .fast_15bytenop,
2823 .fast_scalar_fsqrt,
2824 .fast_variable_perlane_shuffle,
2825 .fast_vector_fsqrt,
2826 .fma,
2827 .fsgsbase,
2828 .fxsr,
2829 .gfni,
2830 .hreset,
2831 .invpcid,
2832 .lzcnt,
2833 .macrofusion,
2834 .mmx,
2835 .movbe,
2836 .movdir64b,
2837 .movdiri,
2838 .nopl,
2839 .pconfig,
2840 .pku,
2841 .popcnt,
2842 .prfchw,
2843 .ptwrite,
2844 .rdpid,
2845 .rdrnd,
2846 .rdseed,
2847 .sahf,
2848 .serialize,
2849 .sha,
2850 .shstk,
2851 .slow_3ops_lea,
2852 .uintr,
2853 .vaes,
2854 .vpclmulqdq,
2855 .vzeroupper,
2856 .waitpkg,
2857 .widekl,
2858 .x87,
2859 .xsavec,
2860 .xsaveopt,
2861 .xsaves,
2862 }),
2863 };
2864 pub const graniterapids: CpuModel = .{
2865 .name = "graniterapids",
2866 .llvm_name = "graniterapids",
2867 .features = featureSet(&[_]Feature{
2868 .@"64bit",
2869 .adx,
2870 .allow_light_256_bit,
2871 .amx_bf16,
2872 .amx_fp16,
2873 .amx_int8,
2874 .avx512bf16,
2875 .avx512bitalg,
2876 .avx512cd,
2877 .avx512dq,
2878 .avx512fp16,
2879 .avx512ifma,
2880 .avx512vbmi,
2881 .avx512vbmi2,
2882 .avx512vl,
2883 .avx512vnni,
2884 .avx512vpopcntdq,
2885 .avxvnni,
2886 .bmi,
2887 .bmi2,
2888 .branch_hint,
2889 .cldemote,
2890 .clflushopt,
2891 .clwb,
2892 .cmov,
2893 .cx16,
2894 .enqcmd,
2895 .ermsb,
2896 .false_deps_getmant,
2897 .false_deps_mulc,
2898 .false_deps_mullq,
2899 .false_deps_perm,
2900 .false_deps_range,
2901 .fast_15bytenop,
2902 .fast_gather,
2903 .fast_scalar_fsqrt,
2904 .fast_shld_rotate,
2905 .fast_variable_crosslane_shuffle,
2906 .fast_variable_perlane_shuffle,
2907 .fast_vector_fsqrt,
2908 .fsgsbase,
2909 .fsrm,
2910 .fxsr,
2911 .gfni,
2912 .idivq_to_divl,
2913 .invpcid,
2914 .lzcnt,
2915 .macrofusion,
2916 .mmx,
2917 .movbe,
2918 .movdir64b,
2919 .movdiri,
2920 .no_bypass_delay_blend,
2921 .no_bypass_delay_mov,
2922 .no_bypass_delay_shuffle,
2923 .nopl,
2924 .pconfig,
2925 .pku,
2926 .popcnt,
2927 .prefer_256_bit,
2928 .prefetchi,
2929 .prfchw,
2930 .ptwrite,
2931 .rdpid,
2932 .rdrnd,
2933 .rdseed,
2934 .sahf,
2935 .serialize,
2936 .sha,
2937 .shstk,
2938 .tsxldtrk,
2939 .tuning_fast_imm_vector_shift,
2940 .uintr,
2941 .vaes,
2942 .vpclmulqdq,
2943 .vzeroupper,
2944 .waitpkg,
2945 .wbnoinvd,
2946 .x87,
2947 .xsavec,
2948 .xsaveopt,
2949 .xsaves,
2950 }),
2951 };
2952 pub const graniterapids_d: CpuModel = .{
2953 .name = "graniterapids_d",
2954 .llvm_name = "graniterapids-d",
2955 .features = featureSet(&[_]Feature{
2956 .@"64bit",
2957 .adx,
2958 .allow_light_256_bit,
2959 .amx_bf16,
2960 .amx_complex,
2961 .amx_fp16,
2962 .amx_int8,
2963 .avx512bf16,
2964 .avx512bitalg,
2965 .avx512cd,
2966 .avx512dq,
2967 .avx512fp16,
2968 .avx512ifma,
2969 .avx512vbmi,
2970 .avx512vbmi2,
2971 .avx512vl,
2972 .avx512vnni,
2973 .avx512vpopcntdq,
2974 .avxvnni,
2975 .bmi,
2976 .bmi2,
2977 .branch_hint,
2978 .cldemote,
2979 .clflushopt,
2980 .clwb,
2981 .cmov,
2982 .cx16,
2983 .enqcmd,
2984 .ermsb,
2985 .false_deps_getmant,
2986 .false_deps_mulc,
2987 .false_deps_mullq,
2988 .false_deps_perm,
2989 .false_deps_range,
2990 .fast_15bytenop,
2991 .fast_gather,
2992 .fast_scalar_fsqrt,
2993 .fast_shld_rotate,
2994 .fast_variable_crosslane_shuffle,
2995 .fast_variable_perlane_shuffle,
2996 .fast_vector_fsqrt,
2997 .fsgsbase,
2998 .fsrm,
2999 .fxsr,
3000 .gfni,
3001 .idivq_to_divl,
3002 .invpcid,
3003 .lzcnt,
3004 .macrofusion,
3005 .mmx,
3006 .movbe,
3007 .movdir64b,
3008 .movdiri,
3009 .no_bypass_delay_blend,
3010 .no_bypass_delay_mov,
3011 .no_bypass_delay_shuffle,
3012 .nopl,
3013 .pconfig,
3014 .pku,
3015 .popcnt,
3016 .prefer_256_bit,
3017 .prefetchi,
3018 .prfchw,
3019 .ptwrite,
3020 .rdpid,
3021 .rdrnd,
3022 .rdseed,
3023 .sahf,
3024 .serialize,
3025 .sha,
3026 .shstk,
3027 .tsxldtrk,
3028 .tuning_fast_imm_vector_shift,
3029 .uintr,
3030 .vaes,
3031 .vpclmulqdq,
3032 .vzeroupper,
3033 .waitpkg,
3034 .wbnoinvd,
3035 .x87,
3036 .xsavec,
3037 .xsaveopt,
3038 .xsaves,
3039 }),
3040 };
3041 pub const haswell: CpuModel = .{
3042 .name = "haswell",
3043 .llvm_name = "haswell",
3044 .features = featureSet(&[_]Feature{
3045 .@"64bit",
3046 .allow_light_256_bit,
3047 .avx2,
3048 .bmi,
3049 .bmi2,
3050 .cmov,
3051 .cx16,
3052 .ermsb,
3053 .f16c,
3054 .false_deps_lzcnt_tzcnt,
3055 .false_deps_popcnt,
3056 .fast_15bytenop,
3057 .fast_scalar_fsqrt,
3058 .fast_shld_rotate,
3059 .fast_variable_crosslane_shuffle,
3060 .fast_variable_perlane_shuffle,
3061 .fma,
3062 .fsgsbase,
3063 .fxsr,
3064 .idivq_to_divl,
3065 .invpcid,
3066 .lzcnt,
3067 .macrofusion,
3068 .mmx,
3069 .movbe,
3070 .no_bypass_delay_mov,
3071 .no_bypass_delay_shuffle,
3072 .nopl,
3073 .pclmul,
3074 .popcnt,
3075 .rdrnd,
3076 .sahf,
3077 .slow_3ops_lea,
3078 .smep,
3079 .vzeroupper,
3080 .x87,
3081 .xsaveopt,
3082 }),
3083 };
3084 pub const @"i386": CpuModel = .{
3085 .name = "i386",
3086 .llvm_name = "i386",
3087 .features = featureSet(&[_]Feature{
3088 .bsf_bsr_0_clobbers_result,
3089 .slow_unaligned_mem_16,
3090 .vzeroupper,
3091 .x87,
3092 }),
3093 };
3094 pub const @"i486": CpuModel = .{
3095 .name = "i486",
3096 .llvm_name = "i486",
3097 .features = featureSet(&[_]Feature{
3098 .bsf_bsr_0_clobbers_result,
3099 .slow_unaligned_mem_16,
3100 .vzeroupper,
3101 .x87,
3102 }),
3103 };
3104 pub const @"i586": CpuModel = .{
3105 .name = "i586",
3106 .llvm_name = "i586",
3107 .features = featureSet(&[_]Feature{
3108 .cx8,
3109 .slow_unaligned_mem_16,
3110 .vzeroupper,
3111 .x87,
3112 }),
3113 };
3114 pub const @"i686": CpuModel = .{
3115 .name = "i686",
3116 .llvm_name = "i686",
3117 .features = featureSet(&[_]Feature{
3118 .cmov,
3119 .cx8,
3120 .slow_unaligned_mem_16,
3121 .vzeroupper,
3122 .x87,
3123 }),
3124 };
3125 pub const @"i86": CpuModel = .{
3126 .name = "i86",
3127 .llvm_name = null,
3128 .features = featureSet(&[_]Feature{
3129 .@"16bit_mode",
3130 }),
3131 };
3132 pub const icelake_client: CpuModel = .{
3133 .name = "icelake_client",
3134 .llvm_name = "icelake-client",
3135 .features = featureSet(&[_]Feature{
3136 .@"64bit",
3137 .adx,
3138 .allow_light_256_bit,
3139 .avx512bitalg,
3140 .avx512cd,
3141 .avx512dq,
3142 .avx512ifma,
3143 .avx512vbmi,
3144 .avx512vbmi2,
3145 .avx512vl,
3146 .avx512vnni,
3147 .avx512vpopcntdq,
3148 .bmi,
3149 .bmi2,
3150 .clflushopt,
3151 .cmov,
3152 .cx16,
3153 .ermsb,
3154 .fast_15bytenop,
3155 .fast_gather,
3156 .fast_scalar_fsqrt,
3157 .fast_shld_rotate,
3158 .fast_variable_crosslane_shuffle,
3159 .fast_variable_perlane_shuffle,
3160 .fast_vector_fsqrt,
3161 .fsgsbase,
3162 .fsrm,
3163 .fxsr,
3164 .gfni,
3165 .idivq_to_divl,
3166 .invpcid,
3167 .lzcnt,
3168 .macrofusion,
3169 .mmx,
3170 .movbe,
3171 .no_bypass_delay_blend,
3172 .no_bypass_delay_mov,
3173 .no_bypass_delay_shuffle,
3174 .nopl,
3175 .pku,
3176 .popcnt,
3177 .prefer_256_bit,
3178 .prfchw,
3179 .rdpid,
3180 .rdrnd,
3181 .rdseed,
3182 .sahf,
3183 .sha,
3184 .tuning_fast_imm_vector_shift,
3185 .vaes,
3186 .vpclmulqdq,
3187 .vzeroupper,
3188 .x87,
3189 .xsavec,
3190 .xsaveopt,
3191 .xsaves,
3192 }),
3193 };
3194 pub const icelake_server: CpuModel = .{
3195 .name = "icelake_server",
3196 .llvm_name = "icelake-server",
3197 .features = featureSet(&[_]Feature{
3198 .@"64bit",
3199 .adx,
3200 .allow_light_256_bit,
3201 .avx512bitalg,
3202 .avx512cd,
3203 .avx512dq,
3204 .avx512ifma,
3205 .avx512vbmi,
3206 .avx512vbmi2,
3207 .avx512vl,
3208 .avx512vnni,
3209 .avx512vpopcntdq,
3210 .bmi,
3211 .bmi2,
3212 .clflushopt,
3213 .clwb,
3214 .cmov,
3215 .cx16,
3216 .ermsb,
3217 .fast_15bytenop,
3218 .fast_gather,
3219 .fast_scalar_fsqrt,
3220 .fast_shld_rotate,
3221 .fast_variable_crosslane_shuffle,
3222 .fast_variable_perlane_shuffle,
3223 .fast_vector_fsqrt,
3224 .fsgsbase,
3225 .fsrm,
3226 .fxsr,
3227 .gfni,
3228 .idivq_to_divl,
3229 .invpcid,
3230 .lzcnt,
3231 .macrofusion,
3232 .mmx,
3233 .movbe,
3234 .no_bypass_delay_blend,
3235 .no_bypass_delay_mov,
3236 .no_bypass_delay_shuffle,
3237 .nopl,
3238 .pconfig,
3239 .pku,
3240 .popcnt,
3241 .prefer_256_bit,
3242 .prfchw,
3243 .rdpid,
3244 .rdrnd,
3245 .rdseed,
3246 .sahf,
3247 .sha,
3248 .tuning_fast_imm_vector_shift,
3249 .vaes,
3250 .vpclmulqdq,
3251 .vzeroupper,
3252 .wbnoinvd,
3253 .x87,
3254 .xsavec,
3255 .xsaveopt,
3256 .xsaves,
3257 }),
3258 };
3259 pub const ivybridge: CpuModel = .{
3260 .name = "ivybridge",
3261 .llvm_name = "ivybridge",
3262 .features = featureSet(&[_]Feature{
3263 .@"64bit",
3264 .cmov,
3265 .cx16,
3266 .f16c,
3267 .false_deps_popcnt,
3268 .fast_15bytenop,
3269 .fast_scalar_fsqrt,
3270 .fast_shld_rotate,
3271 .fsgsbase,
3272 .fxsr,
3273 .idivq_to_divl,
3274 .macrofusion,
3275 .mmx,
3276 .no_bypass_delay_mov,
3277 .nopl,
3278 .pclmul,
3279 .popcnt,
3280 .rdrnd,
3281 .sahf,
3282 .slow_3ops_lea,
3283 .slow_unaligned_mem_32,
3284 .smep,
3285 .vzeroupper,
3286 .x87,
3287 .xsaveopt,
3288 }),
3289 };
3290 pub const k6: CpuModel = .{
3291 .name = "k6",
3292 .llvm_name = "k6",
3293 .features = featureSet(&[_]Feature{
3294 .cx8,
3295 .mmx,
3296 .slow_unaligned_mem_16,
3297 .vzeroupper,
3298 .x87,
3299 }),
3300 };
3301 pub const k6_2: CpuModel = .{
3302 .name = "k6_2",
3303 .llvm_name = "k6-2",
3304 .features = featureSet(&[_]Feature{
3305 .@"3dnow",
3306 .cx8,
3307 .prfchw,
3308 .slow_unaligned_mem_16,
3309 .vzeroupper,
3310 .x87,
3311 }),
3312 };
3313 pub const k6_3: CpuModel = .{
3314 .name = "k6_3",
3315 .llvm_name = "k6-3",
3316 .features = featureSet(&[_]Feature{
3317 .@"3dnow",
3318 .cx8,
3319 .prfchw,
3320 .slow_unaligned_mem_16,
3321 .vzeroupper,
3322 .x87,
3323 }),
3324 };
3325 pub const k8: CpuModel = .{
3326 .name = "k8",
3327 .llvm_name = "k8",
3328 .features = featureSet(&[_]Feature{
3329 .@"3dnowa",
3330 .@"64bit",
3331 .cmov,
3332 .cx8,
3333 .fast_scalar_shift_masks,
3334 .fxsr,
3335 .nopl,
3336 .prfchw,
3337 .sbb_dep_breaking,
3338 .slow_shld,
3339 .slow_unaligned_mem_16,
3340 .sse2,
3341 .vzeroupper,
3342 .x87,
3343 }),
3344 };
3345 pub const k8_sse3: CpuModel = .{
3346 .name = "k8_sse3",
3347 .llvm_name = "k8-sse3",
3348 .features = featureSet(&[_]Feature{
3349 .@"3dnowa",
3350 .@"64bit",
3351 .cmov,
3352 .cx16,
3353 .fast_scalar_shift_masks,
3354 .fxsr,
3355 .nopl,
3356 .prfchw,
3357 .sbb_dep_breaking,
3358 .slow_shld,
3359 .slow_unaligned_mem_16,
3360 .sse3,
3361 .vzeroupper,
3362 .x87,
3363 }),
3364 };
3365 pub const knl: CpuModel = .{
3366 .name = "knl",
3367 .llvm_name = "knl",
3368 .features = featureSet(&[_]Feature{
3369 .@"64bit",
3370 .adx,
3371 .aes,
3372 .avx512cd,
3373 .avx512er,
3374 .avx512pf,
3375 .bmi,
3376 .bmi2,
3377 .cmov,
3378 .cx16,
3379 .fast_gather,
3380 .fast_imm16,
3381 .fast_movbe,
3382 .fsgsbase,
3383 .fxsr,
3384 .idivq_to_divl,
3385 .lzcnt,
3386 .mmx,
3387 .movbe,
3388 .nopl,
3389 .pclmul,
3390 .popcnt,
3391 .prefer_mask_registers,
3392 .prefetchwt1,
3393 .prfchw,
3394 .rdrnd,
3395 .rdseed,
3396 .sahf,
3397 .slow_3ops_lea,
3398 .slow_incdec,
3399 .slow_pmaddwd,
3400 .slow_two_mem_ops,
3401 .x87,
3402 .xsaveopt,
3403 }),
3404 };
3405 pub const knm: CpuModel = .{
3406 .name = "knm",
3407 .llvm_name = "knm",
3408 .features = featureSet(&[_]Feature{
3409 .@"64bit",
3410 .adx,
3411 .aes,
3412 .avx512cd,
3413 .avx512er,
3414 .avx512pf,
3415 .avx512vpopcntdq,
3416 .bmi,
3417 .bmi2,
3418 .cmov,
3419 .cx16,
3420 .fast_gather,
3421 .fast_imm16,
3422 .fast_movbe,
3423 .fsgsbase,
3424 .fxsr,
3425 .idivq_to_divl,
3426 .lzcnt,
3427 .mmx,
3428 .movbe,
3429 .nopl,
3430 .pclmul,
3431 .popcnt,
3432 .prefer_mask_registers,
3433 .prefetchwt1,
3434 .prfchw,
3435 .rdrnd,
3436 .rdseed,
3437 .sahf,
3438 .slow_3ops_lea,
3439 .slow_incdec,
3440 .slow_pmaddwd,
3441 .slow_two_mem_ops,
3442 .x87,
3443 .xsaveopt,
3444 }),
3445 };
3446 pub const lakemont: CpuModel = .{
3447 .name = "lakemont",
3448 .llvm_name = "lakemont",
3449 .features = featureSet(&[_]Feature{
3450 .cx8,
3451 .slow_unaligned_mem_16,
3452 .soft_float,
3453 .vzeroupper,
3454 }),
3455 };
3456 pub const lunarlake: CpuModel = .{
3457 .name = "lunarlake",
3458 .llvm_name = "lunarlake",
3459 .features = featureSet(&[_]Feature{
3460 .@"64bit",
3461 .adx,
3462 .allow_light_256_bit,
3463 .avxifma,
3464 .avxneconvert,
3465 .avxvnni,
3466 .avxvnniint16,
3467 .avxvnniint8,
3468 .bmi,
3469 .bmi2,
3470 .clflushopt,
3471 .clwb,
3472 .cmov,
3473 .cmpccxadd,
3474 .cx16,
3475 .enqcmd,
3476 .f16c,
3477 .false_deps_perm,
3478 .false_deps_popcnt,
3479 .fast_15bytenop,
3480 .fast_gather,
3481 .fast_scalar_fsqrt,
3482 .fast_shld_rotate,
3483 .fast_variable_crosslane_shuffle,
3484 .fast_variable_perlane_shuffle,
3485 .fast_vector_fsqrt,
3486 .fma,
3487 .fsgsbase,
3488 .fxsr,
3489 .gfni,
3490 .hreset,
3491 .idivq_to_divl,
3492 .invpcid,
3493 .lzcnt,
3494 .macrofusion,
3495 .mmx,
3496 .movbe,
3497 .movdir64b,
3498 .movdiri,
3499 .no_bypass_delay_blend,
3500 .no_bypass_delay_mov,
3501 .no_bypass_delay_shuffle,
3502 .nopl,
3503 .pconfig,
3504 .pku,
3505 .popcnt,
3506 .prefer_movmsk_over_vtest,
3507 .prfchw,
3508 .ptwrite,
3509 .rdpid,
3510 .rdrnd,
3511 .rdseed,
3512 .sahf,
3513 .serialize,
3514 .sha,
3515 .sha512,
3516 .shstk,
3517 .slow_3ops_lea,
3518 .sm3,
3519 .sm4,
3520 .tuning_fast_imm_vector_shift,
3521 .uintr,
3522 .vaes,
3523 .vpclmulqdq,
3524 .vzeroupper,
3525 .waitpkg,
3526 .widekl,
3527 .x87,
3528 .xsavec,
3529 .xsaveopt,
3530 .xsaves,
3531 }),
3532 };
3533 pub const meteorlake: CpuModel = .{
3534 .name = "meteorlake",
3535 .llvm_name = "meteorlake",
3536 .features = featureSet(&[_]Feature{
3537 .@"64bit",
3538 .adx,
3539 .allow_light_256_bit,
3540 .avxvnni,
3541 .bmi,
3542 .bmi2,
3543 .clflushopt,
3544 .clwb,
3545 .cmov,
3546 .cx16,
3547 .f16c,
3548 .false_deps_perm,
3549 .false_deps_popcnt,
3550 .fast_15bytenop,
3551 .fast_gather,
3552 .fast_scalar_fsqrt,
3553 .fast_shld_rotate,
3554 .fast_variable_crosslane_shuffle,
3555 .fast_variable_perlane_shuffle,
3556 .fast_vector_fsqrt,
3557 .fma,
3558 .fsgsbase,
3559 .fxsr,
3560 .gfni,
3561 .hreset,
3562 .idivq_to_divl,
3563 .invpcid,
3564 .lzcnt,
3565 .macrofusion,
3566 .mmx,
3567 .movbe,
3568 .movdir64b,
3569 .movdiri,
3570 .no_bypass_delay_blend,
3571 .no_bypass_delay_mov,
3572 .no_bypass_delay_shuffle,
3573 .nopl,
3574 .pconfig,
3575 .pku,
3576 .popcnt,
3577 .prefer_movmsk_over_vtest,
3578 .prfchw,
3579 .ptwrite,
3580 .rdpid,
3581 .rdrnd,
3582 .rdseed,
3583 .sahf,
3584 .serialize,
3585 .sha,
3586 .shstk,
3587 .slow_3ops_lea,
3588 .smap,
3589 .smep,
3590 .tuning_fast_imm_vector_shift,
3591 .vaes,
3592 .vpclmulqdq,
3593 .vzeroupper,
3594 .waitpkg,
3595 .widekl,
3596 .x87,
3597 .xsavec,
3598 .xsaveopt,
3599 .xsaves,
3600 }),
3601 };
3602 pub const nehalem: CpuModel = .{
3603 .name = "nehalem",
3604 .llvm_name = "nehalem",
3605 .features = featureSet(&[_]Feature{
3606 .@"64bit",
3607 .cmov,
3608 .cx16,
3609 .fxsr,
3610 .idivq_to_divl,
3611 .macrofusion,
3612 .mmx,
3613 .no_bypass_delay_mov,
3614 .nopl,
3615 .popcnt,
3616 .sahf,
3617 .sse4_2,
3618 .vzeroupper,
3619 .x87,
3620 }),
3621 };
3622 pub const nocona: CpuModel = .{
3623 .name = "nocona",
3624 .llvm_name = "nocona",
3625 .features = featureSet(&[_]Feature{
3626 .@"64bit",
3627 .cmov,
3628 .cx16,
3629 .fxsr,
3630 .mmx,
3631 .nopl,
3632 .slow_unaligned_mem_16,
3633 .sse3,
3634 .vzeroupper,
3635 .x87,
3636 }),
3637 };
3638 pub const opteron: CpuModel = .{
3639 .name = "opteron",
3640 .llvm_name = "opteron",
3641 .features = featureSet(&[_]Feature{
3642 .@"3dnowa",
3643 .@"64bit",
3644 .cmov,
3645 .cx8,
3646 .fast_scalar_shift_masks,
3647 .fxsr,
3648 .nopl,
3649 .prfchw,
3650 .sbb_dep_breaking,
3651 .slow_shld,
3652 .slow_unaligned_mem_16,
3653 .sse2,
3654 .vzeroupper,
3655 .x87,
3656 }),
3657 };
3658 pub const opteron_sse3: CpuModel = .{
3659 .name = "opteron_sse3",
3660 .llvm_name = "opteron-sse3",
3661 .features = featureSet(&[_]Feature{
3662 .@"3dnowa",
3663 .@"64bit",
3664 .cmov,
3665 .cx16,
3666 .fast_scalar_shift_masks,
3667 .fxsr,
3668 .nopl,
3669 .prfchw,
3670 .sbb_dep_breaking,
3671 .slow_shld,
3672 .slow_unaligned_mem_16,
3673 .sse3,
3674 .vzeroupper,
3675 .x87,
3676 }),
3677 };
3678 pub const pantherlake: CpuModel = .{
3679 .name = "pantherlake",
3680 .llvm_name = "pantherlake",
3681 .features = featureSet(&[_]Feature{
3682 .@"64bit",
3683 .adx,
3684 .allow_light_256_bit,
3685 .avxifma,
3686 .avxneconvert,
3687 .avxvnni,
3688 .avxvnniint16,
3689 .avxvnniint8,
3690 .bmi,
3691 .bmi2,
3692 .clflushopt,
3693 .clwb,
3694 .cmov,
3695 .cmpccxadd,
3696 .cx16,
3697 .enqcmd,
3698 .f16c,
3699 .false_deps_perm,
3700 .false_deps_popcnt,
3701 .fast_15bytenop,
3702 .fast_gather,
3703 .fast_scalar_fsqrt,
3704 .fast_shld_rotate,
3705 .fast_variable_crosslane_shuffle,
3706 .fast_variable_perlane_shuffle,
3707 .fast_vector_fsqrt,
3708 .fma,
3709 .fsgsbase,
3710 .fxsr,
3711 .gfni,
3712 .hreset,
3713 .idivq_to_divl,
3714 .invpcid,
3715 .lzcnt,
3716 .macrofusion,
3717 .mmx,
3718 .movbe,
3719 .movdir64b,
3720 .movdiri,
3721 .no_bypass_delay_blend,
3722 .no_bypass_delay_mov,
3723 .no_bypass_delay_shuffle,
3724 .nopl,
3725 .pconfig,
3726 .pku,
3727 .popcnt,
3728 .prefer_movmsk_over_vtest,
3729 .prefetchi,
3730 .prfchw,
3731 .ptwrite,
3732 .rdpid,
3733 .rdrnd,
3734 .rdseed,
3735 .sahf,
3736 .serialize,
3737 .sha,
3738 .sha512,
3739 .shstk,
3740 .slow_3ops_lea,
3741 .sm3,
3742 .sm4,
3743 .tuning_fast_imm_vector_shift,
3744 .uintr,
3745 .vaes,
3746 .vpclmulqdq,
3747 .vzeroupper,
3748 .waitpkg,
3749 .x87,
3750 .xsavec,
3751 .xsaveopt,
3752 .xsaves,
3753 }),
3754 };
3755 pub const penryn: CpuModel = .{
3756 .name = "penryn",
3757 .llvm_name = "penryn",
3758 .features = featureSet(&[_]Feature{
3759 .@"64bit",
3760 .cmov,
3761 .cx16,
3762 .fxsr,
3763 .macrofusion,
3764 .mmx,
3765 .nopl,
3766 .sahf,
3767 .slow_unaligned_mem_16,
3768 .sse4_1,
3769 .vzeroupper,
3770 .x87,
3771 }),
3772 };
3773 pub const pentium: CpuModel = .{
3774 .name = "pentium",
3775 .llvm_name = "pentium",
3776 .features = featureSet(&[_]Feature{
3777 .cx8,
3778 .slow_unaligned_mem_16,
3779 .vzeroupper,
3780 .x87,
3781 }),
3782 };
3783 pub const pentium2: CpuModel = .{
3784 .name = "pentium2",
3785 .llvm_name = "pentium2",
3786 .features = featureSet(&[_]Feature{
3787 .cmov,
3788 .cx8,
3789 .fxsr,
3790 .mmx,
3791 .nopl,
3792 .slow_unaligned_mem_16,
3793 .vzeroupper,
3794 .x87,
3795 }),
3796 };
3797 pub const pentium3: CpuModel = .{
3798 .name = "pentium3",
3799 .llvm_name = "pentium3",
3800 .features = featureSet(&[_]Feature{
3801 .cmov,
3802 .cx8,
3803 .fxsr,
3804 .mmx,
3805 .nopl,
3806 .slow_unaligned_mem_16,
3807 .sse,
3808 .vzeroupper,
3809 .x87,
3810 }),
3811 };
3812 pub const pentium3m: CpuModel = .{
3813 .name = "pentium3m",
3814 .llvm_name = "pentium3m",
3815 .features = featureSet(&[_]Feature{
3816 .cmov,
3817 .cx8,
3818 .fxsr,
3819 .mmx,
3820 .nopl,
3821 .slow_unaligned_mem_16,
3822 .sse,
3823 .vzeroupper,
3824 .x87,
3825 }),
3826 };
3827 pub const pentium4: CpuModel = .{
3828 .name = "pentium4",
3829 .llvm_name = "pentium4",
3830 .features = featureSet(&[_]Feature{
3831 .cmov,
3832 .cx8,
3833 .fxsr,
3834 .mmx,
3835 .nopl,
3836 .slow_unaligned_mem_16,
3837 .sse2,
3838 .vzeroupper,
3839 .x87,
3840 }),
3841 };
3842 pub const pentium_m: CpuModel = .{
3843 .name = "pentium_m",
3844 .llvm_name = "pentium-m",
3845 .features = featureSet(&[_]Feature{
3846 .cmov,
3847 .cx8,
3848 .fxsr,
3849 .mmx,
3850 .nopl,
3851 .slow_unaligned_mem_16,
3852 .sse2,
3853 .vzeroupper,
3854 .x87,
3855 }),
3856 };
3857 pub const pentium_mmx: CpuModel = .{
3858 .name = "pentium_mmx",
3859 .llvm_name = "pentium-mmx",
3860 .features = featureSet(&[_]Feature{
3861 .cx8,
3862 .mmx,
3863 .slow_unaligned_mem_16,
3864 .vzeroupper,
3865 .x87,
3866 }),
3867 };
3868 pub const pentiumpro: CpuModel = .{
3869 .name = "pentiumpro",
3870 .llvm_name = "pentiumpro",
3871 .features = featureSet(&[_]Feature{
3872 .cmov,
3873 .cx8,
3874 .nopl,
3875 .slow_unaligned_mem_16,
3876 .vzeroupper,
3877 .x87,
3878 }),
3879 };
3880 pub const prescott: CpuModel = .{
3881 .name = "prescott",
3882 .llvm_name = "prescott",
3883 .features = featureSet(&[_]Feature{
3884 .cmov,
3885 .cx8,
3886 .fxsr,
3887 .mmx,
3888 .nopl,
3889 .slow_unaligned_mem_16,
3890 .sse3,
3891 .vzeroupper,
3892 .x87,
3893 }),
3894 };
3895 pub const raptorlake: CpuModel = .{
3896 .name = "raptorlake",
3897 .llvm_name = "raptorlake",
3898 .features = featureSet(&[_]Feature{
3899 .@"64bit",
3900 .adx,
3901 .allow_light_256_bit,
3902 .avxvnni,
3903 .bmi,
3904 .bmi2,
3905 .clflushopt,
3906 .clwb,
3907 .cmov,
3908 .cx16,
3909 .f16c,
3910 .false_deps_perm,
3911 .false_deps_popcnt,
3912 .fast_15bytenop,
3913 .fast_gather,
3914 .fast_scalar_fsqrt,
3915 .fast_shld_rotate,
3916 .fast_variable_crosslane_shuffle,
3917 .fast_variable_perlane_shuffle,
3918 .fast_vector_fsqrt,
3919 .fma,
3920 .fsgsbase,
3921 .fxsr,
3922 .gfni,
3923 .hreset,
3924 .idivq_to_divl,
3925 .invpcid,
3926 .lzcnt,
3927 .macrofusion,
3928 .mmx,
3929 .movbe,
3930 .movdir64b,
3931 .movdiri,
3932 .no_bypass_delay_blend,
3933 .no_bypass_delay_mov,
3934 .no_bypass_delay_shuffle,
3935 .nopl,
3936 .pconfig,
3937 .pku,
3938 .popcnt,
3939 .prefer_movmsk_over_vtest,
3940 .prfchw,
3941 .ptwrite,
3942 .rdpid,
3943 .rdrnd,
3944 .rdseed,
3945 .sahf,
3946 .serialize,
3947 .sha,
3948 .shstk,
3949 .slow_3ops_lea,
3950 .smap,
3951 .smep,
3952 .tuning_fast_imm_vector_shift,
3953 .vaes,
3954 .vpclmulqdq,
3955 .vzeroupper,
3956 .waitpkg,
3957 .widekl,
3958 .x87,
3959 .xsavec,
3960 .xsaveopt,
3961 .xsaves,
3962 }),
3963 };
3964 pub const rocketlake: CpuModel = .{
3965 .name = "rocketlake",
3966 .llvm_name = "rocketlake",
3967 .features = featureSet(&[_]Feature{
3968 .@"64bit",
3969 .adx,
3970 .allow_light_256_bit,
3971 .avx512bitalg,
3972 .avx512cd,
3973 .avx512dq,
3974 .avx512ifma,
3975 .avx512vbmi,
3976 .avx512vbmi2,
3977 .avx512vl,
3978 .avx512vnni,
3979 .avx512vpopcntdq,
3980 .bmi,
3981 .bmi2,
3982 .clflushopt,
3983 .cmov,
3984 .cx16,
3985 .ermsb,
3986 .fast_15bytenop,
3987 .fast_gather,
3988 .fast_scalar_fsqrt,
3989 .fast_shld_rotate,
3990 .fast_variable_crosslane_shuffle,
3991 .fast_variable_perlane_shuffle,
3992 .fast_vector_fsqrt,
3993 .fsgsbase,
3994 .fsrm,
3995 .fxsr,
3996 .gfni,
3997 .idivq_to_divl,
3998 .invpcid,
3999 .lzcnt,
4000 .macrofusion,
4001 .mmx,
4002 .movbe,
4003 .no_bypass_delay_blend,
4004 .no_bypass_delay_mov,
4005 .no_bypass_delay_shuffle,
4006 .nopl,
4007 .pku,
4008 .popcnt,
4009 .prefer_256_bit,
4010 .prfchw,
4011 .rdpid,
4012 .rdrnd,
4013 .rdseed,
4014 .sahf,
4015 .sha,
4016 .smap,
4017 .smep,
4018 .tuning_fast_imm_vector_shift,
4019 .vaes,
4020 .vpclmulqdq,
4021 .vzeroupper,
4022 .x87,
4023 .xsavec,
4024 .xsaveopt,
4025 .xsaves,
4026 }),
4027 };
4028 pub const sandybridge: CpuModel = .{
4029 .name = "sandybridge",
4030 .llvm_name = "sandybridge",
4031 .features = featureSet(&[_]Feature{
4032 .@"64bit",
4033 .avx,
4034 .cmov,
4035 .cx16,
4036 .false_deps_popcnt,
4037 .fast_15bytenop,
4038 .fast_scalar_fsqrt,
4039 .fast_shld_rotate,
4040 .fxsr,
4041 .idivq_to_divl,
4042 .macrofusion,
4043 .mmx,
4044 .no_bypass_delay_mov,
4045 .nopl,
4046 .pclmul,
4047 .popcnt,
4048 .sahf,
4049 .slow_3ops_lea,
4050 .slow_unaligned_mem_32,
4051 .vzeroupper,
4052 .x87,
4053 .xsaveopt,
4054 }),
4055 };
4056 pub const sapphirerapids: CpuModel = .{
4057 .name = "sapphirerapids",
4058 .llvm_name = "sapphirerapids",
4059 .features = featureSet(&[_]Feature{
4060 .@"64bit",
4061 .adx,
4062 .allow_light_256_bit,
4063 .amx_bf16,
4064 .amx_int8,
4065 .avx512bf16,
4066 .avx512bitalg,
4067 .avx512cd,
4068 .avx512dq,
4069 .avx512fp16,
4070 .avx512ifma,
4071 .avx512vbmi,
4072 .avx512vbmi2,
4073 .avx512vl,
4074 .avx512vnni,
4075 .avx512vpopcntdq,
4076 .avxvnni,
4077 .bmi,
4078 .bmi2,
4079 .cldemote,
4080 .clflushopt,
4081 .clwb,
4082 .cmov,
4083 .cx16,
4084 .enqcmd,
4085 .ermsb,
4086 .false_deps_getmant,
4087 .false_deps_mulc,
4088 .false_deps_mullq,
4089 .false_deps_perm,
4090 .false_deps_range,
4091 .fast_15bytenop,
4092 .fast_gather,
4093 .fast_scalar_fsqrt,
4094 .fast_shld_rotate,
4095 .fast_variable_crosslane_shuffle,
4096 .fast_variable_perlane_shuffle,
4097 .fast_vector_fsqrt,
4098 .fsgsbase,
4099 .fsrm,
4100 .fxsr,
4101 .gfni,
4102 .idivq_to_divl,
4103 .invpcid,
4104 .lzcnt,
4105 .macrofusion,
4106 .mmx,
4107 .movbe,
4108 .movdir64b,
4109 .movdiri,
4110 .no_bypass_delay_blend,
4111 .no_bypass_delay_mov,
4112 .no_bypass_delay_shuffle,
4113 .nopl,
4114 .pconfig,
4115 .pku,
4116 .popcnt,
4117 .prefer_256_bit,
4118 .prfchw,
4119 .ptwrite,
4120 .rdpid,
4121 .rdrnd,
4122 .rdseed,
4123 .sahf,
4124 .serialize,
4125 .sha,
4126 .shstk,
4127 .smap,
4128 .smep,
4129 .tsxldtrk,
4130 .tuning_fast_imm_vector_shift,
4131 .uintr,
4132 .vaes,
4133 .vpclmulqdq,
4134 .vzeroupper,
4135 .waitpkg,
4136 .wbnoinvd,
4137 .x87,
4138 .xsavec,
4139 .xsaveopt,
4140 .xsaves,
4141 }),
4142 };
4143 pub const sierraforest: CpuModel = .{
4144 .name = "sierraforest",
4145 .llvm_name = "sierraforest",
4146 .features = featureSet(&[_]Feature{
4147 .@"64bit",
4148 .adx,
4149 .avxifma,
4150 .avxneconvert,
4151 .avxvnni,
4152 .avxvnniint8,
4153 .bmi,
4154 .bmi2,
4155 .cldemote,
4156 .clflushopt,
4157 .clwb,
4158 .cmov,
4159 .cmpccxadd,
4160 .cx16,
4161 .enqcmd,
4162 .f16c,
4163 .false_deps_popcnt,
4164 .fast_15bytenop,
4165 .fast_scalar_fsqrt,
4166 .fast_variable_perlane_shuffle,
4167 .fast_vector_fsqrt,
4168 .fma,
4169 .fsgsbase,
4170 .fxsr,
4171 .gfni,
4172 .hreset,
4173 .invpcid,
4174 .lzcnt,
4175 .macrofusion,
4176 .mmx,
4177 .movbe,
4178 .movdir64b,
4179 .movdiri,
4180 .nopl,
4181 .pconfig,
4182 .pku,
4183 .popcnt,
4184 .prfchw,
4185 .ptwrite,
4186 .rdpid,
4187 .rdrnd,
4188 .rdseed,
4189 .sahf,
4190 .serialize,
4191 .sha,
4192 .shstk,
4193 .slow_3ops_lea,
4194 .uintr,
4195 .vaes,
4196 .vpclmulqdq,
4197 .vzeroupper,
4198 .waitpkg,
4199 .widekl,
4200 .x87,
4201 .xsavec,
4202 .xsaveopt,
4203 .xsaves,
4204 }),
4205 };
4206 pub const silvermont: CpuModel = .{
4207 .name = "silvermont",
4208 .llvm_name = "silvermont",
4209 .features = featureSet(&[_]Feature{
4210 .@"64bit",
4211 .cmov,
4212 .cx16,
4213 .false_deps_popcnt,
4214 .fast_7bytenop,
4215 .fast_imm16,
4216 .fast_movbe,
4217 .fxsr,
4218 .idivq_to_divl,
4219 .mmx,
4220 .movbe,
4221 .no_bypass_delay,
4222 .nopl,
4223 .pclmul,
4224 .popcnt,
4225 .prfchw,
4226 .rdrnd,
4227 .sahf,
4228 .slow_incdec,
4229 .slow_lea,
4230 .slow_pmulld,
4231 .slow_two_mem_ops,
4232 .smep,
4233 .sse4_2,
4234 .use_slm_arith_costs,
4235 .vzeroupper,
4236 .x87,
4237 }),
4238 };
4239 pub const skx: CpuModel = .{
4240 .name = "skx",
4241 .llvm_name = "skx",
4242 .features = featureSet(&[_]Feature{
4243 .@"64bit",
4244 .adx,
4245 .aes,
4246 .allow_light_256_bit,
4247 .avx512bw,
4248 .avx512cd,
4249 .avx512dq,
4250 .avx512vl,
4251 .bmi,
4252 .bmi2,
4253 .clflushopt,
4254 .clwb,
4255 .cmov,
4256 .cx16,
4257 .ermsb,
4258 .false_deps_popcnt,
4259 .fast_15bytenop,
4260 .fast_gather,
4261 .fast_scalar_fsqrt,
4262 .fast_shld_rotate,
4263 .fast_variable_crosslane_shuffle,
4264 .fast_variable_perlane_shuffle,
4265 .fast_vector_fsqrt,
4266 .faster_shift_than_shuffle,
4267 .fsgsbase,
4268 .fxsr,
4269 .idivq_to_divl,
4270 .invpcid,
4271 .lzcnt,
4272 .macrofusion,
4273 .mmx,
4274 .movbe,
4275 .no_bypass_delay_blend,
4276 .no_bypass_delay_mov,
4277 .no_bypass_delay_shuffle,
4278 .nopl,
4279 .pclmul,
4280 .pku,
4281 .popcnt,
4282 .prefer_256_bit,
4283 .prfchw,
4284 .rdrnd,
4285 .rdseed,
4286 .sahf,
4287 .slow_3ops_lea,
4288 .smap,
4289 .smep,
4290 .tuning_fast_imm_vector_shift,
4291 .vzeroupper,
4292 .x87,
4293 .xsavec,
4294 .xsaveopt,
4295 .xsaves,
4296 }),
4297 };
4298 pub const skylake: CpuModel = .{
4299 .name = "skylake",
4300 .llvm_name = "skylake",
4301 .features = featureSet(&[_]Feature{
4302 .@"64bit",
4303 .adx,
4304 .aes,
4305 .allow_light_256_bit,
4306 .avx2,
4307 .bmi,
4308 .bmi2,
4309 .clflushopt,
4310 .cmov,
4311 .cx16,
4312 .ermsb,
4313 .f16c,
4314 .false_deps_popcnt,
4315 .fast_15bytenop,
4316 .fast_gather,
4317 .fast_scalar_fsqrt,
4318 .fast_shld_rotate,
4319 .fast_variable_crosslane_shuffle,
4320 .fast_variable_perlane_shuffle,
4321 .fast_vector_fsqrt,
4322 .fma,
4323 .fsgsbase,
4324 .fxsr,
4325 .idivq_to_divl,
4326 .invpcid,
4327 .lzcnt,
4328 .macrofusion,
4329 .mmx,
4330 .movbe,
4331 .no_bypass_delay_blend,
4332 .no_bypass_delay_mov,
4333 .no_bypass_delay_shuffle,
4334 .nopl,
4335 .pclmul,
4336 .popcnt,
4337 .prfchw,
4338 .rdrnd,
4339 .rdseed,
4340 .sahf,
4341 .slow_3ops_lea,
4342 .smap,
4343 .smep,
4344 .vzeroupper,
4345 .x87,
4346 .xsavec,
4347 .xsaveopt,
4348 .xsaves,
4349 }),
4350 };
4351 pub const skylake_avx512: CpuModel = .{
4352 .name = "skylake_avx512",
4353 .llvm_name = "skylake-avx512",
4354 .features = featureSet(&[_]Feature{
4355 .@"64bit",
4356 .adx,
4357 .aes,
4358 .allow_light_256_bit,
4359 .avx512bw,
4360 .avx512cd,
4361 .avx512dq,
4362 .avx512vl,
4363 .bmi,
4364 .bmi2,
4365 .clflushopt,
4366 .clwb,
4367 .cmov,
4368 .cx16,
4369 .ermsb,
4370 .false_deps_popcnt,
4371 .fast_15bytenop,
4372 .fast_gather,
4373 .fast_scalar_fsqrt,
4374 .fast_shld_rotate,
4375 .fast_variable_crosslane_shuffle,
4376 .fast_variable_perlane_shuffle,
4377 .fast_vector_fsqrt,
4378 .faster_shift_than_shuffle,
4379 .fsgsbase,
4380 .fxsr,
4381 .idivq_to_divl,
4382 .invpcid,
4383 .lzcnt,
4384 .macrofusion,
4385 .mmx,
4386 .movbe,
4387 .no_bypass_delay_blend,
4388 .no_bypass_delay_mov,
4389 .no_bypass_delay_shuffle,
4390 .nopl,
4391 .pclmul,
4392 .pku,
4393 .popcnt,
4394 .prefer_256_bit,
4395 .prfchw,
4396 .rdrnd,
4397 .rdseed,
4398 .sahf,
4399 .slow_3ops_lea,
4400 .tuning_fast_imm_vector_shift,
4401 .vzeroupper,
4402 .x87,
4403 .xsavec,
4404 .xsaveopt,
4405 .xsaves,
4406 }),
4407 };
4408 pub const slm: CpuModel = .{
4409 .name = "slm",
4410 .llvm_name = "slm",
4411 .features = featureSet(&[_]Feature{
4412 .@"64bit",
4413 .cmov,
4414 .cx16,
4415 .false_deps_popcnt,
4416 .fast_7bytenop,
4417 .fast_imm16,
4418 .fast_movbe,
4419 .fxsr,
4420 .idivq_to_divl,
4421 .mmx,
4422 .movbe,
4423 .no_bypass_delay,
4424 .nopl,
4425 .pclmul,
4426 .popcnt,
4427 .prfchw,
4428 .rdrnd,
4429 .sahf,
4430 .slow_incdec,
4431 .slow_lea,
4432 .slow_pmulld,
4433 .slow_two_mem_ops,
4434 .sse4_2,
4435 .use_slm_arith_costs,
4436 .vzeroupper,
4437 .x87,
4438 }),
4439 };
4440 pub const tigerlake: CpuModel = .{
4441 .name = "tigerlake",
4442 .llvm_name = "tigerlake",
4443 .features = featureSet(&[_]Feature{
4444 .@"64bit",
4445 .adx,
4446 .allow_light_256_bit,
4447 .avx512bitalg,
4448 .avx512cd,
4449 .avx512dq,
4450 .avx512ifma,
4451 .avx512vbmi,
4452 .avx512vbmi2,
4453 .avx512vl,
4454 .avx512vnni,
4455 .avx512vp2intersect,
4456 .avx512vpopcntdq,
4457 .bmi,
4458 .bmi2,
4459 .clflushopt,
4460 .clwb,
4461 .cmov,
4462 .cx16,
4463 .ermsb,
4464 .fast_15bytenop,
4465 .fast_gather,
4466 .fast_scalar_fsqrt,
4467 .fast_shld_rotate,
4468 .fast_variable_crosslane_shuffle,
4469 .fast_variable_perlane_shuffle,
4470 .fast_vector_fsqrt,
4471 .fsgsbase,
4472 .fsrm,
4473 .fxsr,
4474 .gfni,
4475 .idivq_to_divl,
4476 .invpcid,
4477 .lzcnt,
4478 .macrofusion,
4479 .mmx,
4480 .movbe,
4481 .movdir64b,
4482 .movdiri,
4483 .no_bypass_delay_blend,
4484 .no_bypass_delay_mov,
4485 .no_bypass_delay_shuffle,
4486 .nopl,
4487 .pku,
4488 .popcnt,
4489 .prefer_256_bit,
4490 .prfchw,
4491 .rdpid,
4492 .rdrnd,
4493 .rdseed,
4494 .sahf,
4495 .sha,
4496 .shstk,
4497 .smap,
4498 .smep,
4499 .tuning_fast_imm_vector_shift,
4500 .vaes,
4501 .vpclmulqdq,
4502 .vzeroupper,
4503 .x87,
4504 .xsavec,
4505 .xsaveopt,
4506 .xsaves,
4507 }),
4508 };
4509 pub const tremont: CpuModel = .{
4510 .name = "tremont",
4511 .llvm_name = "tremont",
4512 .features = featureSet(&[_]Feature{
4513 .@"64bit",
4514 .aes,
4515 .clflushopt,
4516 .clwb,
4517 .cmov,
4518 .cx16,
4519 .fast_imm16,
4520 .fast_movbe,
4521 .fsgsbase,
4522 .fxsr,
4523 .gfni,
4524 .mmx,
4525 .movbe,
4526 .no_bypass_delay,
4527 .nopl,
4528 .pclmul,
4529 .popcnt,
4530 .prfchw,
4531 .ptwrite,
4532 .rdpid,
4533 .rdrnd,
4534 .rdseed,
4535 .sahf,
4536 .sha,
4537 .slow_incdec,
4538 .slow_lea,
4539 .slow_two_mem_ops,
4540 .sse4_2,
4541 .use_glm_div_sqrt_costs,
4542 .vzeroupper,
4543 .x87,
4544 .xsavec,
4545 .xsaveopt,
4546 .xsaves,
4547 }),
4548 };
4549 pub const westmere: CpuModel = .{
4550 .name = "westmere",
4551 .llvm_name = "westmere",
4552 .features = featureSet(&[_]Feature{
4553 .@"64bit",
4554 .cmov,
4555 .cx16,
4556 .fxsr,
4557 .idivq_to_divl,
4558 .macrofusion,
4559 .mmx,
4560 .no_bypass_delay_mov,
4561 .nopl,
4562 .pclmul,
4563 .popcnt,
4564 .sahf,
4565 .sse4_2,
4566 .vzeroupper,
4567 .x87,
4568 }),
4569 };
4570 pub const winchip2: CpuModel = .{
4571 .name = "winchip2",
4572 .llvm_name = "winchip2",
4573 .features = featureSet(&[_]Feature{
4574 .@"3dnow",
4575 .prfchw,
4576 .slow_unaligned_mem_16,
4577 .vzeroupper,
4578 .x87,
4579 }),
4580 };
4581 pub const winchip_c6: CpuModel = .{
4582 .name = "winchip_c6",
4583 .llvm_name = "winchip-c6",
4584 .features = featureSet(&[_]Feature{
4585 .mmx,
4586 .slow_unaligned_mem_16,
4587 .vzeroupper,
4588 .x87,
4589 }),
4590 };
4591 pub const x86_64: CpuModel = .{
4592 .name = "x86_64",
4593 .llvm_name = "x86-64",
4594 .features = featureSet(&[_]Feature{
4595 .@"64bit",
4596 .cmov,
4597 .cx8,
4598 .fxsr,
4599 .idivq_to_divl,
4600 .macrofusion,
4601 .mmx,
4602 .nopl,
4603 .slow_3ops_lea,
4604 .slow_incdec,
4605 .sse2,
4606 .vzeroupper,
4607 .x87,
4608 }),
4609 };
4610 pub const x86_64_v2: CpuModel = .{
4611 .name = "x86_64_v2",
4612 .llvm_name = "x86-64-v2",
4613 .features = featureSet(&[_]Feature{
4614 .@"64bit",
4615 .cmov,
4616 .cx16,
4617 .false_deps_popcnt,
4618 .fast_15bytenop,
4619 .fast_scalar_fsqrt,
4620 .fast_shld_rotate,
4621 .fxsr,
4622 .idivq_to_divl,
4623 .macrofusion,
4624 .mmx,
4625 .nopl,
4626 .popcnt,
4627 .sahf,
4628 .slow_3ops_lea,
4629 .slow_unaligned_mem_32,
4630 .sse4_2,
4631 .vzeroupper,
4632 .x87,
4633 }),
4634 };
4635 pub const x86_64_v3: CpuModel = .{
4636 .name = "x86_64_v3",
4637 .llvm_name = "x86-64-v3",
4638 .features = featureSet(&[_]Feature{
4639 .@"64bit",
4640 .allow_light_256_bit,
4641 .avx2,
4642 .bmi,
4643 .bmi2,
4644 .cmov,
4645 .cx16,
4646 .f16c,
4647 .false_deps_lzcnt_tzcnt,
4648 .false_deps_popcnt,
4649 .fast_15bytenop,
4650 .fast_scalar_fsqrt,
4651 .fast_shld_rotate,
4652 .fast_variable_crosslane_shuffle,
4653 .fast_variable_perlane_shuffle,
4654 .fma,
4655 .fxsr,
4656 .idivq_to_divl,
4657 .lzcnt,
4658 .macrofusion,
4659 .mmx,
4660 .movbe,
4661 .nopl,
4662 .popcnt,
4663 .sahf,
4664 .slow_3ops_lea,
4665 .vzeroupper,
4666 .x87,
4667 .xsave,
4668 }),
4669 };
4670 pub const x86_64_v4: CpuModel = .{
4671 .name = "x86_64_v4",
4672 .llvm_name = "x86-64-v4",
4673 .features = featureSet(&[_]Feature{
4674 .@"64bit",
4675 .allow_light_256_bit,
4676 .avx512bw,
4677 .avx512cd,
4678 .avx512dq,
4679 .avx512vl,
4680 .bmi,
4681 .bmi2,
4682 .cmov,
4683 .cx16,
4684 .false_deps_popcnt,
4685 .fast_15bytenop,
4686 .fast_gather,
4687 .fast_scalar_fsqrt,
4688 .fast_shld_rotate,
4689 .fast_variable_crosslane_shuffle,
4690 .fast_variable_perlane_shuffle,
4691 .fast_vector_fsqrt,
4692 .fxsr,
4693 .idivq_to_divl,
4694 .lzcnt,
4695 .macrofusion,
4696 .mmx,
4697 .movbe,
4698 .nopl,
4699 .popcnt,
4700 .prefer_256_bit,
4701 .sahf,
4702 .slow_3ops_lea,
4703 .vzeroupper,
4704 .x87,
4705 .xsave,
4706 }),
4707 };
4708 pub const yonah: CpuModel = .{
4709 .name = "yonah",
4710 .llvm_name = "yonah",
4711 .features = featureSet(&[_]Feature{
4712 .cmov,
4713 .cx8,
4714 .fxsr,
4715 .mmx,
4716 .nopl,
4717 .slow_unaligned_mem_16,
4718 .sse3,
4719 .vzeroupper,
4720 .x87,
4721 }),
4722 };
4723 pub const znver1: CpuModel = .{
4724 .name = "znver1",
4725 .llvm_name = "znver1",
4726 .features = featureSet(&[_]Feature{
4727 .@"64bit",
4728 .adx,
4729 .aes,
4730 .allow_light_256_bit,
4731 .avx2,
4732 .bmi,
4733 .bmi2,
4734 .branchfusion,
4735 .clflushopt,
4736 .clzero,
4737 .cmov,
4738 .cx16,
4739 .f16c,
4740 .fast_15bytenop,
4741 .fast_bextr,
4742 .fast_imm16,
4743 .fast_lzcnt,
4744 .fast_movbe,
4745 .fast_scalar_fsqrt,
4746 .fast_scalar_shift_masks,
4747 .fast_variable_perlane_shuffle,
4748 .fast_vector_fsqrt,
4749 .fma,
4750 .fsgsbase,
4751 .fxsr,
4752 .idivq_to_divl,
4753 .lzcnt,
4754 .mmx,
4755 .movbe,
4756 .mwaitx,
4757 .nopl,
4758 .pclmul,
4759 .popcnt,
4760 .prfchw,
4761 .rdrnd,
4762 .rdseed,
4763 .sahf,
4764 .sbb_dep_breaking,
4765 .sha,
4766 .slow_shld,
4767 .smap,
4768 .smep,
4769 .sse4a,
4770 .vzeroupper,
4771 .x87,
4772 .xsavec,
4773 .xsaveopt,
4774 .xsaves,
4775 }),
4776 };
4777 pub const znver2: CpuModel = .{
4778 .name = "znver2",
4779 .llvm_name = "znver2",
4780 .features = featureSet(&[_]Feature{
4781 .@"64bit",
4782 .adx,
4783 .aes,
4784 .allow_light_256_bit,
4785 .avx2,
4786 .bmi,
4787 .bmi2,
4788 .branchfusion,
4789 .clflushopt,
4790 .clwb,
4791 .clzero,
4792 .cmov,
4793 .cx16,
4794 .f16c,
4795 .fast_15bytenop,
4796 .fast_bextr,
4797 .fast_imm16,
4798 .fast_lzcnt,
4799 .fast_movbe,
4800 .fast_scalar_fsqrt,
4801 .fast_scalar_shift_masks,
4802 .fast_variable_perlane_shuffle,
4803 .fast_vector_fsqrt,
4804 .fma,
4805 .fsgsbase,
4806 .fxsr,
4807 .idivq_to_divl,
4808 .lzcnt,
4809 .mmx,
4810 .movbe,
4811 .mwaitx,
4812 .nopl,
4813 .pclmul,
4814 .popcnt,
4815 .prfchw,
4816 .rdpid,
4817 .rdpru,
4818 .rdrnd,
4819 .rdseed,
4820 .sahf,
4821 .sbb_dep_breaking,
4822 .sha,
4823 .slow_shld,
4824 .smap,
4825 .smep,
4826 .sse4a,
4827 .vzeroupper,
4828 .wbnoinvd,
4829 .x87,
4830 .xsavec,
4831 .xsaveopt,
4832 .xsaves,
4833 }),
4834 };
4835 pub const znver3: CpuModel = .{
4836 .name = "znver3",
4837 .llvm_name = "znver3",
4838 .features = featureSet(&[_]Feature{
4839 .@"64bit",
4840 .adx,
4841 .allow_light_256_bit,
4842 .bmi,
4843 .bmi2,
4844 .branchfusion,
4845 .clflushopt,
4846 .clwb,
4847 .clzero,
4848 .cmov,
4849 .cx16,
4850 .f16c,
4851 .fast_15bytenop,
4852 .fast_bextr,
4853 .fast_imm16,
4854 .fast_lzcnt,
4855 .fast_movbe,
4856 .fast_scalar_fsqrt,
4857 .fast_scalar_shift_masks,
4858 .fast_variable_perlane_shuffle,
4859 .fast_vector_fsqrt,
4860 .fma,
4861 .fsgsbase,
4862 .fsrm,
4863 .fxsr,
4864 .idivq_to_divl,
4865 .invpcid,
4866 .lzcnt,
4867 .macrofusion,
4868 .mmx,
4869 .movbe,
4870 .mwaitx,
4871 .nopl,
4872 .pku,
4873 .popcnt,
4874 .prfchw,
4875 .rdpid,
4876 .rdpru,
4877 .rdrnd,
4878 .rdseed,
4879 .sahf,
4880 .sbb_dep_breaking,
4881 .sha,
4882 .smap,
4883 .smep,
4884 .sse4a,
4885 .vaes,
4886 .vpclmulqdq,
4887 .vzeroupper,
4888 .wbnoinvd,
4889 .x87,
4890 .xsavec,
4891 .xsaveopt,
4892 .xsaves,
4893 }),
4894 };
4895 pub const znver4: CpuModel = .{
4896 .name = "znver4",
4897 .llvm_name = "znver4",
4898 .features = featureSet(&[_]Feature{
4899 .@"64bit",
4900 .adx,
4901 .allow_light_256_bit,
4902 .avx512bf16,
4903 .avx512bitalg,
4904 .avx512cd,
4905 .avx512dq,
4906 .avx512ifma,
4907 .avx512vbmi,
4908 .avx512vbmi2,
4909 .avx512vl,
4910 .avx512vnni,
4911 .avx512vpopcntdq,
4912 .bmi,
4913 .bmi2,
4914 .branchfusion,
4915 .clflushopt,
4916 .clwb,
4917 .clzero,
4918 .cmov,
4919 .cx16,
4920 .fast_15bytenop,
4921 .fast_bextr,
4922 .fast_dpwssd,
4923 .fast_imm16,
4924 .fast_lzcnt,
4925 .fast_movbe,
4926 .fast_scalar_fsqrt,
4927 .fast_scalar_shift_masks,
4928 .fast_variable_perlane_shuffle,
4929 .fast_vector_fsqrt,
4930 .fsgsbase,
4931 .fsrm,
4932 .fxsr,
4933 .gfni,
4934 .idivq_to_divl,
4935 .invpcid,
4936 .lzcnt,
4937 .macrofusion,
4938 .mmx,
4939 .movbe,
4940 .mwaitx,
4941 .nopl,
4942 .pku,
4943 .popcnt,
4944 .prfchw,
4945 .rdpid,
4946 .rdpru,
4947 .rdrnd,
4948 .rdseed,
4949 .sahf,
4950 .sbb_dep_breaking,
4951 .sha,
4952 .shstk,
4953 .smap,
4954 .smep,
4955 .sse4a,
4956 .vaes,
4957 .vpclmulqdq,
4958 .vzeroupper,
4959 .wbnoinvd,
4960 .x87,
4961 .xsavec,
4962 .xsaveopt,
4963 .xsaves,
4964 }),
4965 };
4966 pub const znver5: CpuModel = .{
4967 .name = "znver5",
4968 .llvm_name = "znver5",
4969 .features = featureSet(&[_]Feature{
4970 .@"64bit",
4971 .adx,
4972 .allow_light_256_bit,
4973 .avx512bf16,
4974 .avx512bitalg,
4975 .avx512cd,
4976 .avx512dq,
4977 .avx512ifma,
4978 .avx512vbmi,
4979 .avx512vbmi2,
4980 .avx512vl,
4981 .avx512vnni,
4982 .avx512vp2intersect,
4983 .avx512vpopcntdq,
4984 .avxvnni,
4985 .bmi,
4986 .bmi2,
4987 .branchfusion,
4988 .clflushopt,
4989 .clwb,
4990 .clzero,
4991 .cmov,
4992 .cx16,
4993 .fast_15bytenop,
4994 .fast_bextr,
4995 .fast_dpwssd,
4996 .fast_imm16,
4997 .fast_lzcnt,
4998 .fast_movbe,
4999 .fast_scalar_fsqrt,
5000 .fast_scalar_shift_masks,
5001 .fast_variable_perlane_shuffle,
5002 .fast_vector_fsqrt,
5003 .fsgsbase,
5004 .fsrm,
5005 .fxsr,
5006 .gfni,
5007 .idivq_to_divl,
5008 .invpcid,
5009 .lzcnt,
5010 .macrofusion,
5011 .mmx,
5012 .movbe,
5013 .movdir64b,
5014 .movdiri,
5015 .mwaitx,
5016 .nopl,
5017 .pku,
5018 .popcnt,
5019 .prefetchi,
5020 .prfchw,
5021 .rdpid,
5022 .rdpru,
5023 .rdrnd,
5024 .rdseed,
5025 .sahf,
5026 .sbb_dep_breaking,
5027 .sha,
5028 .shstk,
5029 .smap,
5030 .smep,
5031 .sse4a,
5032 .vaes,
5033 .vpclmulqdq,
5034 .vzeroupper,
5035 .wbnoinvd,
5036 .x87,
5037 .xsavec,
5038 .xsaveopt,
5039 .xsaves,
5040 }),
5041 };
5042};