1.syntax unified
  2.text
  3
  4.global __a_barrier_dummy
  5.hidden __a_barrier_dummy
  6.type __a_barrier_dummy,%function
  7__a_barrier_dummy:
  8	bx lr
  9
 10.global __a_barrier_oldkuser
 11.hidden __a_barrier_oldkuser
 12.type __a_barrier_oldkuser,%function
 13__a_barrier_oldkuser:
 14	push {r0,r1,r2,r3,ip,lr}
 15	mov r1,r0
 16	mov r2,sp
 17	ldr ip,=0xffff0fc0
 18	bl 1f
 19	pop {r0,r1,r2,r3,ip,lr}
 20	bx lr
 211:	bx ip
 22
 23.global __a_barrier_v6
 24.hidden __a_barrier_v6
 25.type __a_barrier_v6,%function
 26__a_barrier_v6:
 27	.arch armv6t2
 28	mcr p15,0,r0,c7,c10,5
 29	bx lr
 30
 31.global __a_barrier_v7
 32.hidden __a_barrier_v7
 33.type __a_barrier_v7,%function
 34__a_barrier_v7:
 35	.arch armv7-a
 36	dmb ish
 37	bx lr
 38
 39.global __a_cas_dummy
 40.hidden __a_cas_dummy
 41.type __a_cas_dummy,%function
 42__a_cas_dummy:
 43	mov r3,r0
 44	ldr r0,[r2]
 45	subs r0,r3,r0
 46	streq r1,[r2]
 47	bx lr
 48
 49.global __a_cas_v6
 50.hidden __a_cas_v6
 51.type __a_cas_v6,%function
 52__a_cas_v6:
 53	.arch armv6t2
 54	mov r3,r0
 55	mcr p15,0,r0,c7,c10,5
 561:	ldrex r0,[r2]
 57	subs r0,r3,r0
 58	strexeq r0,r1,[r2]
 59	teqeq r0,#1
 60	beq 1b
 61	mcr p15,0,r0,c7,c10,5
 62	bx lr
 63
 64.global __a_cas_v7
 65.hidden __a_cas_v7
 66.type __a_cas_v7,%function
 67__a_cas_v7:
 68	.arch armv7-a
 69	mov r3,r0
 70	dmb ish
 711:	ldrex r0,[r2]
 72	subs r0,r3,r0
 73	strexeq r0,r1,[r2]
 74	teqeq r0,#1
 75	beq 1b
 76	dmb ish
 77	bx lr
 78
 79.global __a_gettp_cp15
 80.hidden __a_gettp_cp15
 81.type __a_gettp_cp15,%function
 82__a_gettp_cp15:
 83	mrc p15,0,r0,c13,c0,3
 84	bx lr
 85
 86/* Tag this file with minimum ISA level so as not to affect linking. */
 87.object_arch armv4t
 88.eabi_attribute 6,2
 89
 90.data
 91.align 2
 92
 93.global __a_barrier_ptr
 94.hidden __a_barrier_ptr
 95__a_barrier_ptr:
 96	.word __a_barrier_dummy
 97
 98.global __a_cas_ptr
 99.hidden __a_cas_ptr
100__a_cas_ptr:
101	.word __a_cas_dummy
102
103.global __a_gettp_ptr
104.hidden __a_gettp_ptr
105__a_gettp_ptr:
106	.word __a_gettp_cp15