master
1#if __ARM_PCS_VFP
2
3.syntax unified
4.fpu vfp
5
6.global fegetround
7.type fegetround,%function
8fegetround:
9 fmrx r0, fpscr
10 and r0, r0, #0xc00000
11 bx lr
12
13.global __fesetround
14.hidden __fesetround
15.type __fesetround,%function
16__fesetround:
17 fmrx r3, fpscr
18 bic r3, r3, #0xc00000
19 orr r3, r3, r0
20 fmxr fpscr, r3
21 mov r0, #0
22 bx lr
23
24.global fetestexcept
25.type fetestexcept,%function
26fetestexcept:
27 and r0, r0, #0x1f
28 fmrx r3, fpscr
29 and r0, r0, r3
30 bx lr
31
32.global feclearexcept
33.type feclearexcept,%function
34feclearexcept:
35 and r0, r0, #0x1f
36 fmrx r3, fpscr
37 bic r3, r3, r0
38 fmxr fpscr, r3
39 mov r0, #0
40 bx lr
41
42.global feraiseexcept
43.type feraiseexcept,%function
44feraiseexcept:
45 and r0, r0, #0x1f
46 fmrx r3, fpscr
47 orr r3, r3, r0
48 fmxr fpscr, r3
49 mov r0, #0
50 bx lr
51
52.global fegetenv
53.type fegetenv,%function
54fegetenv:
55 fmrx r3, fpscr
56 str r3, [r0]
57 mov r0, #0
58 bx lr
59
60.global fesetenv
61.type fesetenv,%function
62fesetenv:
63 cmn r0, #1
64 moveq r3, #0
65 ldrne r3, [r0]
66 fmxr fpscr, r3
67 mov r0, #0
68 bx lr
69
70#endif