master
 1#define __SYSCALL_LL_E(x) \
 2((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
 3((union { long long ll; long l[2]; }){ .ll = x }).l[1]
 4#define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
 5
 6static __inline long __syscall0(long n)
 7{
 8	register unsigned long d0 __asm__("d0") = n;
 9	__asm__ __volatile__ ("trap #0" : "+r"(d0)
10		:
11		: "memory");
12	return d0;
13}
14
15static inline long __syscall1(long n, long a)
16{
17	register unsigned long d0 __asm__("d0") = n;
18	register unsigned long d1 __asm__("d1") = a;
19	__asm__ __volatile__ ("trap #0" : "+r"(d0)
20		: "r"(d1)
21		: "memory");
22	return d0;
23}
24
25static inline long __syscall2(long n, long a, long b)
26{
27	register unsigned long d0 __asm__("d0") = n;
28	register unsigned long d1 __asm__("d1") = a;
29	register unsigned long d2 __asm__("d2") = b;
30	__asm__ __volatile__ ("trap #0" : "+r"(d0)
31		: "r"(d1), "r"(d2)
32		: "memory");
33	return d0;
34}
35
36static inline long __syscall3(long n, long a, long b, long c)
37{
38	register unsigned long d0 __asm__("d0") = n;
39	register unsigned long d1 __asm__("d1") = a;
40	register unsigned long d2 __asm__("d2") = b;
41	register unsigned long d3 __asm__("d3") = c;
42	__asm__ __volatile__ ("trap #0" : "+r"(d0)
43		: "r"(d1), "r"(d2), "r"(d3)
44		: "memory");
45	return d0;
46}
47
48static inline long __syscall4(long n, long a, long b, long c, long d)
49{
50	register unsigned long d0 __asm__("d0") = n;
51	register unsigned long d1 __asm__("d1") = a;
52	register unsigned long d2 __asm__("d2") = b;
53	register unsigned long d3 __asm__("d3") = c;
54	register unsigned long d4 __asm__("d4") = d;
55	__asm__ __volatile__ ("trap #0" : "+r"(d0)
56		: "r"(d1), "r"(d2), "r"(d3), "r"(d4)
57		: "memory");
58	return d0;
59}
60
61static inline long __syscall5(long n, long a, long b, long c, long d, long e)
62{
63	register unsigned long d0 __asm__("d0") = n;
64	register unsigned long d1 __asm__("d1") = a;
65	register unsigned long d2 __asm__("d2") = b;
66	register unsigned long d3 __asm__("d3") = c;
67	register unsigned long d4 __asm__("d4") = d;
68	register unsigned long d5 __asm__("d5") = e;
69	__asm__ __volatile__ ("trap #0" : "+r"(d0)
70		: "r"(d1), "r"(d2), "r"(d3), "r"(d4), "r"(d5)
71		: "memory");
72	return d0;
73}
74
75static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
76{
77	register unsigned long d0 __asm__("d0") = n;
78	register unsigned long d1 __asm__("d1") = a;
79	register unsigned long d2 __asm__("d2") = b;
80	register unsigned long d3 __asm__("d3") = c;
81	register unsigned long d4 __asm__("d4") = d;
82	register unsigned long d5 __asm__("d5") = e;
83	register unsigned long a0 __asm__("a0") = f;
84	__asm__ __volatile__ ("trap #0" : "+r"(d0)
85		: "r"(d1), "r"(d2), "r"(d3), "r"(d4), "r"(d5), "r"(a0)
86		: "memory");
87	return d0;
88}
89
90#define SYSCALL_IPC_BROKEN_MODE