1/*-
  2 * SPDX-License-Identifier: BSD-4-Clause
  3 *
  4 * Copyright (c) 1990 The Regents of the University of California.
  5 * All rights reserved.
  6 * Copyright (c) 1994 John S. Dyson
  7 * All rights reserved.
  8 * Copyright (c) 2003 Peter Wemm
  9 * All rights reserved.
 10 *
 11 * This code is derived from software contributed to Berkeley by
 12 * William Jolitz.
 13 *
 14 * Redistribution and use in source and binary forms, with or without
 15 * modification, are permitted provided that the following conditions
 16 * are met:
 17 * 1. Redistributions of source code must retain the above copyright
 18 *    notice, this list of conditions and the following disclaimer.
 19 * 2. Redistributions in binary form must reproduce the above copyright
 20 *    notice, this list of conditions and the following disclaimer in the
 21 *    documentation and/or other materials provided with the distribution.
 22 * 3. All advertising materials mentioning features or use of this software
 23 *    must display the following acknowledgement:
 24 *	This product includes software developed by the University of
 25 *	California, Berkeley and its contributors.
 26 * 4. Neither the name of the University nor the names of its contributors
 27 *    may be used to endorse or promote products derived from this software
 28 *    without specific prior written permission.
 29 *
 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 33 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 40 * SUCH DAMAGE.
 41 *
 42 *	from: @(#)vmparam.h	5.9 (Berkeley) 5/12/91
 43 */
 44
 45#ifdef __i386__
 46#include <i386/vmparam.h>
 47#else /* !__i386__ */
 48
 49#ifndef _MACHINE_VMPARAM_H_
 50#define	_MACHINE_VMPARAM_H_ 1
 51
 52/*
 53 * Machine dependent constants for AMD64.
 54 */
 55
 56/*
 57 * Virtual memory related constants, all in bytes
 58 */
 59#define	MAXTSIZ		(32768UL*1024*1024)	/* max text size */
 60#ifndef DFLDSIZ
 61#define	DFLDSIZ		(32768UL*1024*1024)	/* initial data size limit */
 62#endif
 63#ifndef MAXDSIZ
 64#define	MAXDSIZ		(32768UL*1024*1024)	/* max data size */
 65#endif
 66#ifndef	DFLSSIZ
 67#define	DFLSSIZ		(8UL*1024*1024)		/* initial stack size limit */
 68#endif
 69#ifndef	MAXSSIZ
 70#define	MAXSSIZ		(512UL*1024*1024)	/* max stack size */
 71#endif
 72#ifndef SGROWSIZ
 73#define	SGROWSIZ	(128UL*1024)		/* amount to grow stack */
 74#endif
 75
 76/*
 77 * We provide a machine specific single page allocator through the use
 78 * of the direct mapped segment.  This uses 2MB pages for reduced
 79 * TLB pressure.
 80 */
 81#if !defined(KASAN) && !defined(KMSAN)
 82#define	UMA_MD_SMALL_ALLOC
 83#endif
 84
 85/*
 86 * The physical address space is densely populated.
 87 */
 88#define	VM_PHYSSEG_DENSE
 89
 90/*
 91 * The number of PHYSSEG entries must be one greater than the number
 92 * of phys_avail entries because the phys_avail entry that spans the
 93 * largest physical address that is accessible by ISA DMA is split
 94 * into two PHYSSEG entries. 
 95 */
 96#define	VM_PHYSSEG_MAX		63
 97
 98/*
 99 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool
100 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
101 * the pool from which physical pages for page tables and small UMA
102 * objects are allocated.
103 */
104#define	VM_NFREEPOOL		2
105#define	VM_FREEPOOL_DEFAULT	0
106#define	VM_FREEPOOL_DIRECT	1
107
108/*
109 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
110 * that have physical addresses below 4G but are not accessible by ISA DMA,
111 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
112 * DMA.
113 */
114#define	VM_NFREELIST		3
115#define	VM_FREELIST_DEFAULT	0
116#define	VM_FREELIST_DMA32	1
117#define	VM_FREELIST_LOWMEM	2
118
119#define VM_LOWMEM_BOUNDARY	(16 << 20)	/* 16MB ISA DMA limit */
120
121/*
122 * Create the DMA32 free list only if the number of physical pages above
123 * physical address 4G is at least 16M, which amounts to 64GB of physical
124 * memory.
125 */
126#define	VM_DMA32_NPAGES_THRESHOLD	16777216
127
128/*
129 * An allocation size of 16MB is supported in order to optimize the
130 * use of the direct map by UMA.  Specifically, a cache line contains
131 * at most 8 PDEs, collectively mapping 16MB of physical memory.  By
132 * reducing the number of distinct 16MB "pages" that are used by UMA,
133 * the physical memory allocator reduces the likelihood of both 2MB
134 * page TLB misses and cache misses caused by 2MB page TLB misses.
135 */
136#define	VM_NFREEORDER		13
137
138/*
139 * Enable superpage reservations: 1 level.
140 */
141#ifndef	VM_NRESERVLEVEL
142#define	VM_NRESERVLEVEL		1
143#endif
144
145/*
146 * Level 0 reservations consist of 512 pages.
147 */
148#ifndef	VM_LEVEL_0_ORDER
149#define	VM_LEVEL_0_ORDER	9
150#endif
151
152#ifdef	SMP
153#define	PA_LOCK_COUNT	256
154#endif
155
156/*
157 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader.
158 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated
159 * by boot services.
160 * Needs to be aligned at 2MB superpage boundary.
161 */
162#ifndef KERNLOAD
163#define	KERNLOAD	0x200000
164#endif
165
166/*
167 * Virtual addresses of things.  Derived from the page directory and
168 * page table indexes from pmap.h for precision.
169 *
170 * 0x0000000000000000 - 0x00007fffffffffff   user map
171 * 0x0000800000000000 - 0xffff7fffffffffff   does not exist (hole)
172 * 0xffff800000000000 - 0xffff804020100fff   recursive page table (512GB slot)
173 * 0xffff804020100fff - 0xffff807fffffffff   unused
174 * 0xffff808000000000 - 0xffff847fffffffff   large map (can be tuned up)
175 * 0xffff848000000000 - 0xfffff77fffffffff   unused (large map extends there)
176 * 0xfffff60000000000 - 0xfffff7ffffffffff   2TB KMSAN origin map, optional
177 * 0xfffff78000000000 - 0xfffff7bfffffffff   512GB KASAN shadow map, optional
178 * 0xfffff80000000000 - 0xfffffbffffffffff   4TB direct map
179 * 0xfffffc0000000000 - 0xfffffdffffffffff   2TB KMSAN shadow map, optional
180 * 0xfffffe0000000000 - 0xffffffffffffffff   2TB kernel map
181 *
182 * Within the kernel map:
183 *
184 * 0xfffffe0000000000                        vm_page_array
185 * 0xffffffff80000000                        KERNBASE
186 */
187
188#define	VM_MIN_KERNEL_ADDRESS	KV4ADDR(KPML4BASE, 0, 0, 0)
189#define	VM_MAX_KERNEL_ADDRESS	KV4ADDR(KPML4BASE + NKPML4E - 1, \
190					NPDPEPG-1, NPDEPG-1, NPTEPG-1)
191
192#define	DMAP_MIN_ADDRESS	KV4ADDR(DMPML4I, 0, 0, 0)
193#define	DMAP_MAX_ADDRESS	KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0)
194
195#define	KASAN_MIN_ADDRESS	KV4ADDR(KASANPML4I, 0, 0, 0)
196#define	KASAN_MAX_ADDRESS	KV4ADDR(KASANPML4I + NKASANPML4E, 0, 0, 0)
197
198#define	KMSAN_SHAD_MIN_ADDRESS	KV4ADDR(KMSANSHADPML4I, 0, 0, 0)
199#define	KMSAN_SHAD_MAX_ADDRESS	KV4ADDR(KMSANSHADPML4I + NKMSANSHADPML4E, \
200					0, 0, 0)
201
202#define	KMSAN_ORIG_MIN_ADDRESS	KV4ADDR(KMSANORIGPML4I, 0, 0, 0)
203#define	KMSAN_ORIG_MAX_ADDRESS	KV4ADDR(KMSANORIGPML4I + NKMSANORIGPML4E, \
204					0, 0, 0)
205
206#define	LARGEMAP_MIN_ADDRESS	KV4ADDR(LMSPML4I, 0, 0, 0)
207#define	LARGEMAP_MAX_ADDRESS	KV4ADDR(LMEPML4I + 1, 0, 0, 0)
208
209/*
210 * Formally kernel mapping starts at KERNBASE, but kernel linker
211 * script leaves first PDE reserved.  For legacy BIOS boot, kernel is
212 * loaded at KERNLOAD = 2M, and initial kernel page table maps
213 * physical memory from zero to KERNend starting at KERNBASE.
214 *
215 * KERNSTART is where the first actual kernel page is mapped, after
216 * the compatibility mapping.
217 */
218#define	KERNBASE		KV4ADDR(KPML4I, KPDPI, 0, 0)
219#define	KERNSTART		(KERNBASE + NBPDR)
220
221#define	UPT_MAX_ADDRESS		KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I)
222#define	UPT_MIN_ADDRESS		KV4ADDR(PML4PML4I, 0, 0, 0)
223
224#define	VM_MAXUSER_ADDRESS_LA57	UVADDR(NUPML5E, 0, 0, 0, 0)
225#define	VM_MAXUSER_ADDRESS_LA48	UVADDR(0, NUP4ML4E, 0, 0, 0)
226#define	VM_MAXUSER_ADDRESS	VM_MAXUSER_ADDRESS_LA57
227
228#define	SHAREDPAGE_LA57		(VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE)
229#define	SHAREDPAGE_LA48		(VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE)
230#define	USRSTACK_LA57		SHAREDPAGE_LA57
231#define	USRSTACK_LA48		SHAREDPAGE_LA48
232#define	USRSTACK		USRSTACK_LA48
233#define	PS_STRINGS_LA57		(USRSTACK_LA57 - sizeof(struct ps_strings))
234#define	PS_STRINGS_LA48		(USRSTACK_LA48 - sizeof(struct ps_strings))
235
236#define	VM_MAX_ADDRESS		UPT_MAX_ADDRESS
237#define	VM_MIN_ADDRESS		(0)
238
239/*
240 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's
241 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works
242 * because the result is not actually accessed until later, but the early
243 * vt fb startup needs to be reworked.
244 */
245#define	PHYS_IN_DMAP(pa)	(dmaplimit == 0 || (pa) < dmaplimit)
246#define	VIRT_IN_DMAP(va)	((va) >= DMAP_MIN_ADDRESS &&		\
247    (va) < (DMAP_MIN_ADDRESS + dmaplimit))
248
249#define	PMAP_HAS_DMAP	1
250#define	PHYS_TO_DMAP(x)	({						\
251	KASSERT(PHYS_IN_DMAP(x),					\
252	    ("physical address %#jx not covered by the DMAP",		\
253	    (uintmax_t)x));						\
254	(x) | DMAP_MIN_ADDRESS; })
255
256#define	DMAP_TO_PHYS(x)	({						\
257	KASSERT(VIRT_IN_DMAP(x),					\
258	    ("virtual address %#jx not covered by the DMAP",		\
259	    (uintmax_t)x));						\
260	(x) & ~DMAP_MIN_ADDRESS; })
261
262/*
263 * amd64 maps the page array into KVA so that it can be more easily
264 * allocated on the correct memory domains.
265 */
266#define	PMAP_HAS_PAGE_ARRAY	1
267
268/*
269 * How many physical pages per kmem arena virtual page.
270 */
271#ifndef VM_KMEM_SIZE_SCALE
272#define	VM_KMEM_SIZE_SCALE	(1)
273#endif
274
275/*
276 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
277 * kernel map.
278 */
279#ifndef VM_KMEM_SIZE_MAX
280#define	VM_KMEM_SIZE_MAX	((VM_MAX_KERNEL_ADDRESS - \
281    VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5)
282#endif
283
284/* initial pagein size of beginning of executable file */
285#ifndef VM_INITIAL_PAGEIN
286#define	VM_INITIAL_PAGEIN	16
287#endif
288
289#define	ZERO_REGION_SIZE	(2 * 1024 * 1024)	/* 2MB */
290
291/*
292 * The pmap can create non-transparent large page mappings.
293 */
294#define	PMAP_HAS_LARGEPAGES	1
295
296/*
297 * Need a page dump array for minidump.
298 */
299#define MINIDUMP_PAGE_TRACKING	1
300
301#endif /* _MACHINE_VMPARAM_H_ */
302
303#endif /* __i386__ */