1/*-
  2 * SPDX-License-Identifier: BSD-2-Clause
  3 *
  4 * Copyright (c) 2003-2005,2008 Joseph Koshy
  5 * Copyright (c) 2007 The FreeBSD Foundation
  6 * All rights reserved.
  7 *
  8 * Portions of this software were developed by A. Joseph Koshy under
  9 * sponsorship from the FreeBSD Foundation and Google, Inc.
 10 *
 11 * Redistribution and use in source and binary forms, with or without
 12 * modification, are permitted provided that the following conditions
 13 * are met:
 14 * 1. Redistributions of source code must retain the above copyright
 15 *    notice, this list of conditions and the following disclaimer.
 16 * 2. Redistributions in binary form must reproduce the above copyright
 17 *    notice, this list of conditions and the following disclaimer in the
 18 *    documentation and/or other materials provided with the distribution.
 19 *
 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 30 * SUCH DAMAGE.
 31 */
 32
 33#ifndef _MACHINE_PMC_MDEP_H
 34#define	_MACHINE_PMC_MDEP_H 1
 35
 36#ifdef	_KERNEL
 37struct pmc_mdep;
 38#endif
 39
 40/*
 41 * On the i386 platform we support the following PMCs.
 42 *
 43 * TSC		The timestamp counter
 44 * K7		AMD Athlon XP/MP and other 32 bit processors.
 45 * K8		AMD Athlon64 and Opteron PMCs in 32 bit mode.
 46 * IAP		Intel Core/Core2/Atom programmable PMCs.
 47 * IAF		Intel fixed-function PMCs.
 48 * UCP		Intel Uncore programmable PMCs.
 49 * UCF		Intel Uncore fixed-function PMCs.
 50 */
 51
 52#include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */
 53#include <dev/hwpmc/hwpmc_core.h>
 54#include <dev/hwpmc/hwpmc_tsc.h>
 55#include <dev/hwpmc/hwpmc_uncore.h>
 56
 57/*
 58 * Intel processors implementing V2 and later of the Intel performance
 59 * measurement architecture have PMCs of the following classes: TSC,
 60 * IAF, IAP, UCF and UCP.
 61 */
 62#define	PMC_MDEP_CLASS_INDEX_TSC	1
 63#define	PMC_MDEP_CLASS_INDEX_K7		2
 64#define	PMC_MDEP_CLASS_INDEX_K8		2
 65#define	PMC_MDEP_CLASS_INDEX_IAP	2
 66#define	PMC_MDEP_CLASS_INDEX_IAF	3
 67#define	PMC_MDEP_CLASS_INDEX_UCP	4
 68#define	PMC_MDEP_CLASS_INDEX_UCF	5
 69
 70/*
 71 * Architecture specific extensions to <sys/pmc.h> structures.
 72 */
 73
 74union pmc_md_op_pmcallocate  {
 75	struct pmc_md_amd_op_pmcallocate	pm_amd;
 76	struct pmc_md_iap_op_pmcallocate	pm_iap;
 77	struct pmc_md_ucf_op_pmcallocate	pm_ucf;
 78	struct pmc_md_ucp_op_pmcallocate	pm_ucp;
 79	uint64_t				__pad[4];
 80};
 81
 82/* Logging */
 83#define	PMCLOG_READADDR		PMCLOG_READ32
 84#define	PMCLOG_EMITADDR		PMCLOG_EMIT32
 85
 86#ifdef _KERNEL
 87
 88/* MD extension for 'struct pmc' */
 89union pmc_md_pmc  {
 90	struct pmc_md_amd_pmc	pm_amd;
 91	struct pmc_md_iaf_pmc	pm_iaf;
 92	struct pmc_md_iap_pmc	pm_iap;
 93	struct pmc_md_ucf_pmc	pm_ucf;
 94	struct pmc_md_ucp_pmc	pm_ucp;
 95};
 96
 97struct pmc;
 98struct pmc_mdep;
 99
100#define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->tf_eip)
101#define	PMC_TRAPFRAME_TO_FP(TF)	((TF)->tf_ebp)
102
103/*
104 * The layout of the stack frame on entry into the NMI handler depends on
105 * whether a privilege level change (and consequent stack switch) was
106 * required for entry.
107 *
108 * When processing an interrupt when in user mode, the processor switches
109 * stacks, and saves the user mode stack pointer on the kernel stack.  The
110 * user mode stack pointer is then available to the interrupt handler
111 * at frame->tf_esp.
112 *
113 * When processing an interrupt while in kernel mode, the processor
114 * continues to use the existing (kernel) stack.  Therefore we determine
115 * the stack pointer for the interrupted kernel procedure by adding an
116 * offset to the current frame pointer.
117 */
118
119#define	PMC_TRAPFRAME_TO_USER_SP(TF)	((TF)->tf_esp)
120#define	PMC_TRAPFRAME_TO_KERNEL_SP(TF)	((uintptr_t) &((TF)->tf_esp))
121
122#define	PMC_IN_KERNEL_STACK(va)	kstack_contains(curthread, (va), sizeof(va))
123#define	PMC_IN_KERNEL(va)	INKERNEL(va)
124#define	PMC_IN_USERSPACE(va)	((va) <= VM_MAXUSER_ADDRESS)
125
126#define	PMC_IN_TRAP_HANDLER(PC) 			\
127	((PC) >= (uintptr_t)start_exceptions + setidt_disp &&	\
128	 (PC) < (uintptr_t) end_exceptions + setidt_disp)
129
130#define	PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I)		\
131	(((I) & 0x00ffffff) == 0xe58955) /* pushl %ebp; movl %esp,%ebp */
132#define	PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I)		\
133	(((I) & 0x0000ffff) == 0xe589)	/* movl %esp,%ebp */
134#define	PMC_AT_FUNCTION_EPILOGUE_RET(I)			\
135	(((I) & 0xFF) == 0xC3)		   /* ret */
136
137/* Build a fake kernel trapframe from current instruction pointer. */
138#define PMC_FAKE_TRAPFRAME(TF)						\
139	do {								\
140	(TF)->tf_cs = 0; (TF)->tf_eflags = 0;				\
141	__asm __volatile("movl %%ebp,%0" : "=r" ((TF)->tf_ebp));	\
142	__asm __volatile("movl %%esp,%0" : "=r" ((TF)->tf_esp));	\
143	__asm __volatile("call 1f \n\t1: pop %0" : "=r"((TF)->tf_eip));	\
144	} while (0)
145
146/*
147 * Prototypes
148 */
149
150void	start_exceptions(void), end_exceptions(void);
151
152struct pmc_mdep *pmc_amd_initialize(void);
153void	pmc_amd_finalize(struct pmc_mdep *_md);
154struct pmc_mdep *pmc_intel_initialize(void);
155void	pmc_intel_finalize(struct pmc_mdep *_md);
156
157#endif /* _KERNEL */
158#endif /* _MACHINE_PMC_MDEP_H */