master
  1/*	$NetBSD: cacheops_60.h,v 1.13 2008/04/28 20:23:26 martin Exp $	*/
  2
  3/*-
  4 * Copyright (c) 1997 The NetBSD Foundation, Inc.
  5 * All rights reserved.
  6 *
  7 * This code is derived from software contributed to The NetBSD Foundation
  8 * by Leo Weppelman
  9 *
 10 * Redistribution and use in source and binary forms, with or without
 11 * modification, are permitted provided that the following conditions
 12 * are met:
 13 * 1. Redistributions of source code must retain the above copyright
 14 *    notice, this list of conditions and the following disclaimer.
 15 * 2. Redistributions in binary form must reproduce the above copyright
 16 *    notice, this list of conditions and the following disclaimer in the
 17 *    documentation and/or other materials provided with the distribution.
 18 *
 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 29 * POSSIBILITY OF SUCH DAMAGE.
 30 */
 31
 32/*
 33 * Invalidate entire TLB.
 34 */
 35static __inline void __attribute__((__unused__))
 36TBIA_60(void)
 37{
 38	__asm volatile (" .word 0xf518" ); /*  pflusha */
 39}
 40
 41/*
 42 * Invalidate any TLB entry for given VA (TB Invalidate Single)
 43 */
 44static __inline void __attribute__((__unused__))
 45TBIS_60(vaddr_t va)
 46{
 47	register uint8_t *r_va __asm("%a0") = (void *)va;
 48	int	tmp;
 49
 50	__asm volatile (" movc   %1, %%dfc;"	/* select supervisor	*/
 51			  " .word 0xf508;"	/* pflush %a0@		*/
 52			  " moveq  %3, %1;"	/* select user		*/
 53			  " movc   %1, %%dfc;"
 54			  " .word 0xf508;"	/* pflush %a0@		*/
 55			  " movc   %%cacr,%1;"
 56			  " orl    %4,%1;"
 57			  " movc   %1,%%cacr" : "=d" (tmp) :
 58			  "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD),
 59			  "i" (IC60_CABC));
 60}
 61
 62/*
 63 * Invalidate supervisor side of TLB
 64 */
 65static __inline void __attribute__((__unused__))
 66TBIAS_60(void)
 67{
 68	int	tmp;
 69
 70	/*
 71	 * Cannot specify supervisor/user on pflusha, so we flush all
 72	 */
 73	__asm volatile (" .word 0xf518;"
 74			  " movc  %%cacr,%0;"
 75			  " orl   %1,%0;"
 76			  " movc  %0,%%cacr" /* clear all branch cache
 77			 		        entries */
 78			  : "=d" (tmp) : "i" (IC60_CABC) );
 79}
 80
 81/*
 82 * Invalidate user side of TLB
 83 */
 84static __inline void __attribute__((__unused__))
 85TBIAU_60(void)
 86{
 87	int	tmp;
 88
 89	/*
 90	 * Cannot specify supervisor/user on pflusha, so we flush all
 91	 */
 92	__asm volatile (" .word 0xf518;"
 93			  " movc  %%cacr,%0;"
 94			  " orl   %1,%0;"
 95			  " movc  %0,%%cacr" /* clear all branch cache
 96			 		        entries */
 97			  : "=d" (tmp) : "i" (IC60_CUBC) );
 98}
 99
100/*
101 * Invalidate instruction cache
102 */
103static __inline void __attribute__((__unused__))
104ICIA_60(void)
105{
106	/* inva ic (also clears branch cache) */
107	__asm volatile (" .word 0xf498;");
108}
109
110static __inline void __attribute__((__unused__))
111ICPA_60(void)
112{
113	/* inva ic (also clears branch cache) */
114	__asm volatile (" .word 0xf498;");
115}
116
117/*
118 * Invalidate data cache.
119 */
120static __inline void __attribute__((__unused__))
121DCIA_60(void)
122{
123	__asm volatile (" .word 0xf478;"); /* cpusha dc */
124}
125
126static __inline void __attribute__((__unused__))
127DCIS_60(void)
128{
129	__asm volatile (" .word 0xf478;"); /* cpusha dc */
130}
131
132static __inline void __attribute__((__unused__))
133DCIU_60(void)
134{
135	__asm volatile (" .word 0xf478;"); /* cpusha dc */
136}
137
138static __inline void __attribute__((__unused__))
139DCIAS_60(paddr_t pa)
140{
141	register uint8_t *r_pa __asm("%a0") = (void *)pa;
142
143	__asm volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */
144}
145
146static __inline void __attribute__((__unused__))
147PCIA_60(void)
148{
149	__asm volatile (" .word 0xf478;"); /* cpusha dc */
150}
151
152#define	DCFA_60()	DCFA_40()
153#define	DCPA_60()	DCPA_40()
154#define	ICPL_60(pa)	ICPL_40(pa)
155#define	ICPP_60(pa)	ICPP_40(pa)
156#define	DCPL_60(pa)	DCPL_40(pa)
157#define	DCPP_60(pa)	DCPP_40(pa)
158#define	DCFL_60(pa)	DCFL_40(pa)
159#define	DCFP_60(pa)	DCFP_40(pa)