1/*	$NetBSD: param.h,v 1.62 2021/05/31 14:38:56 simonb Exp $ */
  2
  3/*
  4 * Copyright (c) 1992, 1993
  5 *	The Regents of the University of California.  All rights reserved.
  6 *
  7 * This software was developed by the Computer Systems Engineering group
  8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
  9 * contributed to Berkeley.
 10 *
 11 * All advertising materials mentioning features or use of this software
 12 * must display the following acknowledgement:
 13 *	This product includes software developed by the University of
 14 *	California, Lawrence Berkeley Laboratory.
 15 *
 16 * Redistribution and use in source and binary forms, with or without
 17 * modification, are permitted provided that the following conditions
 18 * are met:
 19 * 1. Redistributions of source code must retain the above copyright
 20 *    notice, this list of conditions and the following disclaimer.
 21 * 2. Redistributions in binary form must reproduce the above copyright
 22 *    notice, this list of conditions and the following disclaimer in the
 23 *    documentation and/or other materials provided with the distribution.
 24 * 3. Neither the name of the University nor the names of its contributors
 25 *    may be used to endorse or promote products derived from this software
 26 *    without specific prior written permission.
 27 *
 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 38 * SUCH DAMAGE.
 39 *
 40 *	@(#)param.h	8.1 (Berkeley) 6/11/93
 41 */
 42
 43/*
 44 * Copyright (c) 1996-2002 Eduardo Horvath
 45 *
 46 * Redistribution and use in source and binary forms, with or without
 47 * modification, are permitted provided that the following conditions
 48 * are met:
 49 * 1. Redistributions of source code must retain the above copyright
 50 *    notice, this list of conditions and the following disclaimer.
 51 *  
 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 55 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 62 * SUCH DAMAGE.
 63 *
 64 */
 65
 66#if defined(_KERNEL_OPT)
 67#include "opt_param.h"
 68#include "opt_sparc_arch.h"
 69#endif
 70
 71#ifdef __arch64__
 72#define	_MACHINE	sparc64
 73#define	MACHINE		"sparc64"
 74#define	_MACHINE_ARCH	sparc64
 75#define	MACHINE_ARCH	"sparc64"
 76#define	MID_MACHINE	MID_SPARC64
 77#else
 78#define	_MACHINE	sparc
 79#define	MACHINE		"sparc"
 80#define	_MACHINE_ARCH	sparc
 81#define	MACHINE_ARCH	"sparc"
 82#define	MID_MACHINE	MID_SPARC
 83#endif
 84
 85#ifdef _KERNEL				/* XXX */
 86#ifndef _LOCORE				/* XXX */
 87#include <machine/cpu.h>		/* XXX */
 88#endif					/* XXX */
 89#endif					/* XXX */
 90
 91#define ALIGNBYTES32		0x7
 92#define ALIGNBYTES64		0xf
 93#define ALIGN32(p)		(((u_long)(p) + ALIGNBYTES32) & ~ALIGNBYTES32)
 94
 95
 96/*
 97 * The following variables are always defined and initialized (in locore)
 98 * so independently compiled modules (e.g. LKMs) can be used irrespective
 99 * of the `options SUN4?' combination a particular kernel was configured with.
100 * See also the definitions of NBPG, PGOFSET and PGSHIFT below.
101 */
102#if (defined(_KERNEL) || defined(_STANDALONE)) && !defined(_LOCORE)
103extern int nbpg, pgofset, pgshift;
104#endif
105
106#ifdef __arch64__
107
108#ifdef SUN4V
109#define	MAXCPUS		256
110#endif
111
112/* We get stack overflows w/8K stacks in 64-bit mode */
113#define	SSIZE		2		/* initial stack size in pages */
114#else
115#define	SSIZE		2
116#endif
117#define	USPACE		(SSIZE*8192)
118
119
120/*
121 * Here are all the magic kernel virtual addresses and how they're allocated.
122 * 
123 * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
124 * 0x00000000f0100000.  It also uses some space around 0x00000000fff00000 to
125 * map in device registers.  The rest is pretty much ours to play with.
126 *
127 * The kernel starts at KERNBASE.  Here's the layout.  We use macros to set
128 * the addresses so we can relocate everything easily.  We use 4MB locked TTEs
129 * to map in the kernel text and data segments.  Any extra pages are recycled,
130 * so they can potentially be double-mapped.  This shouldn't really be a
131 * problem since they're unused, but wild pointers can cause silent data
132 * corruption if they are in those segments.
133 *
134 * 0x0000000000000000:	64K NFO page zero
135 * 0x0000000000010000:	Userland or PROM
136 * KERNBASE:		4MB (or multiple thereof) kernel text and read only
137 *			        data. This is mapped in the ITLB and 
138 *				Read-Only in the DTLB
139 * KERNBASE+0x400000:	4MB kernel data and BSS -- not in ITLB
140 *				Contains context table, kernel pmap,
141 *				and other important structures.
142 * KERNBASE+0x800000:	Unmapped page -- redzone
143 * KERNBASE+0x802000:	Process 0 stack and u-area
144 * KERNBASE+0x806000:	2 pages for pmap_copy_page and /dev/mem
145 *
146 * For 32 bit kernels:
147 *  KERNBASE+0x80a000:	Start of kernel VA segment
148 *  KERNEND:		End of kernel VA segment
149 *
150 * KERNEND+0x02000:	Auxreg_va (unused?)
151 * KERNEND+0x04000:	TMPMAP_VA (unused?)
152 * KERNEND+0x06000:	message buffer.
153 * KERNEND+0x010000:	INTSTACK -- per-cpu 64K locked TTE
154 *			Contains interrupt stack (32KB), cpu_info structure
155 *			and panicstack (32KB)
156 * KERNEND+0x018000:	CPUINFO_VA -- cpu_info structure
157 * KERNEND+0x020000:	unmapped space (top of panicstack)
158 * KERNEND+0x022000:	IODEV_BASE -- begin mapping IO devices here.
159 * 0x00000000f0000000:	IODEV_END -- end of device mapping space.
160 *
161 * For 64 bit kernels:
162 *  0x100000000:	Start of kernel VA segment (theoretically upto
163 *			the VA hole)
164 *
165 */
166#define	KERNBASE	0x001000000	/* start of kernel virtual space */
167#define	KERNEND		0x0e0000000	/* end of kernel virtual space */
168
169#define	_MAXNBPG	8192	/* fixed VAs, independent of actual NBPG */
170
171#define	MSGBUF_VA	(      KERNEND + _MAXNBPG) /* 1 page REDZONE */
172/*
173 * Maximum message buffer size is 248k.
174 * Here's the location of the interrupt stack and CPU structure.
175 */
176#define	INTSTACK	(      KERNEND + 32*_MAXNBPG)
177#define	EINTSTACK	(     INTSTACK + 4*_MAXNBPG)
178#define	CPUINFO_VA	(    EINTSTACK              )
179#define	PANICSTACK	(     INTSTACK + 8*_MAXNBPG)
180#define	IODEV_BASE	(     INTSTACK + 9*_MAXNBPG)	/* 1 page redzone */
181#define	IODEV_END	0x0f0000000UL			/* ~16 MB of iospace */
182
183/*
184 * Constants related to network buffer management.
185 * MCLBYTES must be no larger than NBPG (the software page size), and,
186 * on machines that exchange pages of input or output buffers with mbuf
187 * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
188 * of the hardware page size.
189 */
190#define	MSIZE		256		/* size of an mbuf */
191
192#ifndef MCLSHIFT
193#define	MCLSHIFT	11		/* convert bytes to m_buf clusters */
194					/* 2K cluster can hold Ether frame */
195#endif	/* MCLSHIFT */
196
197#define	MCLBYTES	(1 << MCLSHIFT)	/* size of a m_buf cluster */
198
199#if !defined (MSGBUFSIZE)		/* options MSGBUFSIZE=integer	*/
200#define MSGBUFSIZE	(4 * NBPG)
201#else
202#if INTSTACK - MSGBUF_VA - MSGBUFSIZE < 0
203#error MSGBUFSIZE is too large
204#endif
205#endif
206
207/*
208 * Minimum size of the kernel kmem_arena in PAGE_SIZE-sized
209 * logical pages.
210 * For 32bit kernels:
211 * Maximum of 2.5GB on sparc64 (it must fit into KERNEND - KERNBASE, and also
212 * leave space in the kernel_map for other allocations).
213 * For 64bit kernels:
214 * Unlimited. (Practically there is a limit, we use VA starting at 4GB upto
215 * the VA-hole, but let us call this unlimited for now.)
216 */
217#define	NKMEMPAGES_MIN_DEFAULT	((64 * 1024 * 1024) >> PAGE_SHIFT)
218#ifdef __arch64__
219#define	NKMEMPAGES_MAX_UNLIMITED
220#else
221#undef	NKMEMPAGES_MAX_UNLIMITED
222#define	NKMEMPAGES_MAX_DEFAULT	((2048UL * 1024 * 1024) >> PAGE_SHIFT)
223#endif
224
225#ifdef _KERNEL
226#ifndef _LOCORE
227
228#ifndef __HIDE_DELAY
229extern void	delay(unsigned int);
230#define	DELAY(n)	delay(n)
231#endif /* __HIDE_DELAY */
232
233/* Keep this a const so compiler optimization is done */
234extern const int cputyp;
235
236#if defined (SUN4US) || defined (SUN4V)
237#define CPU_ISSUN4U     (cputyp == CPU_SUN4U)
238#define CPU_ISSUN4US    (cputyp == CPU_SUN4US)
239#define CPU_ISSUN4V     (cputyp == CPU_SUN4V)
240#else
241#define CPU_ISSUN4U	(1)
242#define CPU_ISSUN4US	(0)
243#define CPU_ISSUN4V	(0)
244#endif
245
246#endif /* _LOCORE */
247#endif /* _KERNEL */
248
249/*
250 * Values for the cputyp variable.
251 */
252#define CPU_SUN4	0
253#define CPU_SUN4C	1
254#define CPU_SUN4M	2
255#define CPU_SUN4U	3
256#define CPU_SUN4US	4
257#define CPU_SUN4V	5
258
259/*
260 * Shorthand CPU-type macros. Enumerate all eight cases.
261 * Let compiler optimize away code conditional on constants.
262 *
263 * On a sun4 machine, the page size is 8192, while on a sun4c and sun4m
264 * it is 4096. Therefore, in the (SUN4 && (SUN4C || SUN4M)) cases below,
265 * NBPG, PGOFSET and PGSHIFT are defined as variables which are initialized
266 * early in locore.s after the machine type has been detected.
267 *
268 * Note that whenever the macros defined below evaluate to expressions
269 * involving variables, the kernel will perform slightly worse due to the
270 * extra memory references they'll generate.
271 */
272
273#define CPU_ISSUN4M	(0)
274#define CPU_ISSUN4C	(0)
275#define CPU_ISSUN4	(0)
276
277
278#define	PGSHIFT		13		/* log2(NBPG) */
279#define	NBPG		(1<<PGSHIFT)	/* bytes/page */
280#define	PGOFSET		(NBPG-1)	/* byte offset into page */
281
282#define PCI_MAGIC_IO_RANGE	0x100000000LL