master
1/* $NetBSD: trap.h,v 1.14 2020/07/06 09:34:17 rin Exp $ */
2
3/*
4 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _POWERPC_TRAP_H_
35#define _POWERPC_TRAP_H_
36
37#define EXC_RSVD 0x0000 /* Reserved */
38#define EXC_RST 0x0100 /* Reset; all but IBM4xx */
39#define EXC_MCHK 0x0200 /* Machine Check */
40#define EXC_DSI 0x0300 /* Data Storage Interrupt */
41#define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
42#define EXC_EXI 0x0500 /* External Interrupt */
43#define EXC_ALI 0x0600 /* Alignment Interrupt */
44#define EXC_PGM 0x0700 /* Program Interrupt */
45#define EXC_FPU 0x0800 /* Floating-point Unavailable */
46#define EXC_DECR 0x0900 /* Decrementer Interrupt */
47#define EXC_SC 0x0c00 /* System Call */
48#define EXC_TRC 0x0d00 /* Trace */
49#define EXC_FPA 0x0e00 /* Floating-point Assist */
50
51/* The following are only available on the 601: */
52#define EXC_IOC 0x0a00 /* I/O Controller Interface Exception */
53#define EXC_RUNMODETRC 0x2000 /* Run Mode/Trace Exception */
54
55/* The following are only available on 7400(G4): */
56#define EXC_VEC 0x0f20 /* AltiVec Unavailable */
57#define EXC_VECAST 0x1600 /* AltiVec Assist */
58
59/* The following are only available on 604/750/7400: */
60#define EXC_PERF 0x0f00 /* Performance Monitoring */
61#define EXC_BPT 0x1300 /* Instruction Breakpoint */
62#define EXC_SMI 0x1400 /* System Management Interrupt */
63
64/* The following are only available on 750/7400: */
65#define EXC_THRM 0x1700 /* Thermal Management Interrupt */
66
67/* And these are only on the 603: */
68#define EXC_IMISS 0x1000 /* Instruction translation miss */
69#define EXC_DLMISS 0x1100 /* Data load translation miss */
70#define EXC_DSMISS 0x1200 /* Data store translation miss */
71
72/* The following are only available on 405 (and 403?) */
73#define EXC_CII 0x0100 /* Critical Input Interrupt */
74#define EXC_PIT 0x1000 /* Programmable Interval Timer */
75#define EXC_FIT 0x1010 /* Fixed Interval Timer */
76#define EXC_WDOG 0x1020 /* Watchdog Timer */
77#define EXC_DTMISS 0x1100 /* Data TLB Miss */
78#define EXC_ITMISS 0x1200 /* Instruction TLB Miss */
79#define EXC_DEBUG 0x2000 /* Debug trap */
80
81/* The following are only available on mpc8xx */
82#define EXC_SWEMUL 0x1000 /* Software Emulation */
83#define EXC_ITMISS_8XX 0x1100 /* Instruction TLB Miss */
84#define EXC_DTMISS_8XX 0x1200 /* Data TLB Miss */
85#define EXC_ITERROR 0x1300 /* Instruction TLB Error */
86#define EXC_DTERROR 0x1400 /* Data TLB Error */
87#define EXC_DBREAK 0x1c00 /* data breakpoint */
88#define EXC_IBREAK 0x1d00 /* instructin breakpoint */
89
90/* The following are only present on 64 bit PPC implementations */
91#define EXC_DSEG 0x380
92#define EXC_ISEG 0x480
93
94/* The IBM 970x define the VMX assist exection to be 0x1700 */
95#define EXC_970_VECAST 0x1700
96
97#define EXC_LAST 0x2f00 /* Last possible exception vector */
98
99#define EXC_AST 0x3000 /* Fake AST vector */
100
101/* Trap was in user mode */
102#define EXC_USER 0x10000
103
104/* Exception vector base address when MSR[IP] is set */
105#define EXC_HIGHVEC 0xfff00000
106
107/*
108 * EXC_ALI sets bits in the DSISR and DAR to provide enough
109 * information to recover from the unaligned access without needing to
110 * parse the offending instruction. This includes certain bits of the
111 * opcode, and information about what registers are used. The opcode
112 * indicator values below come from Appendix F of Book III of "The
113 * PowerPC Architecture".
114 */
115
116#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f)
117
118#define EXC_ALI_LWARX_LWZ 0x00
119#define EXC_ALI_LDARX 0x01
120#define EXC_ALI_STW 0x02
121#define EXC_ALI_LHZ 0x04
122#define EXC_ALI_LHA 0x05
123#define EXC_ALI_STH 0x06
124#define EXC_ALI_LMW 0x07
125#define EXC_ALI_LFS 0x08
126#define EXC_ALI_LFD 0x09
127#define EXC_ALI_STFS 0x0a
128#define EXC_ALI_STFD 0x0b
129#define EXC_ALI_LD_LDU_LWA 0x0d
130#define EXC_ALI_STD_STDU 0x0f
131#define EXC_ALI_LWZU 0x10
132#define EXC_ALI_STWU 0x12
133#define EXC_ALI_LHZU 0x14
134#define EXC_ALI_LHAU 0x15
135#define EXC_ALI_STHU 0x16
136#define EXC_ALI_STMW 0x17
137#define EXC_ALI_LFSU 0x18
138#define EXC_ALI_LFDU 0x19
139#define EXC_ALI_STFSU 0x1a
140#define EXC_ALI_STFDU 0x1b
141#define EXC_ALI_LDX 0x20
142#define EXC_ALI_STDX 0x22
143#define EXC_ALI_LWAX 0x25
144#define EXC_ALI_LSWX 0x28
145#define EXC_ALI_LSWI 0x29
146#define EXC_ALI_STSWX 0x2a
147#define EXC_ALI_STSWI 0x2b
148#define EXC_ALI_LDUX 0x30
149#define EXC_ALI_STDUX 0x32
150#define EXC_ALI_LWAUX 0x35
151#define EXC_ALI_STWCX 0x42 /* stwcx. */
152#define EXC_ALI_STDCX 0x43 /* stdcx. */
153#define EXC_ALI_LWBRX 0x48
154#define EXC_ALI_STWBRX 0x4a
155#define EXC_ALI_LHBRX 0x4c
156#define EXC_ALI_STHBRX 0x4e
157#define EXC_ALI_ECIWX 0x54
158#define EXC_ALI_ECOWX 0x56
159#define EXC_ALI_DCBZ 0x5f
160#define EXC_ALI_LWZX 0x60
161#define EXC_ALI_STWX 0x62
162#define EXC_ALI_LHZX 0x64
163#define EXC_ALI_LHAX 0x65
164#define EXC_ALI_STHX 0x66
165#define EXC_ALI_LSFX 0x68
166#define EXC_ALI_LDFX 0x69
167#define EXC_ALI_STFSX 0x6a
168#define EXC_ALI_STFDX 0x6b
169#define EXC_ALI_STFIWX 0x6f
170#define EXC_ALI_LWZUX 0x70
171#define EXC_ALI_STWUX 0x72
172#define EXC_ALI_LHZUX 0x74
173#define EXC_ALI_LHAUX 0x75
174#define EXC_ALI_STHUX 0x76
175#define EXC_ALI_LFSUX 0x78
176#define EXC_ALI_LFDUX 0x79
177#define EXC_ALI_STFSUX 0x7a
178#define EXC_ALI_STFDUX 0x7b
179
180/* Macros to extract register information */
181#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */
182#define EXC_ALI_RA(dsisr) (dsisr & 0x1f)
183
184/* Helper defines to classify EXC_ALI_ */
185#define DSI_OP_ZERO 0x0001
186#define DSI_OP_UPDATE 0x0002
187#define DSI_OP_INDEXED 0x0004
188#define DSI_OP_ALGEBRAIC 0x0008
189#define DSI_OP_REVERSED 0x0010
190
191#endif /* _POWERPC_TRAP_H_ */