master
1/*-
2 * Copyright (c) 2011 Nathan Whitehorn
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#ifndef _DEV_OFW_OFWPCI_H_
28#define _DEV_OFW_OFWPCI_H_
29
30/*
31 * Export class definition for inheritance purposes
32 */
33DECLARE_CLASS(ofw_pcib_driver);
34
35struct ofw_pci_cell_info {
36 pcell_t host_address_cells;
37 pcell_t pci_address_cell;
38 pcell_t size_cells;
39 };
40
41struct ofw_pci_range {
42 uint32_t pci_hi;
43 uint64_t pci;
44 uint64_t host;
45 uint64_t size;
46};
47
48/*
49 * Quirks for some adapters
50 */
51enum {
52 OFW_PCI_QUIRK_RANGES_ON_CHILDREN = 1,
53};
54
55struct ofw_pci_softc {
56 device_t sc_dev;
57 phandle_t sc_node;
58 int sc_bus;
59 int sc_initialized;
60 int sc_quirks;
61 int sc_have_pmem;
62
63 struct ofw_pci_range *sc_range;
64 int sc_nrange;
65 uint64_t sc_range_mask;
66 struct ofw_pci_cell_info *sc_cell_info;
67
68 struct rman sc_io_rman;
69 struct rman sc_mem_rman;
70 struct rman sc_pmem_rman;
71 bus_space_tag_t sc_memt;
72 bus_dma_tag_t sc_dmat;
73 int sc_pci_domain;
74
75 struct ofw_bus_iinfo sc_pci_iinfo;
76};
77
78int ofw_pcib_init(device_t);
79void ofw_pcib_fini(device_t);
80int ofw_pcib_attach(device_t);
81int ofw_pcib_read_ivar(device_t, device_t, int, uintptr_t *);
82int ofw_pcib_write_ivar(device_t, device_t, int, uintptr_t);
83int ofw_pcib_route_interrupt(device_t, device_t, int);
84int ofw_pcib_nranges(phandle_t, struct ofw_pci_cell_info *);
85
86#endif /* _DEV_OFW_OFWPCI_H_ */